fsl_msi.h 1.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
  4. *
  5. * Author: Tony Li <tony.li@freescale.com>
  6. * Jason Jin <Jason.jin@freescale.com>
  7. */
  8. #ifndef _POWERPC_SYSDEV_FSL_MSI_H
  9. #define _POWERPC_SYSDEV_FSL_MSI_H
  10. #include <linux/of.h>
  11. #include <asm/msi_bitmap.h>
  12. #define NR_MSI_REG_MSIIR 8 /* MSIIR can index 8 MSI registers */
  13. #define NR_MSI_REG_MSIIR1 16 /* MSIIR1 can index 16 MSI registers */
  14. #define NR_MSI_REG_MAX NR_MSI_REG_MSIIR1
  15. #define IRQS_PER_MSI_REG 32
  16. #define NR_MSI_IRQS_MAX (NR_MSI_REG_MAX * IRQS_PER_MSI_REG)
  17. #define FSL_PIC_IP_MASK 0x0000000F
  18. #define FSL_PIC_IP_MPIC 0x00000001
  19. #define FSL_PIC_IP_IPIC 0x00000002
  20. #define FSL_PIC_IP_VMPIC 0x00000003
  21. #define MSI_HW_ERRATA_ENDIAN 0x00000010
  22. struct fsl_msi_cascade_data;
  23. struct fsl_msi {
  24. struct irq_domain *irqhost;
  25. unsigned long cascade_irq;
  26. u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
  27. u32 ibs_shift; /* Shift of interrupt bit select */
  28. u32 srs_shift; /* Shift of the shared interrupt register select */
  29. void __iomem *msi_regs;
  30. u32 feature;
  31. struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX];
  32. struct msi_bitmap bitmap;
  33. struct list_head list; /* support multiple MSI banks */
  34. phandle phandle;
  35. };
  36. #endif /* _POWERPC_SYSDEV_FSL_MSI_H */