mpc8xx.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * MPC8xx support functions
  4. *
  5. * Author: Scott Wood <scottwood@freescale.com>
  6. *
  7. * Copyright (c) 2007 Freescale Semiconductor, Inc.
  8. */
  9. #include "ops.h"
  10. #include "types.h"
  11. #include "fsl-soc.h"
  12. #include "mpc8xx.h"
  13. #include "stdio.h"
  14. #include "io.h"
  15. #define MPC8XX_PLPRCR (0x284/4) /* PLL and Reset Control Register */
  16. /* Return system clock from crystal frequency */
  17. u32 mpc885_get_clock(u32 crystal)
  18. {
  19. u32 *immr;
  20. u32 plprcr;
  21. int mfi, mfn, mfd, pdf;
  22. u32 ret;
  23. immr = fsl_get_immr();
  24. if (!immr) {
  25. printf("mpc885_get_clock: Couldn't get IMMR base.\r\n");
  26. return 0;
  27. }
  28. plprcr = in_be32(&immr[MPC8XX_PLPRCR]);
  29. mfi = (plprcr >> 16) & 15;
  30. if (mfi < 5) {
  31. printf("Warning: PLPRCR[MFI] value of %d out-of-bounds\r\n",
  32. mfi);
  33. mfi = 5;
  34. }
  35. pdf = (plprcr >> 1) & 0xf;
  36. mfd = (plprcr >> 22) & 0x1f;
  37. mfn = (plprcr >> 27) & 0x1f;
  38. ret = crystal * mfi;
  39. if (mfn != 0)
  40. ret += crystal * mfn / (mfd + 1);
  41. return ret / (pdf + 1);
  42. }
  43. /* Set common device tree fields based on the given clock frequencies. */
  44. void mpc8xx_set_clocks(u32 sysclk)
  45. {
  46. void *node;
  47. dt_fixup_cpu_clocks(sysclk, sysclk / 16, sysclk);
  48. node = finddevice("/soc/cpm");
  49. if (node)
  50. setprop(node, "clock-frequency", &sysclk, 4);
  51. node = finddevice("/soc/cpm/brg");
  52. if (node)
  53. setprop(node, "clock-frequency", &sysclk, 4);
  54. }
  55. int mpc885_fixup_clocks(u32 crystal)
  56. {
  57. u32 sysclk = mpc885_get_clock(crystal);
  58. if (!sysclk)
  59. return 0;
  60. mpc8xx_set_clocks(sysclk);
  61. return 1;
  62. }