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  1. /* This file is subject to the terms and conditions of the GNU General Public
  2. * License. See the file "COPYING" in the main directory of this archive
  3. * for more details.
  4. *
  5. * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
  6. * Copyright 1999 SuSE GmbH (Philipp Rumpf)
  7. * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
  8. * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
  9. * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
  10. * Copyright (C) 2004 Kyle McMartin <kyle@debian.org>
  11. *
  12. * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
  13. */
  14. #include <asm/asm-offsets.h>
  15. #include <asm/psw.h>
  16. #include <asm/pdc.h>
  17. #include <asm/assembly.h>
  18. #include <linux/linkage.h>
  19. #include <linux/init.h>
  20. #include <linux/pgtable.h>
  21. .level PA_ASM_LEVEL
  22. __INITDATA
  23. ENTRY(boot_args)
  24. .word 0 /* arg0 */
  25. .word 0 /* arg1 */
  26. .word 0 /* arg2 */
  27. .word 0 /* arg3 */
  28. END(boot_args)
  29. __HEAD
  30. .align 4
  31. .import init_thread_union,data
  32. .import fault_vector_20,code /* IVA parisc 2.0 32 bit */
  33. #ifndef CONFIG_64BIT
  34. .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
  35. .import $global$ /* forward declaration */
  36. #endif /*!CONFIG_64BIT*/
  37. ENTRY(parisc_kernel_start)
  38. .proc
  39. .callinfo
  40. /* Make sure sr4-sr7 are set to zero for the kernel address space */
  41. mtsp %r0,%sr4
  42. mtsp %r0,%sr5
  43. mtsp %r0,%sr6
  44. mtsp %r0,%sr7
  45. /* Clear BSS (shouldn't the boot loader do this?) */
  46. .import __bss_start,data
  47. .import __bss_stop,data
  48. load32 PA(__bss_start),%r3
  49. load32 PA(__bss_stop),%r4
  50. $bss_loop:
  51. cmpb,<<,n %r3,%r4,$bss_loop
  52. stw,ma %r0,4(%r3)
  53. /* Save away the arguments the boot loader passed in (32 bit args) */
  54. load32 PA(boot_args),%r1
  55. stw,ma %arg0,4(%r1)
  56. stw,ma %arg1,4(%r1)
  57. stw,ma %arg2,4(%r1)
  58. stw,ma %arg3,4(%r1)
  59. /* Initialize startup VM. Just map first 16/32 MB of memory */
  60. load32 PA(swapper_pg_dir),%r4
  61. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  62. mtctl %r4,%cr25 /* Initialize user root pointer */
  63. #if CONFIG_PGTABLE_LEVELS == 3
  64. /* Set pmd in pgd */
  65. load32 PA(pmd0),%r5
  66. shrd %r5,PxD_VALUE_SHIFT,%r3
  67. ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
  68. stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
  69. ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
  70. #else
  71. /* 2-level page table, so pmd == pgd */
  72. ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
  73. #endif
  74. /* Fill in pmd with enough pte directories */
  75. load32 PA(pg0),%r1
  76. SHRREG %r1,PxD_VALUE_SHIFT,%r3
  77. ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
  78. ldi ASM_PT_INITIAL,%r1
  79. 1:
  80. stw %r3,0(%r4)
  81. ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
  82. addib,> -1,%r1,1b
  83. #if CONFIG_PGTABLE_LEVELS == 3
  84. ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
  85. #else
  86. ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
  87. #endif
  88. /* Now initialize the PTEs themselves. We use RWX for
  89. * everything ... it will get remapped correctly later */
  90. ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
  91. load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
  92. load32 PA(pg0),%r1
  93. $pgt_fill_loop:
  94. STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
  95. ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */
  96. addib,> -1,%r11,$pgt_fill_loop
  97. nop
  98. /* Load the return address...er...crash 'n burn */
  99. copy %r0,%r2
  100. /* And the RFI Target address too */
  101. load32 start_parisc,%r11
  102. /* And the initial task pointer */
  103. load32 init_thread_union,%r6
  104. mtctl %r6,%cr30
  105. /* And the stack pointer too */
  106. ldo THREAD_SZ_ALGN(%r6),%sp
  107. #if defined(CONFIG_64BIT) && defined(CONFIG_FUNCTION_TRACER)
  108. .import _mcount,data
  109. /* initialize mcount FPTR */
  110. /* Get the global data pointer */
  111. loadgp
  112. load32 PA(_mcount), %r10
  113. std %dp,0x18(%r10)
  114. #endif
  115. #ifdef CONFIG_64BIT
  116. /* Get PDCE_PROC for monarch CPU. */
  117. #define MEM_PDC_LO 0x388
  118. #define MEM_PDC_HI 0x35C
  119. ldw MEM_PDC_LO(%r0),%r3
  120. ldw MEM_PDC_HI(%r0),%r10
  121. depd %r10, 31, 32, %r3 /* move to upper word */
  122. #endif
  123. #ifdef CONFIG_SMP
  124. /* Set the smp rendezvous address into page zero.
  125. ** It would be safer to do this in init_smp_config() but
  126. ** it's just way easier to deal with here because
  127. ** of 64-bit function ptrs and the address is local to this file.
  128. */
  129. load32 PA(smp_slave_stext),%r10
  130. stw %r10,0x10(%r0) /* MEM_RENDEZ */
  131. stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
  132. /* FALLTHROUGH */
  133. .procend
  134. /*
  135. ** Code Common to both Monarch and Slave processors.
  136. ** Entry:
  137. **
  138. ** 1.1:
  139. ** %r11 must contain RFI target address.
  140. ** %r25/%r26 args to pass to target function
  141. ** %r2 in case rfi target decides it didn't like something
  142. **
  143. ** 2.0w:
  144. ** %r3 PDCE_PROC address
  145. ** %r11 RFI target address
  146. **
  147. ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
  148. */
  149. common_stext:
  150. .proc
  151. .callinfo
  152. #else
  153. /* Clear PDC entry point - we won't use it */
  154. stw %r0,0x10(%r0) /* MEM_RENDEZ */
  155. stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
  156. #endif /*CONFIG_SMP*/
  157. #ifdef CONFIG_64BIT
  158. tophys_r1 %sp
  159. /* Save the rfi target address */
  160. ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
  161. tophys_r1 %r10
  162. std %r11, TASK_PT_GR11(%r10)
  163. /* Switch to wide mode Superdome doesn't support narrow PDC
  164. ** calls.
  165. */
  166. 1: mfia %rp /* clear upper part of pcoq */
  167. ldo 2f-1b(%rp),%rp
  168. depdi 0,31,32,%rp
  169. bv (%rp)
  170. ssm PSW_SM_W,%r0
  171. /* Set Wide mode as the "Default" (eg for traps)
  172. ** First trap occurs *right* after (or part of) rfi for slave CPUs.
  173. ** Someday, palo might not do this for the Monarch either.
  174. */
  175. 2:
  176. mfctl %cr30,%r6 /* PCX-W2 firmware bug */
  177. ldo PDC_PSW(%r0),%arg0 /* 21 */
  178. ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
  179. ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
  180. load32 PA(stext_pdc_ret), %rp
  181. bv (%r3)
  182. copy %r0,%arg3
  183. stext_pdc_ret:
  184. mtctl %r6,%cr30 /* restore task thread info */
  185. /* restore rfi target address*/
  186. ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
  187. tophys_r1 %r10
  188. ldd TASK_PT_GR11(%r10), %r11
  189. tovirt_r1 %sp
  190. #endif
  191. /* PARANOID: clear user scratch/user space SR's */
  192. mtsp %r0,%sr0
  193. mtsp %r0,%sr1
  194. mtsp %r0,%sr2
  195. mtsp %r0,%sr3
  196. /* Initialize Protection Registers */
  197. mtctl %r0,%cr8
  198. mtctl %r0,%cr9
  199. mtctl %r0,%cr12
  200. mtctl %r0,%cr13
  201. /* Initialize the global data pointer */
  202. loadgp
  203. /* Set up our interrupt table. HPMCs might not work after this!
  204. *
  205. * We need to install the correct iva for PA1.1 or PA2.0. The
  206. * following short sequence of instructions can determine this
  207. * (without being illegal on a PA1.1 machine).
  208. */
  209. #ifndef CONFIG_64BIT
  210. ldi 32,%r10
  211. mtctl %r10,%cr11
  212. .level 2.0
  213. mfctl,w %cr11,%r10
  214. .level 1.1
  215. comib,<>,n 0,%r10,$is_pa20
  216. ldil L%PA(fault_vector_11),%r10
  217. b $install_iva
  218. ldo R%PA(fault_vector_11)(%r10),%r10
  219. $is_pa20:
  220. .level PA_ASM_LEVEL /* restore 1.1 || 2.0w */
  221. #endif /*!CONFIG_64BIT*/
  222. load32 PA(fault_vector_20),%r10
  223. $install_iva:
  224. mtctl %r10,%cr14
  225. b aligned_rfi /* Prepare to RFI! Man all the cannons! */
  226. nop
  227. .align 128
  228. aligned_rfi:
  229. pcxt_ssm_bug
  230. copy %r3, %arg0 /* PDCE_PROC for smp_callin() */
  231. rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
  232. /* Don't need NOPs, have 8 compliant insn before rfi */
  233. mtctl %r0,%cr17 /* Clear IIASQ tail */
  234. mtctl %r0,%cr17 /* Clear IIASQ head */
  235. /* Load RFI target into PC queue */
  236. mtctl %r11,%cr18 /* IIAOQ head */
  237. ldo 4(%r11),%r11
  238. mtctl %r11,%cr18 /* IIAOQ tail */
  239. load32 KERNEL_PSW,%r10
  240. mtctl %r10,%ipsw
  241. /* Jump through hyperspace to Virt Mode */
  242. rfi
  243. nop
  244. .procend
  245. #ifdef CONFIG_SMP
  246. .import smp_init_current_idle_task,data
  247. .import smp_callin,code
  248. #ifndef CONFIG_64BIT
  249. smp_callin_rtn:
  250. .proc
  251. .callinfo
  252. break 1,1 /* Break if returned from start_secondary */
  253. nop
  254. nop
  255. .procend
  256. #endif /*!CONFIG_64BIT*/
  257. /***************************************************************************
  258. * smp_slave_stext is executed by all non-monarch Processors when the Monarch
  259. * pokes the slave CPUs in smp.c:smp_boot_cpus().
  260. *
  261. * Once here, registers values are initialized in order to branch to virtual
  262. * mode. Once all available/eligible CPUs are in virtual mode, all are
  263. * released and start out by executing their own idle task.
  264. *****************************************************************************/
  265. smp_slave_stext:
  266. .proc
  267. .callinfo
  268. /*
  269. ** Initialize Space registers
  270. */
  271. mtsp %r0,%sr4
  272. mtsp %r0,%sr5
  273. mtsp %r0,%sr6
  274. mtsp %r0,%sr7
  275. #ifdef CONFIG_64BIT
  276. /*
  277. * Enable Wide mode early, in case the task_struct for the idle
  278. * task in smp_init_current_idle_task was allocated above 4GB.
  279. */
  280. 1: mfia %rp /* clear upper part of pcoq */
  281. ldo 2f-1b(%rp),%rp
  282. depdi 0,31,32,%rp
  283. bv (%rp)
  284. ssm PSW_SM_W,%r0
  285. 2:
  286. #endif
  287. /* Initialize the SP - monarch sets up smp_init_current_idle_task */
  288. load32 PA(smp_init_current_idle_task),%sp
  289. LDREG 0(%sp),%sp /* load task address */
  290. tophys_r1 %sp
  291. LDREG TASK_THREAD_INFO(%sp),%sp
  292. mtctl %sp,%cr30 /* store in cr30 */
  293. ldo THREAD_SZ_ALGN(%sp),%sp
  294. /* point CPU to kernel page tables */
  295. load32 PA(swapper_pg_dir),%r4
  296. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  297. mtctl %r4,%cr25 /* Initialize user root pointer */
  298. #ifdef CONFIG_64BIT
  299. /* Setup PDCE_PROC entry */
  300. copy %arg0,%r3
  301. #else
  302. /* Load RFI *return* address in case smp_callin bails */
  303. load32 smp_callin_rtn,%r2
  304. #endif
  305. /* Load RFI target address. */
  306. load32 smp_callin,%r11
  307. /* ok...common code can handle the rest */
  308. b common_stext
  309. nop
  310. .procend
  311. #endif /* CONFIG_SMP */
  312. ENDPROC(parisc_kernel_start)
  313. #ifndef CONFIG_64BIT
  314. .section .data..ro_after_init
  315. .align 4
  316. .export $global$,data
  317. .type $global$,@object
  318. .size $global$,4
  319. $global$:
  320. .word 0
  321. #endif /*!CONFIG_64BIT*/