dma-octeon.c 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
  8. * Copyright (C) 2005 Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com>
  9. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  10. * IP32 changes by Ilya.
  11. * Copyright (C) 2010 Cavium Networks, Inc.
  12. */
  13. #include <linux/dma-direct.h>
  14. #include <linux/memblock.h>
  15. #include <linux/swiotlb.h>
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/mm.h>
  19. #include <asm/bootinfo.h>
  20. #include <asm/octeon/octeon.h>
  21. #ifdef CONFIG_PCI
  22. #include <linux/pci.h>
  23. #include <asm/octeon/pci-octeon.h>
  24. #include <asm/octeon/cvmx-npi-defs.h>
  25. #include <asm/octeon/cvmx-pci-defs.h>
  26. struct octeon_dma_map_ops {
  27. dma_addr_t (*phys_to_dma)(struct device *dev, phys_addr_t paddr);
  28. phys_addr_t (*dma_to_phys)(struct device *dev, dma_addr_t daddr);
  29. };
  30. static dma_addr_t octeon_hole_phys_to_dma(phys_addr_t paddr)
  31. {
  32. if (paddr >= CVMX_PCIE_BAR1_PHYS_BASE && paddr < (CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_PHYS_SIZE))
  33. return paddr - CVMX_PCIE_BAR1_PHYS_BASE + CVMX_PCIE_BAR1_RC_BASE;
  34. else
  35. return paddr;
  36. }
  37. static phys_addr_t octeon_hole_dma_to_phys(dma_addr_t daddr)
  38. {
  39. if (daddr >= CVMX_PCIE_BAR1_RC_BASE)
  40. return daddr + CVMX_PCIE_BAR1_PHYS_BASE - CVMX_PCIE_BAR1_RC_BASE;
  41. else
  42. return daddr;
  43. }
  44. static dma_addr_t octeon_gen1_phys_to_dma(struct device *dev, phys_addr_t paddr)
  45. {
  46. if (paddr >= 0x410000000ull && paddr < 0x420000000ull)
  47. paddr -= 0x400000000ull;
  48. return octeon_hole_phys_to_dma(paddr);
  49. }
  50. static phys_addr_t octeon_gen1_dma_to_phys(struct device *dev, dma_addr_t daddr)
  51. {
  52. daddr = octeon_hole_dma_to_phys(daddr);
  53. if (daddr >= 0x10000000ull && daddr < 0x20000000ull)
  54. daddr += 0x400000000ull;
  55. return daddr;
  56. }
  57. static const struct octeon_dma_map_ops octeon_gen1_ops = {
  58. .phys_to_dma = octeon_gen1_phys_to_dma,
  59. .dma_to_phys = octeon_gen1_dma_to_phys,
  60. };
  61. static dma_addr_t octeon_gen2_phys_to_dma(struct device *dev, phys_addr_t paddr)
  62. {
  63. return octeon_hole_phys_to_dma(paddr);
  64. }
  65. static phys_addr_t octeon_gen2_dma_to_phys(struct device *dev, dma_addr_t daddr)
  66. {
  67. return octeon_hole_dma_to_phys(daddr);
  68. }
  69. static const struct octeon_dma_map_ops octeon_gen2_ops = {
  70. .phys_to_dma = octeon_gen2_phys_to_dma,
  71. .dma_to_phys = octeon_gen2_dma_to_phys,
  72. };
  73. static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr)
  74. {
  75. if (paddr >= 0x410000000ull && paddr < 0x420000000ull)
  76. paddr -= 0x400000000ull;
  77. /* Anything in the BAR1 hole or above goes via BAR2 */
  78. if (paddr >= 0xf0000000ull)
  79. paddr = OCTEON_BAR2_PCI_ADDRESS + paddr;
  80. return paddr;
  81. }
  82. static phys_addr_t octeon_big_dma_to_phys(struct device *dev, dma_addr_t daddr)
  83. {
  84. if (daddr >= OCTEON_BAR2_PCI_ADDRESS)
  85. daddr -= OCTEON_BAR2_PCI_ADDRESS;
  86. if (daddr >= 0x10000000ull && daddr < 0x20000000ull)
  87. daddr += 0x400000000ull;
  88. return daddr;
  89. }
  90. static const struct octeon_dma_map_ops octeon_big_ops = {
  91. .phys_to_dma = octeon_big_phys_to_dma,
  92. .dma_to_phys = octeon_big_dma_to_phys,
  93. };
  94. static dma_addr_t octeon_small_phys_to_dma(struct device *dev,
  95. phys_addr_t paddr)
  96. {
  97. if (paddr >= 0x410000000ull && paddr < 0x420000000ull)
  98. paddr -= 0x400000000ull;
  99. /* Anything not in the BAR1 range goes via BAR2 */
  100. if (paddr >= octeon_bar1_pci_phys && paddr < octeon_bar1_pci_phys + 0x8000000ull)
  101. paddr = paddr - octeon_bar1_pci_phys;
  102. else
  103. paddr = OCTEON_BAR2_PCI_ADDRESS + paddr;
  104. return paddr;
  105. }
  106. static phys_addr_t octeon_small_dma_to_phys(struct device *dev,
  107. dma_addr_t daddr)
  108. {
  109. if (daddr >= OCTEON_BAR2_PCI_ADDRESS)
  110. daddr -= OCTEON_BAR2_PCI_ADDRESS;
  111. else
  112. daddr += octeon_bar1_pci_phys;
  113. if (daddr >= 0x10000000ull && daddr < 0x20000000ull)
  114. daddr += 0x400000000ull;
  115. return daddr;
  116. }
  117. static const struct octeon_dma_map_ops octeon_small_ops = {
  118. .phys_to_dma = octeon_small_phys_to_dma,
  119. .dma_to_phys = octeon_small_dma_to_phys,
  120. };
  121. static const struct octeon_dma_map_ops *octeon_pci_dma_ops;
  122. void __init octeon_pci_dma_init(void)
  123. {
  124. switch (octeon_dma_bar_type) {
  125. case OCTEON_DMA_BAR_TYPE_PCIE:
  126. octeon_pci_dma_ops = &octeon_gen1_ops;
  127. break;
  128. case OCTEON_DMA_BAR_TYPE_PCIE2:
  129. octeon_pci_dma_ops = &octeon_gen2_ops;
  130. break;
  131. case OCTEON_DMA_BAR_TYPE_BIG:
  132. octeon_pci_dma_ops = &octeon_big_ops;
  133. break;
  134. case OCTEON_DMA_BAR_TYPE_SMALL:
  135. octeon_pci_dma_ops = &octeon_small_ops;
  136. break;
  137. default:
  138. BUG();
  139. }
  140. }
  141. #endif /* CONFIG_PCI */
  142. dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
  143. {
  144. #ifdef CONFIG_PCI
  145. if (dev && dev_is_pci(dev))
  146. return octeon_pci_dma_ops->phys_to_dma(dev, paddr);
  147. #endif
  148. return paddr;
  149. }
  150. phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
  151. {
  152. #ifdef CONFIG_PCI
  153. if (dev && dev_is_pci(dev))
  154. return octeon_pci_dma_ops->dma_to_phys(dev, daddr);
  155. #endif
  156. return daddr;
  157. }
  158. char *octeon_swiotlb;
  159. void __init plat_swiotlb_setup(void)
  160. {
  161. phys_addr_t start, end;
  162. phys_addr_t max_addr;
  163. phys_addr_t addr_size;
  164. size_t swiotlbsize;
  165. unsigned long swiotlb_nslabs;
  166. u64 i;
  167. max_addr = 0;
  168. addr_size = 0;
  169. for_each_mem_range(i, &start, &end) {
  170. /* These addresses map low for PCI. */
  171. if (start > 0x410000000ull && !OCTEON_IS_OCTEON2())
  172. continue;
  173. addr_size += (end - start);
  174. if (max_addr < end)
  175. max_addr = end;
  176. }
  177. swiotlbsize = PAGE_SIZE;
  178. #ifdef CONFIG_PCI
  179. /*
  180. * For OCTEON_DMA_BAR_TYPE_SMALL, size the iotlb at 1/4 memory
  181. * size to a maximum of 64MB
  182. */
  183. if (OCTEON_IS_MODEL(OCTEON_CN31XX)
  184. || OCTEON_IS_MODEL(OCTEON_CN38XX_PASS2)) {
  185. swiotlbsize = addr_size / 4;
  186. if (swiotlbsize > 64 * (1<<20))
  187. swiotlbsize = 64 * (1<<20);
  188. } else if (max_addr > 0xf0000000ul) {
  189. /*
  190. * Otherwise only allocate a big iotlb if there is
  191. * memory past the BAR1 hole.
  192. */
  193. swiotlbsize = 64 * (1<<20);
  194. }
  195. #endif
  196. #ifdef CONFIG_USB_OHCI_HCD_PLATFORM
  197. /* OCTEON II ohci is only 32-bit. */
  198. if (OCTEON_IS_OCTEON2() && max_addr >= 0x100000000ul)
  199. swiotlbsize = 64 * (1<<20);
  200. #endif
  201. swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT;
  202. swiotlb_nslabs = ALIGN(swiotlb_nslabs, IO_TLB_SEGSIZE);
  203. swiotlbsize = swiotlb_nslabs << IO_TLB_SHIFT;
  204. octeon_swiotlb = memblock_alloc_low(swiotlbsize, PAGE_SIZE);
  205. if (!octeon_swiotlb)
  206. panic("%s: Failed to allocate %zu bytes align=%lx\n",
  207. __func__, swiotlbsize, PAGE_SIZE);
  208. if (swiotlb_init_with_tbl(octeon_swiotlb, swiotlb_nslabs, 1) == -ENOMEM)
  209. panic("Cannot allocate SWIOTLB buffer");
  210. }