setup.c 3.6 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
  7. */
  8. #include <linux/init.h>
  9. #include <linux/kernel.h>
  10. #include <linux/delay.h>
  11. #include <linux/memblock.h>
  12. #include <linux/ioport.h>
  13. #include <linux/pm.h>
  14. #include <asm/bootinfo.h>
  15. #include <asm/time.h>
  16. #include <asm/reboot.h>
  17. #include <asm/cacheflush.h>
  18. #include <bcm63xx_board.h>
  19. #include <bcm63xx_cpu.h>
  20. #include <bcm63xx_regs.h>
  21. #include <bcm63xx_io.h>
  22. #include <bcm63xx_gpio.h>
  23. void bcm63xx_machine_halt(void)
  24. {
  25. pr_info("System halted\n");
  26. while (1)
  27. ;
  28. }
  29. static void bcm6348_a1_reboot(void)
  30. {
  31. u32 reg;
  32. /* soft reset all blocks */
  33. pr_info("soft-resetting all blocks ...\n");
  34. reg = bcm_perf_readl(PERF_SOFTRESET_REG);
  35. reg &= ~SOFTRESET_6348_ALL;
  36. bcm_perf_writel(reg, PERF_SOFTRESET_REG);
  37. mdelay(10);
  38. reg = bcm_perf_readl(PERF_SOFTRESET_REG);
  39. reg |= SOFTRESET_6348_ALL;
  40. bcm_perf_writel(reg, PERF_SOFTRESET_REG);
  41. mdelay(10);
  42. /* Jump to the power on address. */
  43. pr_info("jumping to reset vector.\n");
  44. /* set high vectors (base at 0xbfc00000 */
  45. set_c0_status(ST0_BEV | ST0_ERL);
  46. /* run uncached in kseg0 */
  47. change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
  48. __flush_cache_all();
  49. /* remove all wired TLB entries */
  50. write_c0_wired(0);
  51. __asm__ __volatile__(
  52. "jr\t%0"
  53. :
  54. : "r" (0xbfc00000));
  55. while (1)
  56. ;
  57. }
  58. void bcm63xx_machine_reboot(void)
  59. {
  60. u32 reg, perf_regs[2] = { 0, 0 };
  61. unsigned int i;
  62. /* mask and clear all external irq */
  63. switch (bcm63xx_get_cpu_id()) {
  64. case BCM3368_CPU_ID:
  65. perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
  66. break;
  67. case BCM6328_CPU_ID:
  68. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
  69. break;
  70. case BCM6338_CPU_ID:
  71. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
  72. break;
  73. case BCM6345_CPU_ID:
  74. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345;
  75. break;
  76. case BCM6348_CPU_ID:
  77. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
  78. break;
  79. case BCM6358_CPU_ID:
  80. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358;
  81. break;
  82. case BCM6362_CPU_ID:
  83. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6362;
  84. break;
  85. }
  86. for (i = 0; i < 2; i++) {
  87. if (!perf_regs[i])
  88. break;
  89. reg = bcm_perf_readl(perf_regs[i]);
  90. if (BCMCPU_IS_6348()) {
  91. reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
  92. reg |= EXTIRQ_CFG_CLEAR_ALL_6348;
  93. } else {
  94. reg &= ~EXTIRQ_CFG_MASK_ALL;
  95. reg |= EXTIRQ_CFG_CLEAR_ALL;
  96. }
  97. bcm_perf_writel(reg, perf_regs[i]);
  98. }
  99. if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
  100. bcm6348_a1_reboot();
  101. pr_info("triggering watchdog soft-reset...\n");
  102. if (BCMCPU_IS_6328()) {
  103. bcm_wdt_writel(1, WDT_SOFTRESET_REG);
  104. } else {
  105. reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
  106. reg |= SYS_PLL_SOFT_RESET;
  107. bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
  108. }
  109. while (1)
  110. ;
  111. }
  112. static void __bcm63xx_machine_reboot(char *p)
  113. {
  114. bcm63xx_machine_reboot();
  115. }
  116. /*
  117. * return system type in /proc/cpuinfo
  118. */
  119. const char *get_system_type(void)
  120. {
  121. static char buf[128];
  122. snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)",
  123. board_get_name(),
  124. bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
  125. return buf;
  126. }
  127. void __init plat_time_init(void)
  128. {
  129. mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
  130. }
  131. void __init plat_mem_setup(void)
  132. {
  133. memblock_add(0, bcm63xx_get_memory_size());
  134. _machine_halt = bcm63xx_machine_halt;
  135. _machine_restart = __bcm63xx_machine_reboot;
  136. pm_power_off = bcm63xx_machine_halt;
  137. set_io_port_base(0);
  138. ioport_resource.start = 0;
  139. ioport_resource.end = ~0;
  140. board_setup();
  141. }
  142. int __init bcm63xx_register_devices(void)
  143. {
  144. /* register gpiochip */
  145. bcm63xx_gpio_init();
  146. return board_register_devices();
  147. }
  148. arch_initcall(bcm63xx_register_devices);