prom.c 2.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
  7. */
  8. #include <linux/init.h>
  9. #include <linux/memblock.h>
  10. #include <linux/smp.h>
  11. #include <asm/bootinfo.h>
  12. #include <asm/bmips.h>
  13. #include <asm/smp-ops.h>
  14. #include <asm/mipsregs.h>
  15. #include <bcm63xx_board.h>
  16. #include <bcm63xx_cpu.h>
  17. #include <bcm63xx_io.h>
  18. #include <bcm63xx_regs.h>
  19. void __init prom_init(void)
  20. {
  21. u32 reg, mask;
  22. bcm63xx_cpu_init();
  23. /* stop any running watchdog */
  24. bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG);
  25. bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
  26. /* disable all hardware blocks clock for now */
  27. if (BCMCPU_IS_3368())
  28. mask = CKCTL_3368_ALL_SAFE_EN;
  29. else if (BCMCPU_IS_6328())
  30. mask = CKCTL_6328_ALL_SAFE_EN;
  31. else if (BCMCPU_IS_6338())
  32. mask = CKCTL_6338_ALL_SAFE_EN;
  33. else if (BCMCPU_IS_6345())
  34. mask = CKCTL_6345_ALL_SAFE_EN;
  35. else if (BCMCPU_IS_6348())
  36. mask = CKCTL_6348_ALL_SAFE_EN;
  37. else if (BCMCPU_IS_6358())
  38. mask = CKCTL_6358_ALL_SAFE_EN;
  39. else if (BCMCPU_IS_6362())
  40. mask = CKCTL_6362_ALL_SAFE_EN;
  41. else if (BCMCPU_IS_6368())
  42. mask = CKCTL_6368_ALL_SAFE_EN;
  43. else
  44. mask = 0;
  45. reg = bcm_perf_readl(PERF_CKCTL_REG);
  46. reg &= ~mask;
  47. bcm_perf_writel(reg, PERF_CKCTL_REG);
  48. /* do low level board init */
  49. board_prom_init();
  50. /* set up SMP */
  51. if (!register_bmips_smp_ops()) {
  52. /*
  53. * BCM6328 might not have its second CPU enabled, while BCM3368
  54. * and BCM6358 need special handling for their shared TLB, so
  55. * disable SMP for now.
  56. */
  57. if (BCMCPU_IS_6328()) {
  58. reg = bcm_readl(BCM_6328_OTP_BASE +
  59. OTP_USER_BITS_6328_REG(3));
  60. if (reg & OTP_6328_REG3_TP1_DISABLED)
  61. bmips_smp_enabled = 0;
  62. } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
  63. bmips_smp_enabled = 0;
  64. }
  65. if (!bmips_smp_enabled)
  66. return;
  67. /*
  68. * The bootloader has set up the CPU1 reset vector at
  69. * 0xa000_0200.
  70. * This conflicts with the special interrupt vector (IV).
  71. * The bootloader has also set up CPU1 to respond to the wrong
  72. * IPI interrupt.
  73. * Here we will start up CPU1 in the background and ask it to
  74. * reconfigure itself then go back to sleep.
  75. */
  76. memcpy((void *)0xa0000200, bmips_smp_movevec, 0x20);
  77. __sync();
  78. set_c0_cause(C_SW0);
  79. cpumask_set_cpu(1, &bmips_booted_mask);
  80. /*
  81. * FIXME: we really should have some sort of hazard barrier here
  82. */
  83. }
  84. }
  85. void __init prom_free_prom_memory(void)
  86. {
  87. }