cs.c 3.2 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/errno.h>
  10. #include <linux/export.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/log2.h>
  13. #include <bcm63xx_cpu.h>
  14. #include <bcm63xx_io.h>
  15. #include <bcm63xx_regs.h>
  16. #include <bcm63xx_cs.h>
  17. static DEFINE_SPINLOCK(bcm63xx_cs_lock);
  18. /*
  19. * check if given chip select exists
  20. */
  21. static int is_valid_cs(unsigned int cs)
  22. {
  23. if (cs > 6)
  24. return 0;
  25. return 1;
  26. }
  27. /*
  28. * Configure chipselect base address and size (bytes).
  29. * Size must be a power of two between 8k and 256M.
  30. */
  31. int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size)
  32. {
  33. unsigned long flags;
  34. u32 val;
  35. if (!is_valid_cs(cs))
  36. return -EINVAL;
  37. /* sanity check on size */
  38. if (size != roundup_pow_of_two(size))
  39. return -EINVAL;
  40. if (size < 8 * 1024 || size > 256 * 1024 * 1024)
  41. return -EINVAL;
  42. val = (base & MPI_CSBASE_BASE_MASK);
  43. /* 8k => 0 - 256M => 15 */
  44. val |= (ilog2(size) - ilog2(8 * 1024)) << MPI_CSBASE_SIZE_SHIFT;
  45. spin_lock_irqsave(&bcm63xx_cs_lock, flags);
  46. bcm_mpi_writel(val, MPI_CSBASE_REG(cs));
  47. spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
  48. return 0;
  49. }
  50. EXPORT_SYMBOL(bcm63xx_set_cs_base);
  51. /*
  52. * configure chipselect timing (ns)
  53. */
  54. int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait,
  55. unsigned int setup, unsigned int hold)
  56. {
  57. unsigned long flags;
  58. u32 val;
  59. if (!is_valid_cs(cs))
  60. return -EINVAL;
  61. spin_lock_irqsave(&bcm63xx_cs_lock, flags);
  62. val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
  63. val &= ~(MPI_CSCTL_WAIT_MASK);
  64. val &= ~(MPI_CSCTL_SETUP_MASK);
  65. val &= ~(MPI_CSCTL_HOLD_MASK);
  66. val |= wait << MPI_CSCTL_WAIT_SHIFT;
  67. val |= setup << MPI_CSCTL_SETUP_SHIFT;
  68. val |= hold << MPI_CSCTL_HOLD_SHIFT;
  69. bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
  70. spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
  71. return 0;
  72. }
  73. EXPORT_SYMBOL(bcm63xx_set_cs_timing);
  74. /*
  75. * configure other chipselect parameter (data bus size, ...)
  76. */
  77. int bcm63xx_set_cs_param(unsigned int cs, u32 params)
  78. {
  79. unsigned long flags;
  80. u32 val;
  81. if (!is_valid_cs(cs))
  82. return -EINVAL;
  83. /* none of this fields apply to pcmcia */
  84. if (cs == MPI_CS_PCMCIA_COMMON ||
  85. cs == MPI_CS_PCMCIA_ATTR ||
  86. cs == MPI_CS_PCMCIA_IO)
  87. return -EINVAL;
  88. spin_lock_irqsave(&bcm63xx_cs_lock, flags);
  89. val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
  90. val &= ~(MPI_CSCTL_DATA16_MASK);
  91. val &= ~(MPI_CSCTL_SYNCMODE_MASK);
  92. val &= ~(MPI_CSCTL_TSIZE_MASK);
  93. val &= ~(MPI_CSCTL_ENDIANSWAP_MASK);
  94. val |= params;
  95. bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
  96. spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
  97. return 0;
  98. }
  99. EXPORT_SYMBOL(bcm63xx_set_cs_param);
  100. /*
  101. * set cs status (enable/disable)
  102. */
  103. int bcm63xx_set_cs_status(unsigned int cs, int enable)
  104. {
  105. unsigned long flags;
  106. u32 val;
  107. if (!is_valid_cs(cs))
  108. return -EINVAL;
  109. spin_lock_irqsave(&bcm63xx_cs_lock, flags);
  110. val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
  111. if (enable)
  112. val |= MPI_CSCTL_ENABLE_MASK;
  113. else
  114. val &= ~MPI_CSCTL_ENABLE_MASK;
  115. bcm_mpi_writel(val, MPI_CSCTL_REG(cs));
  116. spin_unlock_irqrestore(&bcm63xx_cs_lock, flags);
  117. return 0;
  118. }
  119. EXPORT_SYMBOL(bcm63xx_set_cs_status);