board-xxs1500.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * BRIEF MODULE DESCRIPTION
  4. * MyCable XXS1500 board support
  5. *
  6. * Copyright 2003, 2008 MontaVista Software Inc.
  7. * Author: MontaVista Software, Inc. <source@mvista.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/gpio.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <asm/bootinfo.h>
  17. #include <asm/reboot.h>
  18. #include <asm/setup.h>
  19. #include <asm/mach-au1x00/au1000.h>
  20. #include <asm/mach-au1x00/gpio-au1000.h>
  21. #include <prom.h>
  22. const char *get_system_type(void)
  23. {
  24. return "XXS1500";
  25. }
  26. void prom_putchar(char c)
  27. {
  28. alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
  29. }
  30. static void xxs1500_reset(char *c)
  31. {
  32. /* Jump to the reset vector */
  33. __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
  34. }
  35. static void xxs1500_power_off(void)
  36. {
  37. while (1)
  38. asm volatile (
  39. " .set mips32 \n"
  40. " wait \n"
  41. " .set mips0 \n");
  42. }
  43. void __init board_setup(void)
  44. {
  45. u32 pin_func;
  46. pm_power_off = xxs1500_power_off;
  47. _machine_halt = xxs1500_power_off;
  48. _machine_restart = xxs1500_reset;
  49. alchemy_gpio1_input_enable();
  50. alchemy_gpio2_enable();
  51. /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
  52. pin_func = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
  53. pin_func |= SYS_PF_UR3;
  54. alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
  55. /* Enable UART */
  56. alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
  57. /* Enable DTR (MCR bit 0) = USB power up */
  58. __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
  59. wmb();
  60. }
  61. /******************************************************************************/
  62. static struct resource xxs1500_pcmcia_res[] = {
  63. {
  64. .name = "pcmcia-io",
  65. .flags = IORESOURCE_MEM,
  66. .start = AU1000_PCMCIA_IO_PHYS_ADDR,
  67. .end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
  68. },
  69. {
  70. .name = "pcmcia-attr",
  71. .flags = IORESOURCE_MEM,
  72. .start = AU1000_PCMCIA_ATTR_PHYS_ADDR,
  73. .end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
  74. },
  75. {
  76. .name = "pcmcia-mem",
  77. .flags = IORESOURCE_MEM,
  78. .start = AU1000_PCMCIA_MEM_PHYS_ADDR,
  79. .end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
  80. },
  81. };
  82. static struct platform_device xxs1500_pcmcia_dev = {
  83. .name = "xxs1500_pcmcia",
  84. .id = -1,
  85. .num_resources = ARRAY_SIZE(xxs1500_pcmcia_res),
  86. .resource = xxs1500_pcmcia_res,
  87. };
  88. static struct platform_device *xxs1500_devs[] __initdata = {
  89. &xxs1500_pcmcia_dev,
  90. };
  91. static int __init xxs1500_dev_init(void)
  92. {
  93. irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
  94. irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
  95. irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
  96. irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
  97. irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
  98. irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
  99. irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
  100. irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
  101. irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
  102. irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
  103. irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
  104. irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
  105. return platform_add_devices(xxs1500_devs,
  106. ARRAY_SIZE(xxs1500_devs));
  107. }
  108. device_initcall(xxs1500_dev_init);