oss.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Operating System Services (OSS) chip handling
  4. * Written by Joshua M. Thompson (funaho@jurai.org)
  5. *
  6. *
  7. * This chip is used in the IIfx in place of VIA #2. It acts like a fancy
  8. * VIA chip with prorammable interrupt levels.
  9. *
  10. * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
  11. * recent insights into OSS operational details.
  12. * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped
  13. * to mostly match the A/UX interrupt scheme supported on the
  14. * VIA side. Also added support for enabling the ISM irq again
  15. * since we now have a functional IOP manager.
  16. */
  17. #include <linux/types.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/delay.h>
  21. #include <linux/init.h>
  22. #include <linux/irq.h>
  23. #include <asm/macintosh.h>
  24. #include <asm/macints.h>
  25. #include <asm/mac_via.h>
  26. #include <asm/mac_oss.h>
  27. int oss_present;
  28. volatile struct mac_oss *oss;
  29. /*
  30. * Initialize the OSS
  31. */
  32. void __init oss_init(void)
  33. {
  34. int i;
  35. if (macintosh_config->ident != MAC_MODEL_IIFX)
  36. return;
  37. oss = (struct mac_oss *) OSS_BASE;
  38. pr_debug("OSS detected at %p", oss);
  39. oss_present = 1;
  40. /* Disable all interrupts. Unlike a VIA it looks like we */
  41. /* do this by setting the source's interrupt level to zero. */
  42. for (i = 0; i < OSS_NUM_SOURCES; i++)
  43. oss->irq_level[i] = 0;
  44. }
  45. /*
  46. * Handle OSS interrupts.
  47. * XXX how do you clear a pending IRQ? is it even necessary?
  48. */
  49. static void oss_iopism_irq(struct irq_desc *desc)
  50. {
  51. generic_handle_irq(IRQ_MAC_ADB);
  52. }
  53. static void oss_scsi_irq(struct irq_desc *desc)
  54. {
  55. generic_handle_irq(IRQ_MAC_SCSI);
  56. }
  57. static void oss_nubus_irq(struct irq_desc *desc)
  58. {
  59. u16 events, irq_bit;
  60. int irq_num;
  61. events = oss->irq_pending & OSS_IP_NUBUS;
  62. irq_num = NUBUS_SOURCE_BASE + 5;
  63. irq_bit = OSS_IP_NUBUS5;
  64. do {
  65. if (events & irq_bit) {
  66. events &= ~irq_bit;
  67. generic_handle_irq(irq_num);
  68. }
  69. --irq_num;
  70. irq_bit >>= 1;
  71. } while (events);
  72. }
  73. static void oss_iopscc_irq(struct irq_desc *desc)
  74. {
  75. generic_handle_irq(IRQ_MAC_SCC);
  76. }
  77. /*
  78. * Register the OSS and NuBus interrupt dispatchers.
  79. *
  80. * This IRQ mapping is laid out with two things in mind: first, we try to keep
  81. * things on their own levels to avoid having to do double-dispatches. Second,
  82. * the levels match as closely as possible the alternate IRQ mapping mode (aka
  83. * "A/UX mode") available on some VIA machines.
  84. */
  85. #define OSS_IRQLEV_IOPISM IRQ_AUTO_1
  86. #define OSS_IRQLEV_SCSI IRQ_AUTO_2
  87. #define OSS_IRQLEV_NUBUS IRQ_AUTO_3
  88. #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4
  89. #define OSS_IRQLEV_VIA1 IRQ_AUTO_6
  90. void __init oss_register_interrupts(void)
  91. {
  92. irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_iopism_irq);
  93. irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_scsi_irq);
  94. irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
  95. irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_iopscc_irq);
  96. irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
  97. /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
  98. oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
  99. }
  100. /*
  101. * Enable an OSS interrupt
  102. *
  103. * It looks messy but it's rather straightforward. The switch() statement
  104. * just maps the machspec interrupt numbers to the right OSS interrupt
  105. * source (if the OSS handles that interrupt) and then sets the interrupt
  106. * level for that source to nonzero, thus enabling the interrupt.
  107. */
  108. void oss_irq_enable(int irq) {
  109. switch(irq) {
  110. case IRQ_MAC_SCC:
  111. oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
  112. return;
  113. case IRQ_MAC_ADB:
  114. oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
  115. return;
  116. case IRQ_MAC_SCSI:
  117. oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
  118. return;
  119. case IRQ_NUBUS_9:
  120. case IRQ_NUBUS_A:
  121. case IRQ_NUBUS_B:
  122. case IRQ_NUBUS_C:
  123. case IRQ_NUBUS_D:
  124. case IRQ_NUBUS_E:
  125. irq -= NUBUS_SOURCE_BASE;
  126. oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
  127. return;
  128. }
  129. if (IRQ_SRC(irq) == 1)
  130. via_irq_enable(irq);
  131. }
  132. /*
  133. * Disable an OSS interrupt
  134. *
  135. * Same as above except we set the source's interrupt level to zero,
  136. * to disable the interrupt.
  137. */
  138. void oss_irq_disable(int irq) {
  139. switch(irq) {
  140. case IRQ_MAC_SCC:
  141. oss->irq_level[OSS_IOPSCC] = 0;
  142. return;
  143. case IRQ_MAC_ADB:
  144. oss->irq_level[OSS_IOPISM] = 0;
  145. return;
  146. case IRQ_MAC_SCSI:
  147. oss->irq_level[OSS_SCSI] = 0;
  148. return;
  149. case IRQ_NUBUS_9:
  150. case IRQ_NUBUS_A:
  151. case IRQ_NUBUS_B:
  152. case IRQ_NUBUS_C:
  153. case IRQ_NUBUS_D:
  154. case IRQ_NUBUS_E:
  155. irq -= NUBUS_SOURCE_BASE;
  156. oss->irq_level[irq] = 0;
  157. return;
  158. }
  159. if (IRQ_SRC(irq) == 1)
  160. via_irq_disable(irq);
  161. }