fpsp.h 11 KB

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  1. |
  2. | fpsp.h 3.3 3.3
  3. |
  4. | Copyright (C) Motorola, Inc. 1990
  5. | All Rights Reserved
  6. |
  7. | For details on the license for this file, please see the
  8. | file, README, in this same directory.
  9. | fpsp.h --- stack frame offsets during FPSP exception handling
  10. |
  11. | These equates are used to access the exception frame, the fsave
  12. | frame and any local variables needed by the FPSP package.
  13. |
  14. | All FPSP handlers begin by executing:
  15. |
  16. | link a6,#-LOCAL_SIZE
  17. | fsave -(a7)
  18. | movem.l d0-d1/a0-a1,USER_DA(a6)
  19. | fmovem.x fp0-fp3,USER_FP0(a6)
  20. | fmove.l fpsr/fpcr/fpiar,USER_FPSR(a6)
  21. |
  22. | After initialization, the stack looks like this:
  23. |
  24. | A7 ---> +-------------------------------+
  25. | | |
  26. | | FPU fsave area |
  27. | | |
  28. | +-------------------------------+
  29. | | |
  30. | | FPSP Local Variables |
  31. | | including |
  32. | | saved registers |
  33. | | |
  34. | +-------------------------------+
  35. | A6 ---> | Saved A6 |
  36. | +-------------------------------+
  37. | | |
  38. | | Exception Frame |
  39. | | |
  40. | | |
  41. |
  42. | Positive offsets from A6 refer to the exception frame. Negative
  43. | offsets refer to the Local Variable area and the fsave area.
  44. | The fsave frame is also accessible from the top via A7.
  45. |
  46. | On exit, the handlers execute:
  47. |
  48. | movem.l USER_DA(a6),d0-d1/a0-a1
  49. | fmovem.x USER_FP0(a6),fp0-fp3
  50. | fmove.l USER_FPSR(a6),fpsr/fpcr/fpiar
  51. | frestore (a7)+
  52. | unlk a6
  53. |
  54. | and then either "bra fpsp_done" if the exception was completely
  55. | handled by the package, or "bra real_xxxx" which is an external
  56. | label to a routine that will process a real exception of the
  57. | type that was generated. Some handlers may omit the "frestore"
  58. | if the FPU state after the exception is idle.
  59. |
  60. | Sometimes the exception handler will transform the fsave area
  61. | because it needs to report an exception back to the user. This
  62. | can happen if the package is entered for an unimplemented float
  63. | instruction that generates (say) an underflow. Alternatively,
  64. | a second fsave frame can be pushed onto the stack and the
  65. | handler exit code will reload the new frame and discard the old.
  66. |
  67. | The registers d0, d1, a0, a1 and fp0-fp3 are always saved and
  68. | restored from the "local variable" area and can be used as
  69. | temporaries. If a routine needs to change any
  70. | of these registers, it should modify the saved copy and let
  71. | the handler exit code restore the value.
  72. |
  73. |----------------------------------------------------------------------
  74. |
  75. | Local Variables on the stack
  76. |
  77. .set LOCAL_SIZE,192 | bytes needed for local variables
  78. .set LV,-LOCAL_SIZE | convenient base value
  79. |
  80. .set USER_DA,LV+0 | save space for D0-D1,A0-A1
  81. .set USER_D0,LV+0 | saved user D0
  82. .set USER_D1,LV+4 | saved user D1
  83. .set USER_A0,LV+8 | saved user A0
  84. .set USER_A1,LV+12 | saved user A1
  85. .set USER_FP0,LV+16 | saved user FP0
  86. .set USER_FP1,LV+28 | saved user FP1
  87. .set USER_FP2,LV+40 | saved user FP2
  88. .set USER_FP3,LV+52 | saved user FP3
  89. .set USER_FPCR,LV+64 | saved user FPCR
  90. .set FPCR_ENABLE,USER_FPCR+2 | FPCR exception enable
  91. .set FPCR_MODE,USER_FPCR+3 | FPCR rounding mode control
  92. .set USER_FPSR,LV+68 | saved user FPSR
  93. .set FPSR_CC,USER_FPSR+0 | FPSR condition code
  94. .set FPSR_QBYTE,USER_FPSR+1 | FPSR quotient
  95. .set FPSR_EXCEPT,USER_FPSR+2 | FPSR exception
  96. .set FPSR_AEXCEPT,USER_FPSR+3 | FPSR accrued exception
  97. .set USER_FPIAR,LV+72 | saved user FPIAR
  98. .set FP_SCR1,LV+76 | room for a temporary float value
  99. .set FP_SCR2,LV+92 | room for a temporary float value
  100. .set L_SCR1,LV+108 | room for a temporary long value
  101. .set L_SCR2,LV+112 | room for a temporary long value
  102. .set STORE_FLG,LV+116
  103. .set BINDEC_FLG,LV+117 | used in bindec
  104. .set DNRM_FLG,LV+118 | used in res_func
  105. .set RES_FLG,LV+119 | used in res_func
  106. .set DY_MO_FLG,LV+120 | dyadic/monadic flag
  107. .set UFLG_TMP,LV+121 | temporary for uflag errata
  108. .set CU_ONLY,LV+122 | cu-only flag
  109. .set VER_TMP,LV+123 | temp holding for version number
  110. .set L_SCR3,LV+124 | room for a temporary long value
  111. .set FP_SCR3,LV+128 | room for a temporary float value
  112. .set FP_SCR4,LV+144 | room for a temporary float value
  113. .set FP_SCR5,LV+160 | room for a temporary float value
  114. .set FP_SCR6,LV+176
  115. |
  116. |NEXT equ LV+192 ;need to increase LOCAL_SIZE
  117. |
  118. |--------------------------------------------------------------------------
  119. |
  120. | fsave offsets and bit definitions
  121. |
  122. | Offsets are defined from the end of an fsave because the last 10
  123. | words of a busy frame are the same as the unimplemented frame.
  124. |
  125. .set CU_SAVEPC,LV-92 | micro-pc for CU (1 byte)
  126. .set FPR_DIRTY_BITS,LV-91 | fpr dirty bits
  127. |
  128. .set WBTEMP,LV-76 | write back temp (12 bytes)
  129. .set WBTEMP_EX,WBTEMP | wbtemp sign and exponent (2 bytes)
  130. .set WBTEMP_HI,WBTEMP+4 | wbtemp mantissa [63:32] (4 bytes)
  131. .set WBTEMP_LO,WBTEMP+8 | wbtemp mantissa [31:00] (4 bytes)
  132. |
  133. .set WBTEMP_SGN,WBTEMP+2 | used to store sign
  134. |
  135. .set FPSR_SHADOW,LV-64 | fpsr shadow reg
  136. |
  137. .set FPIARCU,LV-60 | Instr. addr. reg. for CU (4 bytes)
  138. |
  139. .set CMDREG2B,LV-52 | cmd reg for machine 2
  140. .set CMDREG3B,LV-48 | cmd reg for E3 exceptions (2 bytes)
  141. |
  142. .set NMNEXC,LV-44 | NMNEXC (unsup,snan bits only)
  143. .set nmn_unsup_bit,1 |
  144. .set nmn_snan_bit,0 |
  145. |
  146. .set NMCEXC,LV-43 | NMNEXC & NMCEXC
  147. .set nmn_operr_bit,7
  148. .set nmn_ovfl_bit,6
  149. .set nmn_unfl_bit,5
  150. .set nmc_unsup_bit,4
  151. .set nmc_snan_bit,3
  152. .set nmc_operr_bit,2
  153. .set nmc_ovfl_bit,1
  154. .set nmc_unfl_bit,0
  155. |
  156. .set STAG,LV-40 | source tag (1 byte)
  157. .set WBTEMP_GRS,LV-40 | alias wbtemp guard, round, sticky
  158. .set guard_bit,1 | guard bit is bit number 1
  159. .set round_bit,0 | round bit is bit number 0
  160. .set stag_mask,0xE0 | upper 3 bits are source tag type
  161. .set denorm_bit,7 | bit determines if denorm or unnorm
  162. .set etemp15_bit,4 | etemp exponent bit #15
  163. .set wbtemp66_bit,2 | wbtemp mantissa bit #66
  164. .set wbtemp1_bit,1 | wbtemp mantissa bit #1
  165. .set wbtemp0_bit,0 | wbtemp mantissa bit #0
  166. |
  167. .set STICKY,LV-39 | holds sticky bit
  168. .set sticky_bit,7
  169. |
  170. .set CMDREG1B,LV-36 | cmd reg for E1 exceptions (2 bytes)
  171. .set kfact_bit,12 | distinguishes static/dynamic k-factor
  172. | ;on packed move outs. NOTE: this
  173. | ;equate only works when CMDREG1B is in
  174. | ;a register.
  175. |
  176. .set CMDWORD,LV-35 | command word in cmd1b
  177. .set direction_bit,5 | bit 0 in opclass
  178. .set size_bit2,12 | bit 2 in size field
  179. |
  180. .set DTAG,LV-32 | dest tag (1 byte)
  181. .set dtag_mask,0xE0 | upper 3 bits are dest type tag
  182. .set fptemp15_bit,4 | fptemp exponent bit #15
  183. |
  184. .set WB_BYTE,LV-31 | holds WBTE15 bit (1 byte)
  185. .set wbtemp15_bit,4 | wbtemp exponent bit #15
  186. |
  187. .set E_BYTE,LV-28 | holds E1 and E3 bits (1 byte)
  188. .set E1,2 | which bit is E1 flag
  189. .set E3,1 | which bit is E3 flag
  190. .set SFLAG,0 | which bit is S flag
  191. |
  192. .set T_BYTE,LV-27 | holds T and U bits (1 byte)
  193. .set XFLAG,7 | which bit is X flag
  194. .set UFLAG,5 | which bit is U flag
  195. .set TFLAG,4 | which bit is T flag
  196. |
  197. .set FPTEMP,LV-24 | fptemp (12 bytes)
  198. .set FPTEMP_EX,FPTEMP | fptemp sign and exponent (2 bytes)
  199. .set FPTEMP_HI,FPTEMP+4 | fptemp mantissa [63:32] (4 bytes)
  200. .set FPTEMP_LO,FPTEMP+8 | fptemp mantissa [31:00] (4 bytes)
  201. |
  202. .set FPTEMP_SGN,FPTEMP+2 | used to store sign
  203. |
  204. .set ETEMP,LV-12 | etemp (12 bytes)
  205. .set ETEMP_EX,ETEMP | etemp sign and exponent (2 bytes)
  206. .set ETEMP_HI,ETEMP+4 | etemp mantissa [63:32] (4 bytes)
  207. .set ETEMP_LO,ETEMP+8 | etemp mantissa [31:00] (4 bytes)
  208. |
  209. .set ETEMP_SGN,ETEMP+2 | used to store sign
  210. |
  211. .set EXC_SR,4 | exception frame status register
  212. .set EXC_PC,6 | exception frame program counter
  213. .set EXC_VEC,10 | exception frame vector (format+vector#)
  214. .set EXC_EA,12 | exception frame effective address
  215. |
  216. |--------------------------------------------------------------------------
  217. |
  218. | FPSR/FPCR bits
  219. |
  220. .set neg_bit,3 | negative result
  221. .set z_bit,2 | zero result
  222. .set inf_bit,1 | infinity result
  223. .set nan_bit,0 | not-a-number result
  224. |
  225. .set q_sn_bit,7 | sign bit of quotient byte
  226. |
  227. .set bsun_bit,7 | branch on unordered
  228. .set snan_bit,6 | signalling nan
  229. .set operr_bit,5 | operand error
  230. .set ovfl_bit,4 | overflow
  231. .set unfl_bit,3 | underflow
  232. .set dz_bit,2 | divide by zero
  233. .set inex2_bit,1 | inexact result 2
  234. .set inex1_bit,0 | inexact result 1
  235. |
  236. .set aiop_bit,7 | accrued illegal operation
  237. .set aovfl_bit,6 | accrued overflow
  238. .set aunfl_bit,5 | accrued underflow
  239. .set adz_bit,4 | accrued divide by zero
  240. .set ainex_bit,3 | accrued inexact
  241. |
  242. | FPSR individual bit masks
  243. |
  244. .set neg_mask,0x08000000
  245. .set z_mask,0x04000000
  246. .set inf_mask,0x02000000
  247. .set nan_mask,0x01000000
  248. |
  249. .set bsun_mask,0x00008000 |
  250. .set snan_mask,0x00004000
  251. .set operr_mask,0x00002000
  252. .set ovfl_mask,0x00001000
  253. .set unfl_mask,0x00000800
  254. .set dz_mask,0x00000400
  255. .set inex2_mask,0x00000200
  256. .set inex1_mask,0x00000100
  257. |
  258. .set aiop_mask,0x00000080 | accrued illegal operation
  259. .set aovfl_mask,0x00000040 | accrued overflow
  260. .set aunfl_mask,0x00000020 | accrued underflow
  261. .set adz_mask,0x00000010 | accrued divide by zero
  262. .set ainex_mask,0x00000008 | accrued inexact
  263. |
  264. | FPSR combinations used in the FPSP
  265. |
  266. .set dzinf_mask,inf_mask+dz_mask+adz_mask
  267. .set opnan_mask,nan_mask+operr_mask+aiop_mask
  268. .set nzi_mask,0x01ffffff | clears N, Z, and I
  269. .set unfinx_mask,unfl_mask+inex2_mask+aunfl_mask+ainex_mask
  270. .set unf2inx_mask,unfl_mask+inex2_mask+ainex_mask
  271. .set ovfinx_mask,ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
  272. .set inx1a_mask,inex1_mask+ainex_mask
  273. .set inx2a_mask,inex2_mask+ainex_mask
  274. .set snaniop_mask,nan_mask+snan_mask+aiop_mask
  275. .set naniop_mask,nan_mask+aiop_mask
  276. .set neginf_mask,neg_mask+inf_mask
  277. .set infaiop_mask,inf_mask+aiop_mask
  278. .set negz_mask,neg_mask+z_mask
  279. .set opaop_mask,operr_mask+aiop_mask
  280. .set unfl_inx_mask,unfl_mask+aunfl_mask+ainex_mask
  281. .set ovfl_inx_mask,ovfl_mask+aovfl_mask+ainex_mask
  282. |
  283. |--------------------------------------------------------------------------
  284. |
  285. | FPCR rounding modes
  286. |
  287. .set x_mode,0x00 | round to extended
  288. .set s_mode,0x40 | round to single
  289. .set d_mode,0x80 | round to double
  290. |
  291. .set rn_mode,0x00 | round nearest
  292. .set rz_mode,0x10 | round to zero
  293. .set rm_mode,0x20 | round to minus infinity
  294. .set rp_mode,0x30 | round to plus infinity
  295. |
  296. |--------------------------------------------------------------------------
  297. |
  298. | Miscellaneous equates
  299. |
  300. .set signan_bit,6 | signalling nan bit in mantissa
  301. .set sign_bit,7
  302. |
  303. .set rnd_stky_bit,29 | round/sticky bit of mantissa
  304. | this can only be used if in a data register
  305. .set sx_mask,0x01800000 | set s and x bits in word $48
  306. |
  307. .set LOCAL_EX,0
  308. .set LOCAL_SGN,2
  309. .set LOCAL_HI,4
  310. .set LOCAL_LO,8
  311. .set LOCAL_GRS,12 | valid ONLY for FP_SCR1, FP_SCR2
  312. |
  313. |
  314. .set norm_tag,0x00 | tag bits in {7:5} position
  315. .set zero_tag,0x20
  316. .set inf_tag,0x40
  317. .set nan_tag,0x60
  318. .set dnrm_tag,0x80
  319. |
  320. | fsave sizes and formats
  321. |
  322. .set VER_4,0x40 | fpsp compatible version numbers
  323. | are in the $40s {$40-$4f}
  324. .set VER_40,0x40 | original version number
  325. .set VER_41,0x41 | revision version number
  326. |
  327. .set BUSY_SIZE,100 | size of busy frame
  328. .set BUSY_FRAME,LV-BUSY_SIZE | start of busy frame
  329. |
  330. .set UNIMP_40_SIZE,44 | size of orig unimp frame
  331. .set UNIMP_41_SIZE,52 | size of rev unimp frame
  332. |
  333. .set IDLE_SIZE,4 | size of idle frame
  334. .set IDLE_FRAME,LV-IDLE_SIZE | start of idle frame
  335. |
  336. | exception vectors
  337. |
  338. .set TRACE_VEC,0x2024 | trace trap
  339. .set FLINE_VEC,0x002C | real F-line
  340. .set UNIMP_VEC,0x202C | unimplemented
  341. .set INEX_VEC,0x00C4
  342. |
  343. .set dbl_thresh,0x3C01
  344. .set sgl_thresh,0x3F81
  345. |