emif.c 1.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * External Memory Interface
  4. *
  5. * Copyright (C) 2011 Texas Instruments Incorporated
  6. * Author: Mark Salter <msalter@redhat.com>
  7. */
  8. #include <linux/of.h>
  9. #include <linux/of_address.h>
  10. #include <linux/io.h>
  11. #include <asm/soc.h>
  12. #include <asm/dscr.h>
  13. #define NUM_EMIFA_CHIP_ENABLES 4
  14. struct emifa_regs {
  15. u32 midr;
  16. u32 stat;
  17. u32 reserved1[6];
  18. u32 bprio;
  19. u32 reserved2[23];
  20. u32 cecfg[NUM_EMIFA_CHIP_ENABLES];
  21. u32 reserved3[4];
  22. u32 awcc;
  23. u32 reserved4[7];
  24. u32 intraw;
  25. u32 intmsk;
  26. u32 intmskset;
  27. u32 intmskclr;
  28. };
  29. static struct of_device_id emifa_match[] __initdata = {
  30. { .compatible = "ti,c64x+emifa" },
  31. {}
  32. };
  33. /*
  34. * Parse device tree for existence of an EMIF (External Memory Interface)
  35. * and initialize it if found.
  36. */
  37. static int __init c6x_emifa_init(void)
  38. {
  39. struct emifa_regs __iomem *regs;
  40. struct device_node *node;
  41. const __be32 *p;
  42. u32 val;
  43. int i, len, err;
  44. node = of_find_matching_node(NULL, emifa_match);
  45. if (!node)
  46. return 0;
  47. regs = of_iomap(node, 0);
  48. if (!regs)
  49. return 0;
  50. /* look for a dscr-based enable for emifa pin buffers */
  51. err = of_property_read_u32_array(node, "ti,dscr-dev-enable", &val, 1);
  52. if (!err)
  53. dscr_set_devstate(val, DSCR_DEVSTATE_ENABLED);
  54. /* set up the chip enables */
  55. p = of_get_property(node, "ti,emifa-ce-config", &len);
  56. if (p) {
  57. len /= sizeof(u32);
  58. if (len > NUM_EMIFA_CHIP_ENABLES)
  59. len = NUM_EMIFA_CHIP_ENABLES;
  60. for (i = 0; i <= len; i++)
  61. soc_writel(be32_to_cpup(&p[i]), &regs->cecfg[i]);
  62. }
  63. err = of_property_read_u32_array(node, "ti,emifa-burst-priority", &val, 1);
  64. if (!err)
  65. soc_writel(val, &regs->bprio);
  66. err = of_property_read_u32_array(node, "ti,emifa-async-wait-control", &val, 1);
  67. if (!err)
  68. soc_writel(val, &regs->awcc);
  69. iounmap(regs);
  70. of_node_put(node);
  71. return 0;
  72. }
  73. pure_initcall(c6x_emifa_init);