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  1. ; SPDX-License-Identifier: GPL-2.0-only
  2. ;
  3. ; Port on Texas Instruments TMS320C6x architecture
  4. ;
  5. ; Copyright (C) 2004-2011 Texas Instruments Incorporated
  6. ; Author: Aurelien Jacquiot (aurelien.jacquiot@virtuallogix.com)
  7. ; Updated for 2.6.34: Mark Salter <msalter@redhat.com>
  8. ;
  9. #include <linux/sys.h>
  10. #include <linux/linkage.h>
  11. #include <asm/thread_info.h>
  12. #include <asm/asm-offsets.h>
  13. #include <asm/unistd.h>
  14. #include <asm/errno.h>
  15. ; Registers naming
  16. #define DP B14
  17. #define SP B15
  18. #ifndef CONFIG_PREEMPTION
  19. #define resume_kernel restore_all
  20. #endif
  21. .altmacro
  22. .macro MASK_INT reg
  23. MVC .S2 CSR,reg
  24. CLR .S2 reg,0,0,reg
  25. MVC .S2 reg,CSR
  26. .endm
  27. .macro UNMASK_INT reg
  28. MVC .S2 CSR,reg
  29. SET .S2 reg,0,0,reg
  30. MVC .S2 reg,CSR
  31. .endm
  32. .macro GET_THREAD_INFO reg
  33. SHR .S1X SP,THREAD_SHIFT,reg
  34. SHL .S1 reg,THREAD_SHIFT,reg
  35. .endm
  36. ;;
  37. ;; This defines the normal kernel pt_regs layout.
  38. ;;
  39. .macro SAVE_ALL __rp __tsr
  40. STW .D2T2 B0,*SP--[2] ; save original B0
  41. MVKL .S2 current_ksp,B0
  42. MVKH .S2 current_ksp,B0
  43. LDW .D2T2 *B0,B1 ; KSP
  44. NOP 3
  45. STW .D2T2 B1,*+SP[1] ; save original B1
  46. XOR .D2 SP,B1,B0 ; (SP ^ KSP)
  47. LDW .D2T2 *+SP[1],B1 ; restore B0/B1
  48. LDW .D2T2 *++SP[2],B0
  49. SHR .S2 B0,THREAD_SHIFT,B0 ; 0 if already using kstack
  50. [B0] STDW .D2T2 SP:DP,*--B1[1] ; user: save user sp/dp kstack
  51. [B0] MV .S2 B1,SP ; and switch to kstack
  52. ||[!B0] STDW .D2T2 SP:DP,*--SP[1] ; kernel: save on current stack
  53. SUBAW .D2 SP,2,SP
  54. ADD .D1X SP,-8,A15
  55. || STDW .D2T1 A15:A14,*SP--[16] ; save A15:A14
  56. STDW .D2T2 B13:B12,*SP--[1]
  57. || STDW .D1T1 A13:A12,*A15--[1]
  58. || MVC .S2 __rp,B13
  59. STDW .D2T2 B11:B10,*SP--[1]
  60. || STDW .D1T1 A11:A10,*A15--[1]
  61. || MVC .S2 CSR,B12
  62. STDW .D2T2 B9:B8,*SP--[1]
  63. || STDW .D1T1 A9:A8,*A15--[1]
  64. || MVC .S2 RILC,B11
  65. STDW .D2T2 B7:B6,*SP--[1]
  66. || STDW .D1T1 A7:A6,*A15--[1]
  67. || MVC .S2 ILC,B10
  68. STDW .D2T2 B5:B4,*SP--[1]
  69. || STDW .D1T1 A5:A4,*A15--[1]
  70. STDW .D2T2 B3:B2,*SP--[1]
  71. || STDW .D1T1 A3:A2,*A15--[1]
  72. || MVC .S2 __tsr,B5
  73. STDW .D2T2 B1:B0,*SP--[1]
  74. || STDW .D1T1 A1:A0,*A15--[1]
  75. || MV .S1X B5,A5
  76. STDW .D2T2 B31:B30,*SP--[1]
  77. || STDW .D1T1 A31:A30,*A15--[1]
  78. STDW .D2T2 B29:B28,*SP--[1]
  79. || STDW .D1T1 A29:A28,*A15--[1]
  80. STDW .D2T2 B27:B26,*SP--[1]
  81. || STDW .D1T1 A27:A26,*A15--[1]
  82. STDW .D2T2 B25:B24,*SP--[1]
  83. || STDW .D1T1 A25:A24,*A15--[1]
  84. STDW .D2T2 B23:B22,*SP--[1]
  85. || STDW .D1T1 A23:A22,*A15--[1]
  86. STDW .D2T2 B21:B20,*SP--[1]
  87. || STDW .D1T1 A21:A20,*A15--[1]
  88. STDW .D2T2 B19:B18,*SP--[1]
  89. || STDW .D1T1 A19:A18,*A15--[1]
  90. STDW .D2T2 B17:B16,*SP--[1]
  91. || STDW .D1T1 A17:A16,*A15--[1]
  92. STDW .D2T2 B13:B12,*SP--[1] ; save PC and CSR
  93. STDW .D2T2 B11:B10,*SP--[1] ; save RILC and ILC
  94. STDW .D2T1 A5:A4,*SP--[1] ; save TSR and orig A4
  95. ;; We left an unused word on the stack just above pt_regs.
  96. ;; It is used to save whether or not this frame is due to
  97. ;; a syscall. It is cleared here, but the syscall handler
  98. ;; sets it to a non-zero value.
  99. MVK .L2 0,B1
  100. STW .D2T2 B1,*+SP(REGS__END+8) ; clear syscall flag
  101. .endm
  102. .macro RESTORE_ALL __rp __tsr
  103. LDDW .D2T2 *++SP[1],B9:B8 ; get TSR (B9)
  104. LDDW .D2T2 *++SP[1],B11:B10 ; get RILC (B11) and ILC (B10)
  105. LDDW .D2T2 *++SP[1],B13:B12 ; get PC (B13) and CSR (B12)
  106. ADDAW .D1X SP,30,A15
  107. LDDW .D1T1 *++A15[1],A17:A16
  108. || LDDW .D2T2 *++SP[1],B17:B16
  109. LDDW .D1T1 *++A15[1],A19:A18
  110. || LDDW .D2T2 *++SP[1],B19:B18
  111. LDDW .D1T1 *++A15[1],A21:A20
  112. || LDDW .D2T2 *++SP[1],B21:B20
  113. LDDW .D1T1 *++A15[1],A23:A22
  114. || LDDW .D2T2 *++SP[1],B23:B22
  115. LDDW .D1T1 *++A15[1],A25:A24
  116. || LDDW .D2T2 *++SP[1],B25:B24
  117. LDDW .D1T1 *++A15[1],A27:A26
  118. || LDDW .D2T2 *++SP[1],B27:B26
  119. LDDW .D1T1 *++A15[1],A29:A28
  120. || LDDW .D2T2 *++SP[1],B29:B28
  121. LDDW .D1T1 *++A15[1],A31:A30
  122. || LDDW .D2T2 *++SP[1],B31:B30
  123. LDDW .D1T1 *++A15[1],A1:A0
  124. || LDDW .D2T2 *++SP[1],B1:B0
  125. LDDW .D1T1 *++A15[1],A3:A2
  126. || LDDW .D2T2 *++SP[1],B3:B2
  127. || MVC .S2 B9,__tsr
  128. LDDW .D1T1 *++A15[1],A5:A4
  129. || LDDW .D2T2 *++SP[1],B5:B4
  130. || MVC .S2 B11,RILC
  131. LDDW .D1T1 *++A15[1],A7:A6
  132. || LDDW .D2T2 *++SP[1],B7:B6
  133. || MVC .S2 B10,ILC
  134. LDDW .D1T1 *++A15[1],A9:A8
  135. || LDDW .D2T2 *++SP[1],B9:B8
  136. || MVC .S2 B13,__rp
  137. LDDW .D1T1 *++A15[1],A11:A10
  138. || LDDW .D2T2 *++SP[1],B11:B10
  139. || MVC .S2 B12,CSR
  140. LDDW .D1T1 *++A15[1],A13:A12
  141. || LDDW .D2T2 *++SP[1],B13:B12
  142. MV .D2X A15,SP
  143. || MVKL .S1 current_ksp,A15
  144. MVKH .S1 current_ksp,A15
  145. || ADDAW .D1X SP,6,A14
  146. STW .D1T1 A14,*A15 ; save kernel stack pointer
  147. LDDW .D2T1 *++SP[1],A15:A14
  148. B .S2 __rp ; return from interruption
  149. LDDW .D2T2 *+SP[1],SP:DP
  150. NOP 4
  151. .endm
  152. .section .text
  153. ;;
  154. ;; Jump to schedule() then return to ret_from_exception
  155. ;;
  156. _reschedule:
  157. #ifdef CONFIG_C6X_BIG_KERNEL
  158. MVKL .S1 schedule,A0
  159. MVKH .S1 schedule,A0
  160. B .S2X A0
  161. #else
  162. B .S1 schedule
  163. #endif
  164. ADDKPC .S2 ret_from_exception,B3,4
  165. ;;
  166. ;; Called before syscall handler when process is being debugged
  167. ;;
  168. tracesys_on:
  169. #ifdef CONFIG_C6X_BIG_KERNEL
  170. MVKL .S1 syscall_trace_entry,A0
  171. MVKH .S1 syscall_trace_entry,A0
  172. B .S2X A0
  173. #else
  174. B .S1 syscall_trace_entry
  175. #endif
  176. ADDKPC .S2 ret_from_syscall_trace,B3,3
  177. ADD .S1X 8,SP,A4
  178. ret_from_syscall_trace:
  179. ;; tracing returns (possibly new) syscall number
  180. MV .D2X A4,B0
  181. || MVK .S2 __NR_syscalls,B1
  182. CMPLTU .L2 B0,B1,B1
  183. [!B1] BNOP .S2 ret_from_syscall_function,5
  184. || MVK .S1 -ENOSYS,A4
  185. ;; reload syscall args from (possibly modified) stack frame
  186. ;; and get syscall handler addr from sys_call_table:
  187. LDW .D2T2 *+SP(REGS_B4+8),B4
  188. || MVKL .S2 sys_call_table,B1
  189. LDW .D2T1 *+SP(REGS_A6+8),A6
  190. || MVKH .S2 sys_call_table,B1
  191. LDW .D2T2 *+B1[B0],B0
  192. || MVKL .S2 ret_from_syscall_function,B3
  193. LDW .D2T2 *+SP(REGS_B6+8),B6
  194. || MVKH .S2 ret_from_syscall_function,B3
  195. LDW .D2T1 *+SP(REGS_A8+8),A8
  196. LDW .D2T2 *+SP(REGS_B8+8),B8
  197. NOP
  198. ; B0 = sys_call_table[__NR_*]
  199. BNOP .S2 B0,5 ; branch to syscall handler
  200. || LDW .D2T1 *+SP(REGS_ORIG_A4+8),A4
  201. syscall_exit_work:
  202. AND .D1 _TIF_SYSCALL_TRACE,A2,A0
  203. [!A0] BNOP .S1 work_pending,5
  204. [A0] B .S2 syscall_trace_exit
  205. ADDKPC .S2 resume_userspace,B3,1
  206. MVC .S2 CSR,B1
  207. SET .S2 B1,0,0,B1
  208. MVC .S2 B1,CSR ; enable ints
  209. work_pending:
  210. AND .D1 _TIF_NEED_RESCHED,A2,A0
  211. [!A0] BNOP .S1 work_notifysig,5
  212. work_resched:
  213. #ifdef CONFIG_C6X_BIG_KERNEL
  214. MVKL .S1 schedule,A1
  215. MVKH .S1 schedule,A1
  216. B .S2X A1
  217. #else
  218. B .S2 schedule
  219. #endif
  220. ADDKPC .S2 work_rescheduled,B3,4
  221. work_rescheduled:
  222. ;; make sure we don't miss an interrupt setting need_resched or
  223. ;; sigpending between sampling and the rti
  224. MASK_INT B2
  225. GET_THREAD_INFO A12
  226. LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
  227. MVK .S1 _TIF_WORK_MASK,A1
  228. MVK .S1 _TIF_NEED_RESCHED,A3
  229. NOP 2
  230. AND .D1 A1,A2,A0
  231. || AND .S1 A3,A2,A1
  232. [!A0] BNOP .S1 restore_all,5
  233. [A1] BNOP .S1 work_resched,5
  234. work_notifysig:
  235. ;; enable interrupts for do_notify_resume()
  236. UNMASK_INT B2
  237. B .S2 do_notify_resume
  238. LDW .D2T1 *+SP(REGS__END+8),A6 ; syscall flag
  239. ADDKPC .S2 resume_userspace,B3,1
  240. ADD .S1X 8,SP,A4 ; pt_regs pointer is first arg
  241. MV .D2X A2,B4 ; thread_info flags is second arg
  242. ;;
  243. ;; On C64x+, the return way from exception and interrupt
  244. ;; is a little bit different
  245. ;;
  246. ENTRY(ret_from_exception)
  247. #ifdef CONFIG_PREEMPTION
  248. MASK_INT B2
  249. #endif
  250. ENTRY(ret_from_interrupt)
  251. ;;
  252. ;; Check if we are comming from user mode.
  253. ;;
  254. LDW .D2T2 *+SP(REGS_TSR+8),B0
  255. MVK .S2 0x40,B1
  256. NOP 3
  257. AND .D2 B0,B1,B0
  258. [!B0] BNOP .S2 resume_kernel,5
  259. resume_userspace:
  260. ;; make sure we don't miss an interrupt setting need_resched or
  261. ;; sigpending between sampling and the rti
  262. MASK_INT B2
  263. GET_THREAD_INFO A12
  264. LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
  265. MVK .S1 _TIF_WORK_MASK,A1
  266. MVK .S1 _TIF_NEED_RESCHED,A3
  267. NOP 2
  268. AND .D1 A1,A2,A0
  269. [A0] BNOP .S1 work_pending,5
  270. BNOP .S1 restore_all,5
  271. ;;
  272. ;; System call handling
  273. ;; B0 = syscall number (in sys_call_table)
  274. ;; A4,B4,A6,B6,A8,B8 = arguments of the syscall function
  275. ;; A4 is the return value register
  276. ;;
  277. system_call_saved:
  278. MVK .L2 1,B2
  279. STW .D2T2 B2,*+SP(REGS__END+8) ; set syscall flag
  280. MVC .S2 B2,ECR ; ack the software exception
  281. UNMASK_INT B2 ; re-enable global IT
  282. system_call_saved_noack:
  283. ;; Check system call number
  284. MVK .S2 __NR_syscalls,B1
  285. #ifdef CONFIG_C6X_BIG_KERNEL
  286. || MVKL .S1 sys_ni_syscall,A0
  287. #endif
  288. CMPLTU .L2 B0,B1,B1
  289. #ifdef CONFIG_C6X_BIG_KERNEL
  290. || MVKH .S1 sys_ni_syscall,A0
  291. #endif
  292. ;; Check for ptrace
  293. GET_THREAD_INFO A12
  294. #ifdef CONFIG_C6X_BIG_KERNEL
  295. [!B1] B .S2X A0
  296. #else
  297. [!B1] B .S2 sys_ni_syscall
  298. #endif
  299. [!B1] ADDKPC .S2 ret_from_syscall_function,B3,4
  300. ;; Get syscall handler addr from sys_call_table
  301. ;; call tracesys_on or call syscall handler
  302. LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
  303. || MVKL .S2 sys_call_table,B1
  304. MVKH .S2 sys_call_table,B1
  305. LDW .D2T2 *+B1[B0],B0
  306. NOP 2
  307. ; A2 = thread_info flags
  308. AND .D1 _TIF_SYSCALL_TRACE,A2,A2
  309. [A2] BNOP .S1 tracesys_on,5
  310. ;; B0 = _sys_call_table[__NR_*]
  311. B .S2 B0
  312. ADDKPC .S2 ret_from_syscall_function,B3,4
  313. ret_from_syscall_function:
  314. STW .D2T1 A4,*+SP(REGS_A4+8) ; save return value in A4
  315. ; original A4 is in orig_A4
  316. syscall_exit:
  317. ;; make sure we don't miss an interrupt setting need_resched or
  318. ;; sigpending between sampling and the rti
  319. MASK_INT B2
  320. LDW .D1T1 *+A12(THREAD_INFO_FLAGS),A2
  321. MVK .S1 _TIF_ALLWORK_MASK,A1
  322. NOP 3
  323. AND .D1 A1,A2,A2 ; check for work to do
  324. [A2] BNOP .S1 syscall_exit_work,5
  325. restore_all:
  326. RESTORE_ALL NRP,NTSR
  327. ;;
  328. ;; After a fork we jump here directly from resume,
  329. ;; so that A4 contains the previous task structure.
  330. ;;
  331. ENTRY(ret_from_fork)
  332. #ifdef CONFIG_C6X_BIG_KERNEL
  333. MVKL .S1 schedule_tail,A0
  334. MVKH .S1 schedule_tail,A0
  335. B .S2X A0
  336. #else
  337. B .S2 schedule_tail
  338. #endif
  339. ADDKPC .S2 ret_from_fork_2,B3,4
  340. ret_from_fork_2:
  341. ;; return 0 in A4 for child process
  342. GET_THREAD_INFO A12
  343. BNOP .S2 syscall_exit,3
  344. MVK .L2 0,B0
  345. STW .D2T2 B0,*+SP(REGS_A4+8)
  346. ENDPROC(ret_from_fork)
  347. ENTRY(ret_from_kernel_thread)
  348. #ifdef CONFIG_C6X_BIG_KERNEL
  349. MVKL .S1 schedule_tail,A0
  350. MVKH .S1 schedule_tail,A0
  351. B .S2X A0
  352. #else
  353. B .S2 schedule_tail
  354. #endif
  355. LDW .D2T2 *+SP(REGS_A0+8),B10 /* get fn */
  356. ADDKPC .S2 0f,B3,3
  357. 0:
  358. B .S2 B10 /* call fn */
  359. LDW .D2T1 *+SP(REGS_A1+8),A4 /* get arg */
  360. ADDKPC .S2 ret_from_fork_2,B3,3
  361. ENDPROC(ret_from_kernel_thread)
  362. ;;
  363. ;; These are the interrupt handlers, responsible for calling c6x_do_IRQ()
  364. ;;
  365. .macro SAVE_ALL_INT
  366. SAVE_ALL IRP,ITSR
  367. .endm
  368. .macro CALL_INT int
  369. #ifdef CONFIG_C6X_BIG_KERNEL
  370. MVKL .S1 c6x_do_IRQ,A0
  371. MVKH .S1 c6x_do_IRQ,A0
  372. BNOP .S2X A0,1
  373. MVK .S1 int,A4
  374. ADDAW .D2 SP,2,B4
  375. MVKL .S2 ret_from_interrupt,B3
  376. MVKH .S2 ret_from_interrupt,B3
  377. #else
  378. CALLP .S2 c6x_do_IRQ,B3
  379. || MVK .S1 int,A4
  380. || ADDAW .D2 SP,2,B4
  381. B .S1 ret_from_interrupt
  382. NOP 5
  383. #endif
  384. .endm
  385. ENTRY(_int4_handler)
  386. SAVE_ALL_INT
  387. CALL_INT 4
  388. ENDPROC(_int4_handler)
  389. ENTRY(_int5_handler)
  390. SAVE_ALL_INT
  391. CALL_INT 5
  392. ENDPROC(_int5_handler)
  393. ENTRY(_int6_handler)
  394. SAVE_ALL_INT
  395. CALL_INT 6
  396. ENDPROC(_int6_handler)
  397. ENTRY(_int7_handler)
  398. SAVE_ALL_INT
  399. CALL_INT 7
  400. ENDPROC(_int7_handler)
  401. ENTRY(_int8_handler)
  402. SAVE_ALL_INT
  403. CALL_INT 8
  404. ENDPROC(_int8_handler)
  405. ENTRY(_int9_handler)
  406. SAVE_ALL_INT
  407. CALL_INT 9
  408. ENDPROC(_int9_handler)
  409. ENTRY(_int10_handler)
  410. SAVE_ALL_INT
  411. CALL_INT 10
  412. ENDPROC(_int10_handler)
  413. ENTRY(_int11_handler)
  414. SAVE_ALL_INT
  415. CALL_INT 11
  416. ENDPROC(_int11_handler)
  417. ENTRY(_int12_handler)
  418. SAVE_ALL_INT
  419. CALL_INT 12
  420. ENDPROC(_int12_handler)
  421. ENTRY(_int13_handler)
  422. SAVE_ALL_INT
  423. CALL_INT 13
  424. ENDPROC(_int13_handler)
  425. ENTRY(_int14_handler)
  426. SAVE_ALL_INT
  427. CALL_INT 14
  428. ENDPROC(_int14_handler)
  429. ENTRY(_int15_handler)
  430. SAVE_ALL_INT
  431. CALL_INT 15
  432. ENDPROC(_int15_handler)
  433. ;;
  434. ;; Handler for uninitialized and spurious interrupts
  435. ;;
  436. ENTRY(_bad_interrupt)
  437. B .S2 IRP
  438. NOP 5
  439. ENDPROC(_bad_interrupt)
  440. ;;
  441. ;; Entry for NMI/exceptions/syscall
  442. ;;
  443. ENTRY(_nmi_handler)
  444. SAVE_ALL NRP,NTSR
  445. MVC .S2 EFR,B2
  446. CMPEQ .L2 1,B2,B2
  447. || MVC .S2 TSR,B1
  448. CLR .S2 B1,10,10,B1
  449. MVC .S2 B1,TSR
  450. #ifdef CONFIG_C6X_BIG_KERNEL
  451. [!B2] MVKL .S1 process_exception,A0
  452. [!B2] MVKH .S1 process_exception,A0
  453. [!B2] B .S2X A0
  454. #else
  455. [!B2] B .S2 process_exception
  456. #endif
  457. [B2] B .S2 system_call_saved
  458. [!B2] ADDAW .D2 SP,2,B1
  459. [!B2] MV .D1X B1,A4
  460. ADDKPC .S2 ret_from_trap,B3,2
  461. ret_from_trap:
  462. MV .D2X A4,B0
  463. [!B0] BNOP .S2 ret_from_exception,5
  464. #ifdef CONFIG_C6X_BIG_KERNEL
  465. MVKL .S2 system_call_saved_noack,B3
  466. MVKH .S2 system_call_saved_noack,B3
  467. #endif
  468. LDW .D2T2 *+SP(REGS_B0+8),B0
  469. LDW .D2T1 *+SP(REGS_A4+8),A4
  470. LDW .D2T2 *+SP(REGS_B4+8),B4
  471. LDW .D2T1 *+SP(REGS_A6+8),A6
  472. LDW .D2T2 *+SP(REGS_B6+8),B6
  473. LDW .D2T1 *+SP(REGS_A8+8),A8
  474. #ifdef CONFIG_C6X_BIG_KERNEL
  475. || B .S2 B3
  476. #else
  477. || B .S2 system_call_saved_noack
  478. #endif
  479. LDW .D2T2 *+SP(REGS_B8+8),B8
  480. NOP 4
  481. ENDPROC(_nmi_handler)
  482. ;;
  483. ;; Jump to schedule() then return to ret_from_isr
  484. ;;
  485. #ifdef CONFIG_PREEMPTION
  486. resume_kernel:
  487. GET_THREAD_INFO A12
  488. LDW .D1T1 *+A12(THREAD_INFO_PREEMPT_COUNT),A1
  489. NOP 4
  490. [A1] BNOP .S2 restore_all,5
  491. preempt_schedule:
  492. GET_THREAD_INFO A2
  493. LDW .D1T1 *+A2(THREAD_INFO_FLAGS),A1
  494. #ifdef CONFIG_C6X_BIG_KERNEL
  495. MVKL .S2 preempt_schedule_irq,B0
  496. MVKH .S2 preempt_schedule_irq,B0
  497. NOP 2
  498. #else
  499. NOP 4
  500. #endif
  501. AND .D1 _TIF_NEED_RESCHED,A1,A1
  502. [!A1] BNOP .S2 restore_all,5
  503. #ifdef CONFIG_C6X_BIG_KERNEL
  504. B .S2 B0
  505. #else
  506. B .S2 preempt_schedule_irq
  507. #endif
  508. ADDKPC .S2 preempt_schedule,B3,4
  509. #endif /* CONFIG_PREEMPTION */
  510. ENTRY(enable_exception)
  511. DINT
  512. MVC .S2 TSR,B0
  513. MVC .S2 B3,NRP
  514. MVK .L2 0xc,B1
  515. OR .D2 B0,B1,B0
  516. MVC .S2 B0,TSR ; Set GEE and XEN in TSR
  517. B .S2 NRP
  518. NOP 5
  519. ENDPROC(enable_exception)
  520. ;;
  521. ;; Special system calls
  522. ;; return address is in B3
  523. ;;
  524. ENTRY(sys_rt_sigreturn)
  525. ADD .D1X SP,8,A4
  526. #ifdef CONFIG_C6X_BIG_KERNEL
  527. || MVKL .S1 do_rt_sigreturn,A0
  528. MVKH .S1 do_rt_sigreturn,A0
  529. BNOP .S2X A0,5
  530. #else
  531. || B .S2 do_rt_sigreturn
  532. NOP 5
  533. #endif
  534. ENDPROC(sys_rt_sigreturn)
  535. ENTRY(sys_pread_c6x)
  536. MV .D2X A8,B7
  537. #ifdef CONFIG_C6X_BIG_KERNEL
  538. || MVKL .S1 sys_pread64,A0
  539. MVKH .S1 sys_pread64,A0
  540. BNOP .S2X A0,5
  541. #else
  542. || B .S2 sys_pread64
  543. NOP 5
  544. #endif
  545. ENDPROC(sys_pread_c6x)
  546. ENTRY(sys_pwrite_c6x)
  547. MV .D2X A8,B7
  548. #ifdef CONFIG_C6X_BIG_KERNEL
  549. || MVKL .S1 sys_pwrite64,A0
  550. MVKH .S1 sys_pwrite64,A0
  551. BNOP .S2X A0,5
  552. #else
  553. || B .S2 sys_pwrite64
  554. NOP 5
  555. #endif
  556. ENDPROC(sys_pwrite_c6x)
  557. ;; On Entry
  558. ;; A4 - path
  559. ;; B4 - offset_lo (LE), offset_hi (BE)
  560. ;; A6 - offset_lo (BE), offset_hi (LE)
  561. ENTRY(sys_truncate64_c6x)
  562. #ifdef CONFIG_CPU_BIG_ENDIAN
  563. MV .S2 B4,B5
  564. MV .D2X A6,B4
  565. #else
  566. MV .D2X A6,B5
  567. #endif
  568. #ifdef CONFIG_C6X_BIG_KERNEL
  569. || MVKL .S1 sys_truncate64,A0
  570. MVKH .S1 sys_truncate64,A0
  571. BNOP .S2X A0,5
  572. #else
  573. || B .S2 sys_truncate64
  574. NOP 5
  575. #endif
  576. ENDPROC(sys_truncate64_c6x)
  577. ;; On Entry
  578. ;; A4 - fd
  579. ;; B4 - offset_lo (LE), offset_hi (BE)
  580. ;; A6 - offset_lo (BE), offset_hi (LE)
  581. ENTRY(sys_ftruncate64_c6x)
  582. #ifdef CONFIG_CPU_BIG_ENDIAN
  583. MV .S2 B4,B5
  584. MV .D2X A6,B4
  585. #else
  586. MV .D2X A6,B5
  587. #endif
  588. #ifdef CONFIG_C6X_BIG_KERNEL
  589. || MVKL .S1 sys_ftruncate64,A0
  590. MVKH .S1 sys_ftruncate64,A0
  591. BNOP .S2X A0,5
  592. #else
  593. || B .S2 sys_ftruncate64
  594. NOP 5
  595. #endif
  596. ENDPROC(sys_ftruncate64_c6x)
  597. ;; On Entry
  598. ;; A4 - fd
  599. ;; B4 - offset_lo (LE), offset_hi (BE)
  600. ;; A6 - offset_lo (BE), offset_hi (LE)
  601. ;; B6 - len_lo (LE), len_hi (BE)
  602. ;; A8 - len_lo (BE), len_hi (LE)
  603. ;; B8 - advice
  604. ENTRY(sys_fadvise64_64_c6x)
  605. #ifdef CONFIG_C6X_BIG_KERNEL
  606. MVKL .S1 sys_fadvise64_64,A0
  607. MVKH .S1 sys_fadvise64_64,A0
  608. BNOP .S2X A0,2
  609. #else
  610. B .S2 sys_fadvise64_64
  611. NOP 2
  612. #endif
  613. #ifdef CONFIG_CPU_BIG_ENDIAN
  614. MV .L2 B4,B5
  615. || MV .D2X A6,B4
  616. MV .L1 A8,A6
  617. || MV .D1X B6,A7
  618. #else
  619. MV .D2X A6,B5
  620. MV .L1 A8,A7
  621. || MV .D1X B6,A6
  622. #endif
  623. MV .L2 B8,B6
  624. ENDPROC(sys_fadvise64_64_c6x)
  625. ;; On Entry
  626. ;; A4 - fd
  627. ;; B4 - mode
  628. ;; A6 - offset_hi
  629. ;; B6 - offset_lo
  630. ;; A8 - len_hi
  631. ;; B8 - len_lo
  632. ENTRY(sys_fallocate_c6x)
  633. #ifdef CONFIG_C6X_BIG_KERNEL
  634. MVKL .S1 sys_fallocate,A0
  635. MVKH .S1 sys_fallocate,A0
  636. BNOP .S2X A0,1
  637. #else
  638. B .S2 sys_fallocate
  639. NOP
  640. #endif
  641. MV .D1 A6,A7
  642. MV .D1X B6,A6
  643. MV .D2X A8,B7
  644. MV .D2 B8,B6
  645. ENDPROC(sys_fallocate_c6x)
  646. ;; put this in .neardata for faster access when using DSBT mode
  647. .section .neardata,"aw",@progbits
  648. .global current_ksp
  649. .hidden current_ksp
  650. current_ksp:
  651. .word init_thread_union + THREAD_START_SP