topology.c 8.3 KB

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  1. /*
  2. * arch/arm64/kernel/topology.c
  3. *
  4. * Copyright (C) 2011,2013,2014 Linaro Limited.
  5. *
  6. * Based on the arm32 version written by Vincent Guittot in turn based on
  7. * arch/sh/kernel/topology.c
  8. *
  9. * This file is subject to the terms and conditions of the GNU General Public
  10. * License. See the file "COPYING" in the main directory of this archive
  11. * for more details.
  12. */
  13. #include <linux/acpi.h>
  14. #include <linux/arch_topology.h>
  15. #include <linux/cacheinfo.h>
  16. #include <linux/cpufreq.h>
  17. #include <linux/init.h>
  18. #include <linux/percpu.h>
  19. #include <asm/cpu.h>
  20. #include <asm/cputype.h>
  21. #include <asm/topology.h>
  22. void store_cpu_topology(unsigned int cpuid)
  23. {
  24. struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
  25. u64 mpidr;
  26. if (cpuid_topo->package_id != -1)
  27. goto topology_populated;
  28. mpidr = read_cpuid_mpidr();
  29. /* Uniprocessor systems can rely on default topology values */
  30. if (mpidr & MPIDR_UP_BITMASK)
  31. return;
  32. /*
  33. * This would be the place to create cpu topology based on MPIDR.
  34. *
  35. * However, it cannot be trusted to depict the actual topology; some
  36. * pieces of the architecture enforce an artificial cap on Aff0 values
  37. * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
  38. * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
  39. * having absolutely no relationship to the actual underlying system
  40. * topology, and cannot be reasonably used as core / package ID.
  41. *
  42. * If the MT bit is set, Aff0 *could* be used to define a thread ID, but
  43. * we still wouldn't be able to obtain a sane core ID. This means we
  44. * need to entirely ignore MPIDR for any topology deduction.
  45. */
  46. cpuid_topo->thread_id = -1;
  47. cpuid_topo->core_id = cpuid;
  48. cpuid_topo->package_id = cpu_to_node(cpuid);
  49. pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
  50. cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
  51. cpuid_topo->thread_id, mpidr);
  52. topology_populated:
  53. update_siblings_masks(cpuid);
  54. }
  55. #ifdef CONFIG_ACPI
  56. static bool __init acpi_cpu_is_threaded(int cpu)
  57. {
  58. int is_threaded = acpi_pptt_cpu_is_thread(cpu);
  59. /*
  60. * if the PPTT doesn't have thread information, assume a homogeneous
  61. * machine and return the current CPU's thread state.
  62. */
  63. if (is_threaded < 0)
  64. is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
  65. return !!is_threaded;
  66. }
  67. /*
  68. * Propagate the topology information of the processor_topology_node tree to the
  69. * cpu_topology array.
  70. */
  71. int __init parse_acpi_topology(void)
  72. {
  73. int cpu, topology_id;
  74. if (acpi_disabled)
  75. return 0;
  76. for_each_possible_cpu(cpu) {
  77. int i, cache_id;
  78. topology_id = find_acpi_cpu_topology(cpu, 0);
  79. if (topology_id < 0)
  80. return topology_id;
  81. if (acpi_cpu_is_threaded(cpu)) {
  82. cpu_topology[cpu].thread_id = topology_id;
  83. topology_id = find_acpi_cpu_topology(cpu, 1);
  84. cpu_topology[cpu].core_id = topology_id;
  85. } else {
  86. cpu_topology[cpu].thread_id = -1;
  87. cpu_topology[cpu].core_id = topology_id;
  88. }
  89. topology_id = find_acpi_cpu_topology_package(cpu);
  90. cpu_topology[cpu].package_id = topology_id;
  91. i = acpi_find_last_cache_level(cpu);
  92. if (i > 0) {
  93. /*
  94. * this is the only part of cpu_topology that has
  95. * a direct relationship with the cache topology
  96. */
  97. cache_id = find_acpi_cpu_cache_topology(cpu, i);
  98. if (cache_id > 0)
  99. cpu_topology[cpu].llc_id = cache_id;
  100. }
  101. }
  102. return 0;
  103. }
  104. #endif
  105. #ifdef CONFIG_ARM64_AMU_EXTN
  106. #undef pr_fmt
  107. #define pr_fmt(fmt) "AMU: " fmt
  108. static DEFINE_PER_CPU_READ_MOSTLY(unsigned long, arch_max_freq_scale);
  109. static DEFINE_PER_CPU(u64, arch_const_cycles_prev);
  110. static DEFINE_PER_CPU(u64, arch_core_cycles_prev);
  111. static cpumask_var_t amu_fie_cpus;
  112. /* Initialize counter reference per-cpu variables for the current CPU */
  113. void init_cpu_freq_invariance_counters(void)
  114. {
  115. this_cpu_write(arch_core_cycles_prev,
  116. read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0));
  117. this_cpu_write(arch_const_cycles_prev,
  118. read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0));
  119. }
  120. static int validate_cpu_freq_invariance_counters(int cpu)
  121. {
  122. u64 max_freq_hz, ratio;
  123. if (!cpu_has_amu_feat(cpu)) {
  124. pr_debug("CPU%d: counters are not supported.\n", cpu);
  125. return -EINVAL;
  126. }
  127. if (unlikely(!per_cpu(arch_const_cycles_prev, cpu) ||
  128. !per_cpu(arch_core_cycles_prev, cpu))) {
  129. pr_debug("CPU%d: cycle counters are not enabled.\n", cpu);
  130. return -EINVAL;
  131. }
  132. /* Convert maximum frequency from KHz to Hz and validate */
  133. max_freq_hz = cpufreq_get_hw_max_freq(cpu) * 1000;
  134. if (unlikely(!max_freq_hz)) {
  135. pr_debug("CPU%d: invalid maximum frequency.\n", cpu);
  136. return -EINVAL;
  137. }
  138. /*
  139. * Pre-compute the fixed ratio between the frequency of the constant
  140. * counter and the maximum frequency of the CPU.
  141. *
  142. * const_freq
  143. * arch_max_freq_scale = ---------------- * SCHED_CAPACITY_SCALE²
  144. * cpuinfo_max_freq
  145. *
  146. * We use a factor of 2 * SCHED_CAPACITY_SHIFT -> SCHED_CAPACITY_SCALE²
  147. * in order to ensure a good resolution for arch_max_freq_scale for
  148. * very low arch timer frequencies (down to the KHz range which should
  149. * be unlikely).
  150. */
  151. ratio = (u64)arch_timer_get_rate() << (2 * SCHED_CAPACITY_SHIFT);
  152. ratio = div64_u64(ratio, max_freq_hz);
  153. if (!ratio) {
  154. WARN_ONCE(1, "System timer frequency too low.\n");
  155. return -EINVAL;
  156. }
  157. per_cpu(arch_max_freq_scale, cpu) = (unsigned long)ratio;
  158. return 0;
  159. }
  160. static inline bool
  161. enable_policy_freq_counters(int cpu, cpumask_var_t valid_cpus)
  162. {
  163. struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
  164. if (!policy) {
  165. pr_debug("CPU%d: No cpufreq policy found.\n", cpu);
  166. return false;
  167. }
  168. if (cpumask_subset(policy->related_cpus, valid_cpus))
  169. cpumask_or(amu_fie_cpus, policy->related_cpus,
  170. amu_fie_cpus);
  171. cpufreq_cpu_put(policy);
  172. return true;
  173. }
  174. static DEFINE_STATIC_KEY_FALSE(amu_fie_key);
  175. #define amu_freq_invariant() static_branch_unlikely(&amu_fie_key)
  176. static int __init init_amu_fie(void)
  177. {
  178. cpumask_var_t valid_cpus;
  179. bool have_policy = false;
  180. int ret = 0;
  181. int cpu;
  182. if (!zalloc_cpumask_var(&valid_cpus, GFP_KERNEL))
  183. return -ENOMEM;
  184. if (!zalloc_cpumask_var(&amu_fie_cpus, GFP_KERNEL)) {
  185. ret = -ENOMEM;
  186. goto free_valid_mask;
  187. }
  188. for_each_present_cpu(cpu) {
  189. if (validate_cpu_freq_invariance_counters(cpu))
  190. continue;
  191. cpumask_set_cpu(cpu, valid_cpus);
  192. have_policy |= enable_policy_freq_counters(cpu, valid_cpus);
  193. }
  194. /*
  195. * If we are not restricted by cpufreq policies, we only enable
  196. * the use of the AMU feature for FIE if all CPUs support AMU.
  197. * Otherwise, enable_policy_freq_counters has already enabled
  198. * policy cpus.
  199. */
  200. if (!have_policy && cpumask_equal(valid_cpus, cpu_present_mask))
  201. cpumask_or(amu_fie_cpus, amu_fie_cpus, valid_cpus);
  202. if (!cpumask_empty(amu_fie_cpus)) {
  203. pr_info("CPUs[%*pbl]: counters will be used for FIE.",
  204. cpumask_pr_args(amu_fie_cpus));
  205. static_branch_enable(&amu_fie_key);
  206. }
  207. /*
  208. * If the system is not fully invariant after AMU init, disable
  209. * partial use of counters for frequency invariance.
  210. */
  211. if (!topology_scale_freq_invariant())
  212. static_branch_disable(&amu_fie_key);
  213. free_valid_mask:
  214. free_cpumask_var(valid_cpus);
  215. return ret;
  216. }
  217. late_initcall_sync(init_amu_fie);
  218. bool arch_freq_counters_available(const struct cpumask *cpus)
  219. {
  220. return amu_freq_invariant() &&
  221. cpumask_subset(cpus, amu_fie_cpus);
  222. }
  223. void topology_scale_freq_tick(void)
  224. {
  225. u64 prev_core_cnt, prev_const_cnt;
  226. u64 core_cnt, const_cnt, scale;
  227. int cpu = smp_processor_id();
  228. if (!amu_freq_invariant())
  229. return;
  230. if (!cpumask_test_cpu(cpu, amu_fie_cpus))
  231. return;
  232. const_cnt = read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0);
  233. core_cnt = read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0);
  234. prev_const_cnt = this_cpu_read(arch_const_cycles_prev);
  235. prev_core_cnt = this_cpu_read(arch_core_cycles_prev);
  236. if (unlikely(core_cnt <= prev_core_cnt ||
  237. const_cnt <= prev_const_cnt))
  238. goto store_and_exit;
  239. /*
  240. * /\core arch_max_freq_scale
  241. * scale = ------- * --------------------
  242. * /\const SCHED_CAPACITY_SCALE
  243. *
  244. * See validate_cpu_freq_invariance_counters() for details on
  245. * arch_max_freq_scale and the use of SCHED_CAPACITY_SHIFT.
  246. */
  247. scale = core_cnt - prev_core_cnt;
  248. scale *= this_cpu_read(arch_max_freq_scale);
  249. scale = div64_u64(scale >> SCHED_CAPACITY_SHIFT,
  250. const_cnt - prev_const_cnt);
  251. scale = min_t(unsigned long, scale, SCHED_CAPACITY_SCALE);
  252. this_cpu_write(freq_scale, (unsigned long)scale);
  253. store_and_exit:
  254. this_cpu_write(arch_core_cycles_prev, core_cnt);
  255. this_cpu_write(arch_const_cycles_prev, const_cnt);
  256. }
  257. #endif /* CONFIG_ARM64_AMU_EXTN */