smp_spin_table.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Spin Table SMP initialisation
  4. *
  5. * Copyright (C) 2013 ARM Ltd.
  6. */
  7. #include <linux/delay.h>
  8. #include <linux/init.h>
  9. #include <linux/of.h>
  10. #include <linux/smp.h>
  11. #include <linux/types.h>
  12. #include <linux/mm.h>
  13. #include <asm/cacheflush.h>
  14. #include <asm/cpu_ops.h>
  15. #include <asm/cputype.h>
  16. #include <asm/io.h>
  17. #include <asm/smp_plat.h>
  18. extern void secondary_holding_pen(void);
  19. volatile unsigned long __section(".mmuoff.data.read")
  20. secondary_holding_pen_release = INVALID_HWID;
  21. static phys_addr_t cpu_release_addr[NR_CPUS];
  22. /*
  23. * Write secondary_holding_pen_release in a way that is guaranteed to be
  24. * visible to all observers, irrespective of whether they're taking part
  25. * in coherency or not. This is necessary for the hotplug code to work
  26. * reliably.
  27. */
  28. static void write_pen_release(u64 val)
  29. {
  30. void *start = (void *)&secondary_holding_pen_release;
  31. unsigned long size = sizeof(secondary_holding_pen_release);
  32. secondary_holding_pen_release = val;
  33. __flush_dcache_area(start, size);
  34. }
  35. static int smp_spin_table_cpu_init(unsigned int cpu)
  36. {
  37. struct device_node *dn;
  38. int ret;
  39. dn = of_get_cpu_node(cpu, NULL);
  40. if (!dn)
  41. return -ENODEV;
  42. /*
  43. * Determine the address from which the CPU is polling.
  44. */
  45. ret = of_property_read_u64(dn, "cpu-release-addr",
  46. &cpu_release_addr[cpu]);
  47. if (ret)
  48. pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
  49. cpu);
  50. of_node_put(dn);
  51. return ret;
  52. }
  53. static int smp_spin_table_cpu_prepare(unsigned int cpu)
  54. {
  55. __le64 __iomem *release_addr;
  56. if (!cpu_release_addr[cpu])
  57. return -ENODEV;
  58. /*
  59. * The cpu-release-addr may or may not be inside the linear mapping.
  60. * As ioremap_cache will either give us a new mapping or reuse the
  61. * existing linear mapping, we can use it to cover both cases. In
  62. * either case the memory will be MT_NORMAL.
  63. */
  64. release_addr = ioremap_cache(cpu_release_addr[cpu],
  65. sizeof(*release_addr));
  66. if (!release_addr)
  67. return -ENOMEM;
  68. /*
  69. * We write the release address as LE regardless of the native
  70. * endianness of the kernel. Therefore, any boot-loaders that
  71. * read this address need to convert this address to the
  72. * boot-loader's endianness before jumping. This is mandated by
  73. * the boot protocol.
  74. */
  75. writeq_relaxed(__pa_function(secondary_holding_pen), release_addr);
  76. __flush_dcache_area((__force void *)release_addr,
  77. sizeof(*release_addr));
  78. /*
  79. * Send an event to wake up the secondary CPU.
  80. */
  81. sev();
  82. iounmap(release_addr);
  83. return 0;
  84. }
  85. static int smp_spin_table_cpu_boot(unsigned int cpu)
  86. {
  87. /*
  88. * Update the pen release flag.
  89. */
  90. write_pen_release(cpu_logical_map(cpu));
  91. /*
  92. * Send an event, causing the secondaries to read pen_release.
  93. */
  94. sev();
  95. return 0;
  96. }
  97. const struct cpu_operations smp_spin_table_ops = {
  98. .name = "spin-table",
  99. .cpu_init = smp_spin_table_cpu_init,
  100. .cpu_prepare = smp_spin_table_cpu_prepare,
  101. .cpu_boot = smp_spin_table_cpu_boot,
  102. };