smp.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * SMP initialisation and IPI support
  4. * Based on arch/arm/kernel/smp.c
  5. *
  6. * Copyright (C) 2012 ARM Ltd.
  7. */
  8. #include <linux/acpi.h>
  9. #include <linux/arm_sdei.h>
  10. #include <linux/delay.h>
  11. #include <linux/init.h>
  12. #include <linux/spinlock.h>
  13. #include <linux/sched/mm.h>
  14. #include <linux/sched/hotplug.h>
  15. #include <linux/sched/task_stack.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/cache.h>
  18. #include <linux/profile.h>
  19. #include <linux/errno.h>
  20. #include <linux/mm.h>
  21. #include <linux/err.h>
  22. #include <linux/cpu.h>
  23. #include <linux/smp.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/irq.h>
  26. #include <linux/irqchip/arm-gic-v3.h>
  27. #include <linux/percpu.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/completion.h>
  30. #include <linux/of.h>
  31. #include <linux/irq_work.h>
  32. #include <linux/kernel_stat.h>
  33. #include <linux/kexec.h>
  34. #include <linux/kvm_host.h>
  35. #include <asm/alternative.h>
  36. #include <asm/atomic.h>
  37. #include <asm/cacheflush.h>
  38. #include <asm/cpu.h>
  39. #include <asm/cputype.h>
  40. #include <asm/cpu_ops.h>
  41. #include <asm/daifflags.h>
  42. #include <asm/kvm_mmu.h>
  43. #include <asm/mmu_context.h>
  44. #include <asm/numa.h>
  45. #include <asm/processor.h>
  46. #include <asm/smp_plat.h>
  47. #include <asm/sections.h>
  48. #include <asm/tlbflush.h>
  49. #include <asm/ptrace.h>
  50. #include <asm/virt.h>
  51. #define CREATE_TRACE_POINTS
  52. #include <trace/events/ipi.h>
  53. #undef CREATE_TRACE_POINTS
  54. #include <trace/hooks/debug.h>
  55. DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
  56. EXPORT_PER_CPU_SYMBOL(cpu_number);
  57. EXPORT_TRACEPOINT_SYMBOL_GPL(ipi_raise);
  58. EXPORT_TRACEPOINT_SYMBOL_GPL(ipi_entry);
  59. EXPORT_TRACEPOINT_SYMBOL_GPL(ipi_exit);
  60. /*
  61. * as from 2.5, kernels no longer have an init_tasks structure
  62. * so we need some other way of telling a new secondary core
  63. * where to place its SVC stack
  64. */
  65. struct secondary_data secondary_data;
  66. /* Number of CPUs which aren't online, but looping in kernel text. */
  67. static int cpus_stuck_in_kernel;
  68. enum ipi_msg_type {
  69. IPI_RESCHEDULE,
  70. IPI_CALL_FUNC,
  71. IPI_CPU_STOP,
  72. IPI_CPU_CRASH_STOP,
  73. IPI_TIMER,
  74. IPI_IRQ_WORK,
  75. IPI_WAKEUP,
  76. NR_IPI
  77. };
  78. static int ipi_irq_base __read_mostly;
  79. static int nr_ipi __read_mostly = NR_IPI;
  80. static struct irq_desc *ipi_desc[NR_IPI] __read_mostly;
  81. static void ipi_setup(int cpu);
  82. #ifdef CONFIG_HOTPLUG_CPU
  83. static void ipi_teardown(int cpu);
  84. static int op_cpu_kill(unsigned int cpu);
  85. #else
  86. static inline int op_cpu_kill(unsigned int cpu)
  87. {
  88. return -ENOSYS;
  89. }
  90. #endif
  91. /*
  92. * Boot a secondary CPU, and assign it the specified idle task.
  93. * This also gives us the initial stack to use for this CPU.
  94. */
  95. static int boot_secondary(unsigned int cpu, struct task_struct *idle)
  96. {
  97. const struct cpu_operations *ops = get_cpu_ops(cpu);
  98. if (ops->cpu_boot)
  99. return ops->cpu_boot(cpu);
  100. return -EOPNOTSUPP;
  101. }
  102. static DECLARE_COMPLETION(cpu_running);
  103. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  104. {
  105. int ret;
  106. long status;
  107. /*
  108. * We need to tell the secondary core where to find its stack and the
  109. * page tables.
  110. */
  111. secondary_data.task = idle;
  112. secondary_data.stack = task_stack_page(idle) + THREAD_SIZE;
  113. update_cpu_boot_status(CPU_MMU_OFF);
  114. __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  115. /* Now bring the CPU into our world */
  116. ret = boot_secondary(cpu, idle);
  117. if (ret) {
  118. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  119. return ret;
  120. }
  121. /*
  122. * CPU was successfully started, wait for it to come online or
  123. * time out.
  124. */
  125. wait_for_completion_timeout(&cpu_running,
  126. msecs_to_jiffies(5000));
  127. if (cpu_online(cpu))
  128. return 0;
  129. pr_crit("CPU%u: failed to come online\n", cpu);
  130. secondary_data.task = NULL;
  131. secondary_data.stack = NULL;
  132. __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  133. status = READ_ONCE(secondary_data.status);
  134. if (status == CPU_MMU_OFF)
  135. status = READ_ONCE(__early_cpu_boot_status);
  136. switch (status & CPU_BOOT_STATUS_MASK) {
  137. default:
  138. pr_err("CPU%u: failed in unknown state : 0x%lx\n",
  139. cpu, status);
  140. cpus_stuck_in_kernel++;
  141. break;
  142. case CPU_KILL_ME:
  143. if (!op_cpu_kill(cpu)) {
  144. pr_crit("CPU%u: died during early boot\n", cpu);
  145. break;
  146. }
  147. pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
  148. fallthrough;
  149. case CPU_STUCK_IN_KERNEL:
  150. pr_crit("CPU%u: is stuck in kernel\n", cpu);
  151. if (status & CPU_STUCK_REASON_52_BIT_VA)
  152. pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
  153. if (status & CPU_STUCK_REASON_NO_GRAN) {
  154. pr_crit("CPU%u: does not support %luK granule\n",
  155. cpu, PAGE_SIZE / SZ_1K);
  156. }
  157. cpus_stuck_in_kernel++;
  158. break;
  159. case CPU_PANIC_KERNEL:
  160. panic("CPU%u detected unsupported configuration\n", cpu);
  161. }
  162. return -EIO;
  163. }
  164. static void init_gic_priority_masking(void)
  165. {
  166. u32 cpuflags;
  167. if (WARN_ON(!gic_enable_sre()))
  168. return;
  169. cpuflags = read_sysreg(daif);
  170. WARN_ON(!(cpuflags & PSR_I_BIT));
  171. gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
  172. }
  173. /*
  174. * This is the secondary CPU boot entry. We're using this CPUs
  175. * idle thread stack, but a set of temporary page tables.
  176. */
  177. asmlinkage notrace void secondary_start_kernel(void)
  178. {
  179. u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
  180. struct mm_struct *mm = &init_mm;
  181. const struct cpu_operations *ops;
  182. unsigned int cpu;
  183. cpu = task_cpu(current);
  184. set_my_cpu_offset(per_cpu_offset(cpu));
  185. /*
  186. * All kernel threads share the same mm context; grab a
  187. * reference and switch to it.
  188. */
  189. mmgrab(mm);
  190. current->active_mm = mm;
  191. /*
  192. * TTBR0 is only used for the identity mapping at this stage. Make it
  193. * point to zero page to avoid speculatively fetching new entries.
  194. */
  195. cpu_uninstall_idmap();
  196. if (system_uses_irq_prio_masking())
  197. init_gic_priority_masking();
  198. rcu_cpu_starting(cpu);
  199. trace_hardirqs_off();
  200. /*
  201. * If the system has established the capabilities, make sure
  202. * this CPU ticks all of those. If it doesn't, the CPU will
  203. * fail to come online.
  204. */
  205. check_local_cpu_capabilities();
  206. ops = get_cpu_ops(cpu);
  207. if (ops->cpu_postboot)
  208. ops->cpu_postboot();
  209. /*
  210. * Log the CPU info before it is marked online and might get read.
  211. */
  212. cpuinfo_store_cpu();
  213. /*
  214. * Enable GIC and timers.
  215. */
  216. notify_cpu_starting(cpu);
  217. ipi_setup(cpu);
  218. store_cpu_topology(cpu);
  219. numa_add_cpu(cpu);
  220. /*
  221. * OK, now it's safe to let the boot CPU continue. Wait for
  222. * the CPU migration code to notice that the CPU is online
  223. * before we continue.
  224. */
  225. pr_info("CPU%u: Booted secondary processor 0x%010lx [0x%08x]\n",
  226. cpu, (unsigned long)mpidr,
  227. read_cpuid_id());
  228. update_cpu_boot_status(CPU_BOOT_SUCCESS);
  229. set_cpu_online(cpu, true);
  230. complete(&cpu_running);
  231. local_daif_restore(DAIF_PROCCTX);
  232. /*
  233. * OK, it's off to the idle thread for us
  234. */
  235. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  236. }
  237. #ifdef CONFIG_HOTPLUG_CPU
  238. static int op_cpu_disable(unsigned int cpu)
  239. {
  240. const struct cpu_operations *ops = get_cpu_ops(cpu);
  241. /*
  242. * If we don't have a cpu_die method, abort before we reach the point
  243. * of no return. CPU0 may not have an cpu_ops, so test for it.
  244. */
  245. if (!ops || !ops->cpu_die)
  246. return -EOPNOTSUPP;
  247. /*
  248. * We may need to abort a hot unplug for some other mechanism-specific
  249. * reason.
  250. */
  251. if (ops->cpu_disable)
  252. return ops->cpu_disable(cpu);
  253. return 0;
  254. }
  255. /*
  256. * __cpu_disable runs on the processor to be shutdown.
  257. */
  258. int __cpu_disable(void)
  259. {
  260. unsigned int cpu = smp_processor_id();
  261. int ret;
  262. ret = op_cpu_disable(cpu);
  263. if (ret)
  264. return ret;
  265. remove_cpu_topology(cpu);
  266. numa_remove_cpu(cpu);
  267. /*
  268. * Take this CPU offline. Once we clear this, we can't return,
  269. * and we must not schedule until we're ready to give up the cpu.
  270. */
  271. set_cpu_online(cpu, false);
  272. ipi_teardown(cpu);
  273. /*
  274. * OK - migrate IRQs away from this CPU
  275. */
  276. irq_migrate_all_off_this_cpu();
  277. return 0;
  278. }
  279. static int op_cpu_kill(unsigned int cpu)
  280. {
  281. const struct cpu_operations *ops = get_cpu_ops(cpu);
  282. /*
  283. * If we have no means of synchronising with the dying CPU, then assume
  284. * that it is really dead. We can only wait for an arbitrary length of
  285. * time and hope that it's dead, so let's skip the wait and just hope.
  286. */
  287. if (!ops->cpu_kill)
  288. return 0;
  289. return ops->cpu_kill(cpu);
  290. }
  291. /*
  292. * called on the thread which is asking for a CPU to be shutdown -
  293. * waits until shutdown has completed, or it is timed out.
  294. */
  295. void __cpu_die(unsigned int cpu)
  296. {
  297. int err;
  298. if (!cpu_wait_death(cpu, 5)) {
  299. pr_crit("CPU%u: cpu didn't die\n", cpu);
  300. return;
  301. }
  302. pr_debug("CPU%u: shutdown\n", cpu);
  303. /*
  304. * Now that the dying CPU is beyond the point of no return w.r.t.
  305. * in-kernel synchronisation, try to get the firwmare to help us to
  306. * verify that it has really left the kernel before we consider
  307. * clobbering anything it might still be using.
  308. */
  309. err = op_cpu_kill(cpu);
  310. if (err)
  311. pr_warn("CPU%d may not have shut down cleanly: %d\n", cpu, err);
  312. }
  313. /*
  314. * Called from the idle thread for the CPU which has been shutdown.
  315. *
  316. */
  317. void cpu_die(void)
  318. {
  319. unsigned int cpu = smp_processor_id();
  320. const struct cpu_operations *ops = get_cpu_ops(cpu);
  321. idle_task_exit();
  322. local_daif_mask();
  323. /* Tell __cpu_die() that this CPU is now safe to dispose of */
  324. (void)cpu_report_death();
  325. /*
  326. * Actually shutdown the CPU. This must never fail. The specific hotplug
  327. * mechanism must perform all required cache maintenance to ensure that
  328. * no dirty lines are lost in the process of shutting down the CPU.
  329. */
  330. ops->cpu_die(cpu);
  331. BUG();
  332. }
  333. #endif
  334. static void __cpu_try_die(int cpu)
  335. {
  336. #ifdef CONFIG_HOTPLUG_CPU
  337. const struct cpu_operations *ops = get_cpu_ops(cpu);
  338. if (ops && ops->cpu_die)
  339. ops->cpu_die(cpu);
  340. #endif
  341. }
  342. /*
  343. * Kill the calling secondary CPU, early in bringup before it is turned
  344. * online.
  345. */
  346. void cpu_die_early(void)
  347. {
  348. int cpu = smp_processor_id();
  349. pr_crit("CPU%d: will not boot\n", cpu);
  350. /* Mark this CPU absent */
  351. set_cpu_present(cpu, 0);
  352. rcu_report_dead(cpu);
  353. if (IS_ENABLED(CONFIG_HOTPLUG_CPU)) {
  354. update_cpu_boot_status(CPU_KILL_ME);
  355. __cpu_try_die(cpu);
  356. }
  357. update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
  358. cpu_park_loop();
  359. }
  360. static void __init hyp_mode_check(void)
  361. {
  362. if (is_hyp_mode_available())
  363. pr_info("CPU: All CPU(s) started at EL2\n");
  364. else if (is_hyp_mode_mismatched())
  365. WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
  366. "CPU: CPUs started in inconsistent modes");
  367. else
  368. pr_info("CPU: All CPU(s) started at EL1\n");
  369. if (IS_ENABLED(CONFIG_KVM) && !is_kernel_in_hyp_mode()) {
  370. kvm_compute_layout();
  371. kvm_apply_hyp_relocations();
  372. }
  373. }
  374. void __init smp_cpus_done(unsigned int max_cpus)
  375. {
  376. pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
  377. setup_cpu_features();
  378. hyp_mode_check();
  379. apply_alternatives_all();
  380. mark_linear_text_alias_ro();
  381. }
  382. void __init smp_prepare_boot_cpu(void)
  383. {
  384. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  385. cpuinfo_store_boot_cpu();
  386. /*
  387. * We now know enough about the boot CPU to apply the
  388. * alternatives that cannot wait until interrupt handling
  389. * and/or scheduling is enabled.
  390. */
  391. apply_boot_alternatives();
  392. /* Conditionally switch to GIC PMR for interrupt masking */
  393. if (system_uses_irq_prio_masking())
  394. init_gic_priority_masking();
  395. kasan_init_hw_tags();
  396. }
  397. static u64 __init of_get_cpu_mpidr(struct device_node *dn)
  398. {
  399. const __be32 *cell;
  400. u64 hwid;
  401. /*
  402. * A cpu node with missing "reg" property is
  403. * considered invalid to build a cpu_logical_map
  404. * entry.
  405. */
  406. cell = of_get_property(dn, "reg", NULL);
  407. if (!cell) {
  408. pr_err("%pOF: missing reg property\n", dn);
  409. return INVALID_HWID;
  410. }
  411. hwid = of_read_number(cell, of_n_addr_cells(dn));
  412. /*
  413. * Non affinity bits must be set to 0 in the DT
  414. */
  415. if (hwid & ~MPIDR_HWID_BITMASK) {
  416. pr_err("%pOF: invalid reg property\n", dn);
  417. return INVALID_HWID;
  418. }
  419. return hwid;
  420. }
  421. /*
  422. * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
  423. * entries and check for duplicates. If any is found just ignore the
  424. * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
  425. * matching valid MPIDR values.
  426. */
  427. static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
  428. {
  429. unsigned int i;
  430. for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
  431. if (cpu_logical_map(i) == hwid)
  432. return true;
  433. return false;
  434. }
  435. /*
  436. * Initialize cpu operations for a logical cpu and
  437. * set it in the possible mask on success
  438. */
  439. static int __init smp_cpu_setup(int cpu)
  440. {
  441. const struct cpu_operations *ops;
  442. if (init_cpu_ops(cpu))
  443. return -ENODEV;
  444. ops = get_cpu_ops(cpu);
  445. if (ops->cpu_init(cpu))
  446. return -ENODEV;
  447. set_cpu_possible(cpu, true);
  448. return 0;
  449. }
  450. static bool bootcpu_valid __initdata;
  451. static unsigned int cpu_count = 1;
  452. #ifdef CONFIG_ACPI
  453. static struct acpi_madt_generic_interrupt cpu_madt_gicc[NR_CPUS];
  454. struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu)
  455. {
  456. return &cpu_madt_gicc[cpu];
  457. }
  458. /*
  459. * acpi_map_gic_cpu_interface - parse processor MADT entry
  460. *
  461. * Carry out sanity checks on MADT processor entry and initialize
  462. * cpu_logical_map on success
  463. */
  464. static void __init
  465. acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
  466. {
  467. u64 hwid = processor->arm_mpidr;
  468. if (!(processor->flags & ACPI_MADT_ENABLED)) {
  469. pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
  470. return;
  471. }
  472. if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
  473. pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
  474. return;
  475. }
  476. if (is_mpidr_duplicate(cpu_count, hwid)) {
  477. pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
  478. return;
  479. }
  480. /* Check if GICC structure of boot CPU is available in the MADT */
  481. if (cpu_logical_map(0) == hwid) {
  482. if (bootcpu_valid) {
  483. pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
  484. hwid);
  485. return;
  486. }
  487. bootcpu_valid = true;
  488. cpu_madt_gicc[0] = *processor;
  489. return;
  490. }
  491. if (cpu_count >= NR_CPUS)
  492. return;
  493. /* map the logical cpu id to cpu MPIDR */
  494. set_cpu_logical_map(cpu_count, hwid);
  495. cpu_madt_gicc[cpu_count] = *processor;
  496. /*
  497. * Set-up the ACPI parking protocol cpu entries
  498. * while initializing the cpu_logical_map to
  499. * avoid parsing MADT entries multiple times for
  500. * nothing (ie a valid cpu_logical_map entry should
  501. * contain a valid parking protocol data set to
  502. * initialize the cpu if the parking protocol is
  503. * the only available enable method).
  504. */
  505. acpi_set_mailbox_entry(cpu_count, processor);
  506. cpu_count++;
  507. }
  508. static int __init
  509. acpi_parse_gic_cpu_interface(union acpi_subtable_headers *header,
  510. const unsigned long end)
  511. {
  512. struct acpi_madt_generic_interrupt *processor;
  513. processor = (struct acpi_madt_generic_interrupt *)header;
  514. if (BAD_MADT_GICC_ENTRY(processor, end))
  515. return -EINVAL;
  516. acpi_table_print_madt_entry(&header->common);
  517. acpi_map_gic_cpu_interface(processor);
  518. return 0;
  519. }
  520. static void __init acpi_parse_and_init_cpus(void)
  521. {
  522. int i;
  523. /*
  524. * do a walk of MADT to determine how many CPUs
  525. * we have including disabled CPUs, and get information
  526. * we need for SMP init.
  527. */
  528. acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
  529. acpi_parse_gic_cpu_interface, 0);
  530. /*
  531. * In ACPI, SMP and CPU NUMA information is provided in separate
  532. * static tables, namely the MADT and the SRAT.
  533. *
  534. * Thus, it is simpler to first create the cpu logical map through
  535. * an MADT walk and then map the logical cpus to their node ids
  536. * as separate steps.
  537. */
  538. acpi_map_cpus_to_nodes();
  539. for (i = 0; i < nr_cpu_ids; i++)
  540. early_map_cpu_to_node(i, acpi_numa_get_nid(i));
  541. }
  542. #else
  543. #define acpi_parse_and_init_cpus(...) do { } while (0)
  544. #endif
  545. /*
  546. * Enumerate the possible CPU set from the device tree and build the
  547. * cpu logical map array containing MPIDR values related to logical
  548. * cpus. Assumes that cpu_logical_map(0) has already been initialized.
  549. */
  550. static void __init of_parse_and_init_cpus(void)
  551. {
  552. struct device_node *dn;
  553. for_each_of_cpu_node(dn) {
  554. u64 hwid = of_get_cpu_mpidr(dn);
  555. if (hwid == INVALID_HWID)
  556. goto next;
  557. if (is_mpidr_duplicate(cpu_count, hwid)) {
  558. pr_err("%pOF: duplicate cpu reg properties in the DT\n",
  559. dn);
  560. goto next;
  561. }
  562. /*
  563. * The numbering scheme requires that the boot CPU
  564. * must be assigned logical id 0. Record it so that
  565. * the logical map built from DT is validated and can
  566. * be used.
  567. */
  568. if (hwid == cpu_logical_map(0)) {
  569. if (bootcpu_valid) {
  570. pr_err("%pOF: duplicate boot cpu reg property in DT\n",
  571. dn);
  572. goto next;
  573. }
  574. bootcpu_valid = true;
  575. early_map_cpu_to_node(0, of_node_to_nid(dn));
  576. /*
  577. * cpu_logical_map has already been
  578. * initialized and the boot cpu doesn't need
  579. * the enable-method so continue without
  580. * incrementing cpu.
  581. */
  582. continue;
  583. }
  584. if (cpu_count >= NR_CPUS)
  585. goto next;
  586. pr_debug("cpu logical map 0x%llx\n", hwid);
  587. set_cpu_logical_map(cpu_count, hwid);
  588. early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
  589. next:
  590. cpu_count++;
  591. }
  592. }
  593. /*
  594. * Enumerate the possible CPU set from the device tree or ACPI and build the
  595. * cpu logical map array containing MPIDR values related to logical
  596. * cpus. Assumes that cpu_logical_map(0) has already been initialized.
  597. */
  598. void __init smp_init_cpus(void)
  599. {
  600. int i;
  601. if (acpi_disabled)
  602. of_parse_and_init_cpus();
  603. else
  604. acpi_parse_and_init_cpus();
  605. if (cpu_count > nr_cpu_ids)
  606. pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
  607. cpu_count, nr_cpu_ids);
  608. if (!bootcpu_valid) {
  609. pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
  610. return;
  611. }
  612. /*
  613. * We need to set the cpu_logical_map entries before enabling
  614. * the cpus so that cpu processor description entries (DT cpu nodes
  615. * and ACPI MADT entries) can be retrieved by matching the cpu hwid
  616. * with entries in cpu_logical_map while initializing the cpus.
  617. * If the cpu set-up fails, invalidate the cpu_logical_map entry.
  618. */
  619. for (i = 1; i < nr_cpu_ids; i++) {
  620. if (cpu_logical_map(i) != INVALID_HWID) {
  621. if (smp_cpu_setup(i))
  622. set_cpu_logical_map(i, INVALID_HWID);
  623. }
  624. }
  625. }
  626. void __init smp_prepare_cpus(unsigned int max_cpus)
  627. {
  628. const struct cpu_operations *ops;
  629. int err;
  630. unsigned int cpu;
  631. unsigned int this_cpu;
  632. init_cpu_topology();
  633. this_cpu = smp_processor_id();
  634. store_cpu_topology(this_cpu);
  635. numa_store_cpu_info(this_cpu);
  636. numa_add_cpu(this_cpu);
  637. /*
  638. * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
  639. * secondary CPUs present.
  640. */
  641. if (max_cpus == 0)
  642. return;
  643. /*
  644. * Initialise the present map (which describes the set of CPUs
  645. * actually populated at the present time) and release the
  646. * secondaries from the bootloader.
  647. */
  648. for_each_possible_cpu(cpu) {
  649. per_cpu(cpu_number, cpu) = cpu;
  650. if (cpu == smp_processor_id())
  651. continue;
  652. ops = get_cpu_ops(cpu);
  653. if (!ops)
  654. continue;
  655. err = ops->cpu_prepare(cpu);
  656. if (err)
  657. continue;
  658. set_cpu_present(cpu, true);
  659. numa_store_cpu_info(cpu);
  660. }
  661. }
  662. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  663. #define S(x,s) [x] = s
  664. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  665. S(IPI_CALL_FUNC, "Function call interrupts"),
  666. S(IPI_CPU_STOP, "CPU stop interrupts"),
  667. S(IPI_CPU_CRASH_STOP, "CPU stop (for crash dump) interrupts"),
  668. S(IPI_TIMER, "Timer broadcast interrupts"),
  669. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  670. S(IPI_WAKEUP, "CPU wake-up interrupts"),
  671. };
  672. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
  673. unsigned long irq_err_count;
  674. int arch_show_interrupts(struct seq_file *p, int prec)
  675. {
  676. unsigned int cpu, i;
  677. for (i = 0; i < NR_IPI; i++) {
  678. unsigned int irq = irq_desc_get_irq(ipi_desc[i]);
  679. seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
  680. prec >= 4 ? " " : "");
  681. for_each_online_cpu(cpu)
  682. seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
  683. seq_printf(p, " %s\n", ipi_types[i]);
  684. }
  685. seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
  686. return 0;
  687. }
  688. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  689. {
  690. smp_cross_call(mask, IPI_CALL_FUNC);
  691. }
  692. void arch_send_call_function_single_ipi(int cpu)
  693. {
  694. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
  695. }
  696. #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
  697. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  698. {
  699. smp_cross_call(mask, IPI_WAKEUP);
  700. }
  701. #endif
  702. #ifdef CONFIG_IRQ_WORK
  703. void arch_irq_work_raise(void)
  704. {
  705. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  706. }
  707. #endif
  708. static void local_cpu_stop(void)
  709. {
  710. set_cpu_online(smp_processor_id(), false);
  711. local_daif_mask();
  712. sdei_mask_local_cpu();
  713. cpu_park_loop();
  714. }
  715. /*
  716. * We need to implement panic_smp_self_stop() for parallel panic() calls, so
  717. * that cpu_online_mask gets correctly updated and smp_send_stop() can skip
  718. * CPUs that have already stopped themselves.
  719. */
  720. void panic_smp_self_stop(void)
  721. {
  722. local_cpu_stop();
  723. }
  724. #ifdef CONFIG_KEXEC_CORE
  725. static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
  726. #endif
  727. static void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
  728. {
  729. #ifdef CONFIG_KEXEC_CORE
  730. crash_save_cpu(regs, cpu);
  731. atomic_dec(&waiting_for_crash_ipi);
  732. local_irq_disable();
  733. sdei_mask_local_cpu();
  734. if (IS_ENABLED(CONFIG_HOTPLUG_CPU))
  735. __cpu_try_die(cpu);
  736. /* just in case */
  737. cpu_park_loop();
  738. #endif
  739. }
  740. /*
  741. * Main handler for inter-processor interrupts
  742. */
  743. static void do_handle_IPI(int ipinr)
  744. {
  745. unsigned int cpu = smp_processor_id();
  746. if ((unsigned)ipinr < NR_IPI)
  747. trace_ipi_entry_rcuidle(ipi_types[ipinr]);
  748. switch (ipinr) {
  749. case IPI_RESCHEDULE:
  750. scheduler_ipi();
  751. break;
  752. case IPI_CALL_FUNC:
  753. generic_smp_call_function_interrupt();
  754. break;
  755. case IPI_CPU_STOP:
  756. trace_android_vh_ipi_stop_rcuidle(get_irq_regs());
  757. local_cpu_stop();
  758. break;
  759. case IPI_CPU_CRASH_STOP:
  760. if (IS_ENABLED(CONFIG_KEXEC_CORE)) {
  761. ipi_cpu_crash_stop(cpu, get_irq_regs());
  762. unreachable();
  763. }
  764. break;
  765. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  766. case IPI_TIMER:
  767. tick_receive_broadcast();
  768. break;
  769. #endif
  770. #ifdef CONFIG_IRQ_WORK
  771. case IPI_IRQ_WORK:
  772. irq_work_run();
  773. break;
  774. #endif
  775. #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
  776. case IPI_WAKEUP:
  777. WARN_ONCE(!acpi_parking_protocol_valid(cpu),
  778. "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
  779. cpu);
  780. break;
  781. #endif
  782. default:
  783. pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
  784. break;
  785. }
  786. if ((unsigned)ipinr < NR_IPI)
  787. trace_ipi_exit_rcuidle(ipi_types[ipinr]);
  788. }
  789. static irqreturn_t ipi_handler(int irq, void *data)
  790. {
  791. do_handle_IPI(irq - ipi_irq_base);
  792. return IRQ_HANDLED;
  793. }
  794. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  795. {
  796. trace_ipi_raise(target, ipi_types[ipinr]);
  797. __ipi_send_mask(ipi_desc[ipinr], target);
  798. }
  799. static void ipi_setup(int cpu)
  800. {
  801. int i;
  802. if (WARN_ON_ONCE(!ipi_irq_base))
  803. return;
  804. for (i = 0; i < nr_ipi; i++)
  805. enable_percpu_irq(ipi_irq_base + i, 0);
  806. }
  807. #ifdef CONFIG_HOTPLUG_CPU
  808. static void ipi_teardown(int cpu)
  809. {
  810. int i;
  811. if (WARN_ON_ONCE(!ipi_irq_base))
  812. return;
  813. for (i = 0; i < nr_ipi; i++)
  814. disable_percpu_irq(ipi_irq_base + i);
  815. }
  816. #endif
  817. void __init set_smp_ipi_range(int ipi_base, int n)
  818. {
  819. int i;
  820. WARN_ON(n < NR_IPI);
  821. nr_ipi = min(n, NR_IPI);
  822. for (i = 0; i < nr_ipi; i++) {
  823. int err;
  824. err = request_percpu_irq(ipi_base + i, ipi_handler,
  825. "IPI", &cpu_number);
  826. WARN_ON(err);
  827. ipi_desc[i] = irq_to_desc(ipi_base + i);
  828. irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
  829. /* The recheduling IPI is special... */
  830. if (i == IPI_RESCHEDULE)
  831. __irq_modify_status(ipi_base + i, 0, IRQ_RAW, ~0);
  832. }
  833. ipi_irq_base = ipi_base;
  834. /* Setup the boot CPU immediately */
  835. ipi_setup(smp_processor_id());
  836. }
  837. void smp_send_reschedule(int cpu)
  838. {
  839. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  840. }
  841. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  842. void tick_broadcast(const struct cpumask *mask)
  843. {
  844. smp_cross_call(mask, IPI_TIMER);
  845. }
  846. #endif
  847. /*
  848. * The number of CPUs online, not counting this CPU (which may not be
  849. * fully online and so not counted in num_online_cpus()).
  850. */
  851. static inline unsigned int num_other_online_cpus(void)
  852. {
  853. unsigned int this_cpu_online = cpu_online(smp_processor_id());
  854. return num_online_cpus() - this_cpu_online;
  855. }
  856. void smp_send_stop(void)
  857. {
  858. unsigned long timeout;
  859. if (num_other_online_cpus()) {
  860. cpumask_t mask;
  861. cpumask_copy(&mask, cpu_online_mask);
  862. cpumask_clear_cpu(smp_processor_id(), &mask);
  863. if (system_state <= SYSTEM_RUNNING)
  864. pr_crit("SMP: stopping secondary CPUs\n");
  865. smp_cross_call(&mask, IPI_CPU_STOP);
  866. }
  867. /* Wait up to one second for other CPUs to stop */
  868. timeout = USEC_PER_SEC;
  869. while (num_other_online_cpus() && timeout--)
  870. udelay(1);
  871. if (num_other_online_cpus())
  872. pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
  873. cpumask_pr_args(cpu_online_mask));
  874. sdei_mask_local_cpu();
  875. }
  876. #ifdef CONFIG_KEXEC_CORE
  877. void crash_smp_send_stop(void)
  878. {
  879. static int cpus_stopped;
  880. cpumask_t mask;
  881. unsigned long timeout;
  882. /*
  883. * This function can be called twice in panic path, but obviously
  884. * we execute this only once.
  885. */
  886. if (cpus_stopped)
  887. return;
  888. cpus_stopped = 1;
  889. /*
  890. * If this cpu is the only one alive at this point in time, online or
  891. * not, there are no stop messages to be sent around, so just back out.
  892. */
  893. if (num_other_online_cpus() == 0) {
  894. sdei_mask_local_cpu();
  895. return;
  896. }
  897. cpumask_copy(&mask, cpu_online_mask);
  898. cpumask_clear_cpu(smp_processor_id(), &mask);
  899. atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
  900. pr_crit("SMP: stopping secondary CPUs\n");
  901. smp_cross_call(&mask, IPI_CPU_CRASH_STOP);
  902. /* Wait up to one second for other CPUs to stop */
  903. timeout = USEC_PER_SEC;
  904. while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
  905. udelay(1);
  906. if (atomic_read(&waiting_for_crash_ipi) > 0)
  907. pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
  908. cpumask_pr_args(&mask));
  909. sdei_mask_local_cpu();
  910. }
  911. bool smp_crash_stop_failed(void)
  912. {
  913. return (atomic_read(&waiting_for_crash_ipi) > 0);
  914. }
  915. #endif
  916. /*
  917. * not supported here
  918. */
  919. int setup_profiling_timer(unsigned int multiplier)
  920. {
  921. return -EINVAL;
  922. }
  923. static bool have_cpu_die(void)
  924. {
  925. #ifdef CONFIG_HOTPLUG_CPU
  926. int any_cpu = raw_smp_processor_id();
  927. const struct cpu_operations *ops = get_cpu_ops(any_cpu);
  928. if (ops && ops->cpu_die)
  929. return true;
  930. #endif
  931. return false;
  932. }
  933. bool cpus_are_stuck_in_kernel(void)
  934. {
  935. bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
  936. return !!cpus_stuck_in_kernel || smp_spin_tables;
  937. }
  938. int nr_ipi_get(void)
  939. {
  940. return nr_ipi;
  941. }
  942. EXPORT_SYMBOL_GPL(nr_ipi_get);
  943. struct irq_desc **ipi_desc_get(void)
  944. {
  945. return ipi_desc;
  946. }
  947. EXPORT_SYMBOL_GPL(ipi_desc_get);