sleep.S 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #include <linux/errno.h>
  3. #include <linux/linkage.h>
  4. #include <asm/asm-offsets.h>
  5. #include <asm/assembler.h>
  6. #include <asm/smp.h>
  7. .text
  8. /*
  9. * Implementation of MPIDR_EL1 hash algorithm through shifting
  10. * and OR'ing.
  11. *
  12. * @dst: register containing hash result
  13. * @rs0: register containing affinity level 0 bit shift
  14. * @rs1: register containing affinity level 1 bit shift
  15. * @rs2: register containing affinity level 2 bit shift
  16. * @rs3: register containing affinity level 3 bit shift
  17. * @mpidr: register containing MPIDR_EL1 value
  18. * @mask: register containing MPIDR mask
  19. *
  20. * Pseudo C-code:
  21. *
  22. *u32 dst;
  23. *
  24. *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
  25. * u32 aff0, aff1, aff2, aff3;
  26. * u64 mpidr_masked = mpidr & mask;
  27. * aff0 = mpidr_masked & 0xff;
  28. * aff1 = mpidr_masked & 0xff00;
  29. * aff2 = mpidr_masked & 0xff0000;
  30. * aff3 = mpidr_masked & 0xff00000000;
  31. * dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
  32. *}
  33. * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
  34. * Output register: dst
  35. * Note: input and output registers must be disjoint register sets
  36. (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
  37. */
  38. .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
  39. and \mpidr, \mpidr, \mask // mask out MPIDR bits
  40. and \dst, \mpidr, #0xff // mask=aff0
  41. lsr \dst ,\dst, \rs0 // dst=aff0>>rs0
  42. and \mask, \mpidr, #0xff00 // mask = aff1
  43. lsr \mask ,\mask, \rs1
  44. orr \dst, \dst, \mask // dst|=(aff1>>rs1)
  45. and \mask, \mpidr, #0xff0000 // mask = aff2
  46. lsr \mask ,\mask, \rs2
  47. orr \dst, \dst, \mask // dst|=(aff2>>rs2)
  48. and \mask, \mpidr, #0xff00000000 // mask = aff3
  49. lsr \mask ,\mask, \rs3
  50. orr \dst, \dst, \mask // dst|=(aff3>>rs3)
  51. .endm
  52. /*
  53. * Save CPU state in the provided sleep_stack_data area, and publish its
  54. * location for cpu_resume()'s use in sleep_save_stash.
  55. *
  56. * cpu_resume() will restore this saved state, and return. Because the
  57. * link-register is saved and restored, it will appear to return from this
  58. * function. So that the caller can tell the suspend/resume paths apart,
  59. * __cpu_suspend_enter() will always return a non-zero value, whereas the
  60. * path through cpu_resume() will return 0.
  61. *
  62. * x0 = struct sleep_stack_data area
  63. */
  64. SYM_FUNC_START(__cpu_suspend_enter)
  65. stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
  66. stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
  67. stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
  68. stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
  69. stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
  70. stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
  71. /* save the sp in cpu_suspend_ctx */
  72. mov x2, sp
  73. str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
  74. /* find the mpidr_hash */
  75. ldr_l x1, sleep_save_stash
  76. mrs x7, mpidr_el1
  77. adr_l x9, mpidr_hash
  78. ldr x10, [x9, #MPIDR_HASH_MASK]
  79. /*
  80. * Following code relies on the struct mpidr_hash
  81. * members size.
  82. */
  83. ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS]
  84. ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
  85. compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
  86. add x1, x1, x8, lsl #3
  87. str x0, [x1]
  88. add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
  89. stp x29, lr, [sp, #-16]!
  90. bl cpu_do_suspend
  91. ldp x29, lr, [sp], #16
  92. mov x0, #1
  93. ret
  94. SYM_FUNC_END(__cpu_suspend_enter)
  95. .pushsection ".idmap.text", "awx"
  96. SYM_CODE_START(cpu_resume)
  97. bl init_kernel_el
  98. bl switch_to_vhe
  99. bl __cpu_setup
  100. /* enable the MMU early - so we can access sleep_save_stash by va */
  101. adrp x1, swapper_pg_dir
  102. bl __enable_mmu
  103. ldr x8, =_cpu_resume
  104. br x8
  105. SYM_CODE_END(cpu_resume)
  106. .ltorg
  107. .popsection
  108. SYM_FUNC_START(_cpu_resume)
  109. mrs x1, mpidr_el1
  110. adr_l x8, mpidr_hash // x8 = struct mpidr_hash virt address
  111. /* retrieve mpidr_hash members to compute the hash */
  112. ldr x2, [x8, #MPIDR_HASH_MASK]
  113. ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
  114. ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
  115. compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
  116. /* x7 contains hash index, let's use it to grab context pointer */
  117. ldr_l x0, sleep_save_stash
  118. ldr x0, [x0, x7, lsl #3]
  119. add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
  120. add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
  121. /* load sp from context */
  122. ldr x2, [x0, #CPU_CTX_SP]
  123. mov sp, x2
  124. /*
  125. * cpu_do_resume expects x0 to contain context address pointer
  126. */
  127. bl cpu_do_resume
  128. #if defined(CONFIG_KASAN) && defined(CONFIG_KASAN_STACK)
  129. mov x0, sp
  130. bl kasan_unpoison_task_stack_below
  131. #endif
  132. ldp x19, x20, [x29, #16]
  133. ldp x21, x22, [x29, #32]
  134. ldp x23, x24, [x29, #48]
  135. ldp x25, x26, [x29, #64]
  136. ldp x27, x28, [x29, #80]
  137. ldp x29, lr, [x29]
  138. mov x0, #0
  139. ret
  140. SYM_FUNC_END(_cpu_resume)