ptrace.c 46 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Based on arch/arm/kernel/ptrace.c
  4. *
  5. * By Ross Biro 1/23/92
  6. * edited by Linus Torvalds
  7. * ARM modifications Copyright (C) 2000 Russell King
  8. * Copyright (C) 2012 ARM Ltd.
  9. */
  10. #include <linux/audit.h>
  11. #include <linux/compat.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched/signal.h>
  14. #include <linux/sched/task_stack.h>
  15. #include <linux/mm.h>
  16. #include <linux/nospec.h>
  17. #include <linux/smp.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/user.h>
  20. #include <linux/seccomp.h>
  21. #include <linux/security.h>
  22. #include <linux/init.h>
  23. #include <linux/signal.h>
  24. #include <linux/string.h>
  25. #include <linux/uaccess.h>
  26. #include <linux/perf_event.h>
  27. #include <linux/hw_breakpoint.h>
  28. #include <linux/regset.h>
  29. #include <linux/tracehook.h>
  30. #include <linux/elf.h>
  31. #include <asm/compat.h>
  32. #include <asm/cpufeature.h>
  33. #include <asm/debug-monitors.h>
  34. #include <asm/fpsimd.h>
  35. #include <asm/mte.h>
  36. #include <asm/pointer_auth.h>
  37. #include <asm/stacktrace.h>
  38. #include <asm/syscall.h>
  39. #include <asm/traps.h>
  40. #include <asm/system_misc.h>
  41. #define CREATE_TRACE_POINTS
  42. #include <trace/events/syscalls.h>
  43. struct pt_regs_offset {
  44. const char *name;
  45. int offset;
  46. };
  47. #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  48. #define REG_OFFSET_END {.name = NULL, .offset = 0}
  49. #define GPR_OFFSET_NAME(r) \
  50. {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
  51. static const struct pt_regs_offset regoffset_table[] = {
  52. GPR_OFFSET_NAME(0),
  53. GPR_OFFSET_NAME(1),
  54. GPR_OFFSET_NAME(2),
  55. GPR_OFFSET_NAME(3),
  56. GPR_OFFSET_NAME(4),
  57. GPR_OFFSET_NAME(5),
  58. GPR_OFFSET_NAME(6),
  59. GPR_OFFSET_NAME(7),
  60. GPR_OFFSET_NAME(8),
  61. GPR_OFFSET_NAME(9),
  62. GPR_OFFSET_NAME(10),
  63. GPR_OFFSET_NAME(11),
  64. GPR_OFFSET_NAME(12),
  65. GPR_OFFSET_NAME(13),
  66. GPR_OFFSET_NAME(14),
  67. GPR_OFFSET_NAME(15),
  68. GPR_OFFSET_NAME(16),
  69. GPR_OFFSET_NAME(17),
  70. GPR_OFFSET_NAME(18),
  71. GPR_OFFSET_NAME(19),
  72. GPR_OFFSET_NAME(20),
  73. GPR_OFFSET_NAME(21),
  74. GPR_OFFSET_NAME(22),
  75. GPR_OFFSET_NAME(23),
  76. GPR_OFFSET_NAME(24),
  77. GPR_OFFSET_NAME(25),
  78. GPR_OFFSET_NAME(26),
  79. GPR_OFFSET_NAME(27),
  80. GPR_OFFSET_NAME(28),
  81. GPR_OFFSET_NAME(29),
  82. GPR_OFFSET_NAME(30),
  83. {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
  84. REG_OFFSET_NAME(sp),
  85. REG_OFFSET_NAME(pc),
  86. REG_OFFSET_NAME(pstate),
  87. REG_OFFSET_END,
  88. };
  89. /**
  90. * regs_query_register_offset() - query register offset from its name
  91. * @name: the name of a register
  92. *
  93. * regs_query_register_offset() returns the offset of a register in struct
  94. * pt_regs from its name. If the name is invalid, this returns -EINVAL;
  95. */
  96. int regs_query_register_offset(const char *name)
  97. {
  98. const struct pt_regs_offset *roff;
  99. for (roff = regoffset_table; roff->name != NULL; roff++)
  100. if (!strcmp(roff->name, name))
  101. return roff->offset;
  102. return -EINVAL;
  103. }
  104. /**
  105. * regs_within_kernel_stack() - check the address in the stack
  106. * @regs: pt_regs which contains kernel stack pointer.
  107. * @addr: address which is checked.
  108. *
  109. * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
  110. * If @addr is within the kernel stack, it returns true. If not, returns false.
  111. */
  112. static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
  113. {
  114. return ((addr & ~(THREAD_SIZE - 1)) ==
  115. (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
  116. on_irq_stack(addr, NULL);
  117. }
  118. /**
  119. * regs_get_kernel_stack_nth() - get Nth entry of the stack
  120. * @regs: pt_regs which contains kernel stack pointer.
  121. * @n: stack entry number.
  122. *
  123. * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
  124. * is specified by @regs. If the @n th entry is NOT in the kernel stack,
  125. * this returns 0.
  126. */
  127. unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
  128. {
  129. unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
  130. addr += n;
  131. if (regs_within_kernel_stack(regs, (unsigned long)addr))
  132. return *addr;
  133. else
  134. return 0;
  135. }
  136. /*
  137. * TODO: does not yet catch signals sent when the child dies.
  138. * in exit.c or in signal.c.
  139. */
  140. /*
  141. * Called by kernel/ptrace.c when detaching..
  142. */
  143. void ptrace_disable(struct task_struct *child)
  144. {
  145. /*
  146. * This would be better off in core code, but PTRACE_DETACH has
  147. * grown its fair share of arch-specific worts and changing it
  148. * is likely to cause regressions on obscure architectures.
  149. */
  150. user_disable_single_step(child);
  151. }
  152. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  153. /*
  154. * Handle hitting a HW-breakpoint.
  155. */
  156. static void ptrace_hbptriggered(struct perf_event *bp,
  157. struct perf_sample_data *data,
  158. struct pt_regs *regs)
  159. {
  160. struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
  161. const char *desc = "Hardware breakpoint trap (ptrace)";
  162. #ifdef CONFIG_COMPAT
  163. if (is_compat_task()) {
  164. int si_errno = 0;
  165. int i;
  166. for (i = 0; i < ARM_MAX_BRP; ++i) {
  167. if (current->thread.debug.hbp_break[i] == bp) {
  168. si_errno = (i << 1) + 1;
  169. break;
  170. }
  171. }
  172. for (i = 0; i < ARM_MAX_WRP; ++i) {
  173. if (current->thread.debug.hbp_watch[i] == bp) {
  174. si_errno = -((i << 1) + 1);
  175. break;
  176. }
  177. }
  178. arm64_force_sig_ptrace_errno_trap(si_errno, bkpt->trigger,
  179. desc);
  180. }
  181. #endif
  182. arm64_force_sig_fault(SIGTRAP, TRAP_HWBKPT, bkpt->trigger, desc);
  183. }
  184. /*
  185. * Unregister breakpoints from this task and reset the pointers in
  186. * the thread_struct.
  187. */
  188. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  189. {
  190. int i;
  191. struct thread_struct *t = &tsk->thread;
  192. for (i = 0; i < ARM_MAX_BRP; i++) {
  193. if (t->debug.hbp_break[i]) {
  194. unregister_hw_breakpoint(t->debug.hbp_break[i]);
  195. t->debug.hbp_break[i] = NULL;
  196. }
  197. }
  198. for (i = 0; i < ARM_MAX_WRP; i++) {
  199. if (t->debug.hbp_watch[i]) {
  200. unregister_hw_breakpoint(t->debug.hbp_watch[i]);
  201. t->debug.hbp_watch[i] = NULL;
  202. }
  203. }
  204. }
  205. void ptrace_hw_copy_thread(struct task_struct *tsk)
  206. {
  207. memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
  208. }
  209. static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
  210. struct task_struct *tsk,
  211. unsigned long idx)
  212. {
  213. struct perf_event *bp = ERR_PTR(-EINVAL);
  214. switch (note_type) {
  215. case NT_ARM_HW_BREAK:
  216. if (idx >= ARM_MAX_BRP)
  217. goto out;
  218. idx = array_index_nospec(idx, ARM_MAX_BRP);
  219. bp = tsk->thread.debug.hbp_break[idx];
  220. break;
  221. case NT_ARM_HW_WATCH:
  222. if (idx >= ARM_MAX_WRP)
  223. goto out;
  224. idx = array_index_nospec(idx, ARM_MAX_WRP);
  225. bp = tsk->thread.debug.hbp_watch[idx];
  226. break;
  227. }
  228. out:
  229. return bp;
  230. }
  231. static int ptrace_hbp_set_event(unsigned int note_type,
  232. struct task_struct *tsk,
  233. unsigned long idx,
  234. struct perf_event *bp)
  235. {
  236. int err = -EINVAL;
  237. switch (note_type) {
  238. case NT_ARM_HW_BREAK:
  239. if (idx >= ARM_MAX_BRP)
  240. goto out;
  241. idx = array_index_nospec(idx, ARM_MAX_BRP);
  242. tsk->thread.debug.hbp_break[idx] = bp;
  243. err = 0;
  244. break;
  245. case NT_ARM_HW_WATCH:
  246. if (idx >= ARM_MAX_WRP)
  247. goto out;
  248. idx = array_index_nospec(idx, ARM_MAX_WRP);
  249. tsk->thread.debug.hbp_watch[idx] = bp;
  250. err = 0;
  251. break;
  252. }
  253. out:
  254. return err;
  255. }
  256. static struct perf_event *ptrace_hbp_create(unsigned int note_type,
  257. struct task_struct *tsk,
  258. unsigned long idx)
  259. {
  260. struct perf_event *bp;
  261. struct perf_event_attr attr;
  262. int err, type;
  263. switch (note_type) {
  264. case NT_ARM_HW_BREAK:
  265. type = HW_BREAKPOINT_X;
  266. break;
  267. case NT_ARM_HW_WATCH:
  268. type = HW_BREAKPOINT_RW;
  269. break;
  270. default:
  271. return ERR_PTR(-EINVAL);
  272. }
  273. ptrace_breakpoint_init(&attr);
  274. /*
  275. * Initialise fields to sane defaults
  276. * (i.e. values that will pass validation).
  277. */
  278. attr.bp_addr = 0;
  279. attr.bp_len = HW_BREAKPOINT_LEN_4;
  280. attr.bp_type = type;
  281. attr.disabled = 1;
  282. bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
  283. if (IS_ERR(bp))
  284. return bp;
  285. err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
  286. if (err)
  287. return ERR_PTR(err);
  288. return bp;
  289. }
  290. static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
  291. struct arch_hw_breakpoint_ctrl ctrl,
  292. struct perf_event_attr *attr)
  293. {
  294. int err, len, type, offset, disabled = !ctrl.enabled;
  295. attr->disabled = disabled;
  296. if (disabled)
  297. return 0;
  298. err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
  299. if (err)
  300. return err;
  301. switch (note_type) {
  302. case NT_ARM_HW_BREAK:
  303. if ((type & HW_BREAKPOINT_X) != type)
  304. return -EINVAL;
  305. break;
  306. case NT_ARM_HW_WATCH:
  307. if ((type & HW_BREAKPOINT_RW) != type)
  308. return -EINVAL;
  309. break;
  310. default:
  311. return -EINVAL;
  312. }
  313. attr->bp_len = len;
  314. attr->bp_type = type;
  315. attr->bp_addr += offset;
  316. return 0;
  317. }
  318. static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
  319. {
  320. u8 num;
  321. u32 reg = 0;
  322. switch (note_type) {
  323. case NT_ARM_HW_BREAK:
  324. num = hw_breakpoint_slots(TYPE_INST);
  325. break;
  326. case NT_ARM_HW_WATCH:
  327. num = hw_breakpoint_slots(TYPE_DATA);
  328. break;
  329. default:
  330. return -EINVAL;
  331. }
  332. reg |= debug_monitors_arch();
  333. reg <<= 8;
  334. reg |= num;
  335. *info = reg;
  336. return 0;
  337. }
  338. static int ptrace_hbp_get_ctrl(unsigned int note_type,
  339. struct task_struct *tsk,
  340. unsigned long idx,
  341. u32 *ctrl)
  342. {
  343. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  344. if (IS_ERR(bp))
  345. return PTR_ERR(bp);
  346. *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
  347. return 0;
  348. }
  349. static int ptrace_hbp_get_addr(unsigned int note_type,
  350. struct task_struct *tsk,
  351. unsigned long idx,
  352. u64 *addr)
  353. {
  354. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  355. if (IS_ERR(bp))
  356. return PTR_ERR(bp);
  357. *addr = bp ? counter_arch_bp(bp)->address : 0;
  358. return 0;
  359. }
  360. static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
  361. struct task_struct *tsk,
  362. unsigned long idx)
  363. {
  364. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  365. if (!bp)
  366. bp = ptrace_hbp_create(note_type, tsk, idx);
  367. return bp;
  368. }
  369. static int ptrace_hbp_set_ctrl(unsigned int note_type,
  370. struct task_struct *tsk,
  371. unsigned long idx,
  372. u32 uctrl)
  373. {
  374. int err;
  375. struct perf_event *bp;
  376. struct perf_event_attr attr;
  377. struct arch_hw_breakpoint_ctrl ctrl;
  378. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  379. if (IS_ERR(bp)) {
  380. err = PTR_ERR(bp);
  381. return err;
  382. }
  383. attr = bp->attr;
  384. decode_ctrl_reg(uctrl, &ctrl);
  385. err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
  386. if (err)
  387. return err;
  388. return modify_user_hw_breakpoint(bp, &attr);
  389. }
  390. static int ptrace_hbp_set_addr(unsigned int note_type,
  391. struct task_struct *tsk,
  392. unsigned long idx,
  393. u64 addr)
  394. {
  395. int err;
  396. struct perf_event *bp;
  397. struct perf_event_attr attr;
  398. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  399. if (IS_ERR(bp)) {
  400. err = PTR_ERR(bp);
  401. return err;
  402. }
  403. attr = bp->attr;
  404. attr.bp_addr = addr;
  405. err = modify_user_hw_breakpoint(bp, &attr);
  406. return err;
  407. }
  408. #define PTRACE_HBP_ADDR_SZ sizeof(u64)
  409. #define PTRACE_HBP_CTRL_SZ sizeof(u32)
  410. #define PTRACE_HBP_PAD_SZ sizeof(u32)
  411. static int hw_break_get(struct task_struct *target,
  412. const struct user_regset *regset,
  413. struct membuf to)
  414. {
  415. unsigned int note_type = regset->core_note_type;
  416. int ret, idx = 0;
  417. u32 info, ctrl;
  418. u64 addr;
  419. /* Resource info */
  420. ret = ptrace_hbp_get_resource_info(note_type, &info);
  421. if (ret)
  422. return ret;
  423. membuf_write(&to, &info, sizeof(info));
  424. membuf_zero(&to, sizeof(u32));
  425. /* (address, ctrl) registers */
  426. while (to.left) {
  427. ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
  428. if (ret)
  429. return ret;
  430. ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
  431. if (ret)
  432. return ret;
  433. membuf_store(&to, addr);
  434. membuf_store(&to, ctrl);
  435. membuf_zero(&to, sizeof(u32));
  436. idx++;
  437. }
  438. return 0;
  439. }
  440. static int hw_break_set(struct task_struct *target,
  441. const struct user_regset *regset,
  442. unsigned int pos, unsigned int count,
  443. const void *kbuf, const void __user *ubuf)
  444. {
  445. unsigned int note_type = regset->core_note_type;
  446. int ret, idx = 0, offset, limit;
  447. u32 ctrl;
  448. u64 addr;
  449. /* Resource info and pad */
  450. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  451. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
  452. if (ret)
  453. return ret;
  454. /* (address, ctrl) registers */
  455. limit = regset->n * regset->size;
  456. while (count && offset < limit) {
  457. if (count < PTRACE_HBP_ADDR_SZ)
  458. return -EINVAL;
  459. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
  460. offset, offset + PTRACE_HBP_ADDR_SZ);
  461. if (ret)
  462. return ret;
  463. ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
  464. if (ret)
  465. return ret;
  466. offset += PTRACE_HBP_ADDR_SZ;
  467. if (!count)
  468. break;
  469. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
  470. offset, offset + PTRACE_HBP_CTRL_SZ);
  471. if (ret)
  472. return ret;
  473. ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
  474. if (ret)
  475. return ret;
  476. offset += PTRACE_HBP_CTRL_SZ;
  477. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
  478. offset,
  479. offset + PTRACE_HBP_PAD_SZ);
  480. if (ret)
  481. return ret;
  482. offset += PTRACE_HBP_PAD_SZ;
  483. idx++;
  484. }
  485. return 0;
  486. }
  487. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  488. static int gpr_get(struct task_struct *target,
  489. const struct user_regset *regset,
  490. struct membuf to)
  491. {
  492. struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
  493. return membuf_write(&to, uregs, sizeof(*uregs));
  494. }
  495. static int gpr_set(struct task_struct *target, const struct user_regset *regset,
  496. unsigned int pos, unsigned int count,
  497. const void *kbuf, const void __user *ubuf)
  498. {
  499. int ret;
  500. struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
  501. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
  502. if (ret)
  503. return ret;
  504. if (!valid_user_regs(&newregs, target))
  505. return -EINVAL;
  506. task_pt_regs(target)->user_regs = newregs;
  507. return 0;
  508. }
  509. static int fpr_active(struct task_struct *target, const struct user_regset *regset)
  510. {
  511. if (!system_supports_fpsimd())
  512. return -ENODEV;
  513. return regset->n;
  514. }
  515. /*
  516. * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
  517. */
  518. static int __fpr_get(struct task_struct *target,
  519. const struct user_regset *regset,
  520. struct membuf to)
  521. {
  522. struct user_fpsimd_state *uregs;
  523. sve_sync_to_fpsimd(target);
  524. uregs = &target->thread.uw.fpsimd_state;
  525. return membuf_write(&to, uregs, sizeof(*uregs));
  526. }
  527. static int fpr_get(struct task_struct *target, const struct user_regset *regset,
  528. struct membuf to)
  529. {
  530. if (!system_supports_fpsimd())
  531. return -EINVAL;
  532. if (target == current)
  533. fpsimd_preserve_current_state();
  534. return __fpr_get(target, regset, to);
  535. }
  536. static int __fpr_set(struct task_struct *target,
  537. const struct user_regset *regset,
  538. unsigned int pos, unsigned int count,
  539. const void *kbuf, const void __user *ubuf,
  540. unsigned int start_pos)
  541. {
  542. int ret;
  543. struct user_fpsimd_state newstate;
  544. /*
  545. * Ensure target->thread.uw.fpsimd_state is up to date, so that a
  546. * short copyin can't resurrect stale data.
  547. */
  548. sve_sync_to_fpsimd(target);
  549. newstate = target->thread.uw.fpsimd_state;
  550. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
  551. start_pos, start_pos + sizeof(newstate));
  552. if (ret)
  553. return ret;
  554. target->thread.uw.fpsimd_state = newstate;
  555. return ret;
  556. }
  557. static int fpr_set(struct task_struct *target, const struct user_regset *regset,
  558. unsigned int pos, unsigned int count,
  559. const void *kbuf, const void __user *ubuf)
  560. {
  561. int ret;
  562. if (!system_supports_fpsimd())
  563. return -EINVAL;
  564. ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
  565. if (ret)
  566. return ret;
  567. sve_sync_from_fpsimd_zeropad(target);
  568. fpsimd_flush_task_state(target);
  569. return ret;
  570. }
  571. static int tls_get(struct task_struct *target, const struct user_regset *regset,
  572. struct membuf to)
  573. {
  574. if (target == current)
  575. tls_preserve_current_state();
  576. return membuf_store(&to, target->thread.uw.tp_value);
  577. }
  578. static int tls_set(struct task_struct *target, const struct user_regset *regset,
  579. unsigned int pos, unsigned int count,
  580. const void *kbuf, const void __user *ubuf)
  581. {
  582. int ret;
  583. unsigned long tls = target->thread.uw.tp_value;
  584. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  585. if (ret)
  586. return ret;
  587. target->thread.uw.tp_value = tls;
  588. return ret;
  589. }
  590. static int system_call_get(struct task_struct *target,
  591. const struct user_regset *regset,
  592. struct membuf to)
  593. {
  594. return membuf_store(&to, task_pt_regs(target)->syscallno);
  595. }
  596. static int system_call_set(struct task_struct *target,
  597. const struct user_regset *regset,
  598. unsigned int pos, unsigned int count,
  599. const void *kbuf, const void __user *ubuf)
  600. {
  601. int syscallno = task_pt_regs(target)->syscallno;
  602. int ret;
  603. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
  604. if (ret)
  605. return ret;
  606. task_pt_regs(target)->syscallno = syscallno;
  607. return ret;
  608. }
  609. #ifdef CONFIG_ARM64_SVE
  610. static void sve_init_header_from_task(struct user_sve_header *header,
  611. struct task_struct *target)
  612. {
  613. unsigned int vq;
  614. memset(header, 0, sizeof(*header));
  615. header->flags = test_tsk_thread_flag(target, TIF_SVE) ?
  616. SVE_PT_REGS_SVE : SVE_PT_REGS_FPSIMD;
  617. if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
  618. header->flags |= SVE_PT_VL_INHERIT;
  619. header->vl = target->thread.sve_vl;
  620. vq = sve_vq_from_vl(header->vl);
  621. header->max_vl = sve_max_vl;
  622. header->size = SVE_PT_SIZE(vq, header->flags);
  623. header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl),
  624. SVE_PT_REGS_SVE);
  625. }
  626. static unsigned int sve_size_from_header(struct user_sve_header const *header)
  627. {
  628. return ALIGN(header->size, SVE_VQ_BYTES);
  629. }
  630. static int sve_get(struct task_struct *target,
  631. const struct user_regset *regset,
  632. struct membuf to)
  633. {
  634. struct user_sve_header header;
  635. unsigned int vq;
  636. unsigned long start, end;
  637. if (!system_supports_sve())
  638. return -EINVAL;
  639. /* Header */
  640. sve_init_header_from_task(&header, target);
  641. vq = sve_vq_from_vl(header.vl);
  642. membuf_write(&to, &header, sizeof(header));
  643. if (target == current)
  644. fpsimd_preserve_current_state();
  645. /* Registers: FPSIMD-only case */
  646. BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
  647. if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD)
  648. return __fpr_get(target, regset, to);
  649. /* Otherwise: full SVE case */
  650. BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
  651. start = SVE_PT_SVE_OFFSET;
  652. end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
  653. membuf_write(&to, target->thread.sve_state, end - start);
  654. start = end;
  655. end = SVE_PT_SVE_FPSR_OFFSET(vq);
  656. membuf_zero(&to, end - start);
  657. /*
  658. * Copy fpsr, and fpcr which must follow contiguously in
  659. * struct fpsimd_state:
  660. */
  661. start = end;
  662. end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
  663. membuf_write(&to, &target->thread.uw.fpsimd_state.fpsr, end - start);
  664. start = end;
  665. end = sve_size_from_header(&header);
  666. return membuf_zero(&to, end - start);
  667. }
  668. static int sve_set(struct task_struct *target,
  669. const struct user_regset *regset,
  670. unsigned int pos, unsigned int count,
  671. const void *kbuf, const void __user *ubuf)
  672. {
  673. int ret;
  674. struct user_sve_header header;
  675. unsigned int vq;
  676. unsigned long start, end;
  677. if (!system_supports_sve())
  678. return -EINVAL;
  679. /* Header */
  680. if (count < sizeof(header))
  681. return -EINVAL;
  682. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
  683. 0, sizeof(header));
  684. if (ret)
  685. goto out;
  686. /*
  687. * Apart from SVE_PT_REGS_MASK, all SVE_PT_* flags are consumed by
  688. * sve_set_vector_length(), which will also validate them for us:
  689. */
  690. ret = sve_set_vector_length(target, header.vl,
  691. ((unsigned long)header.flags & ~SVE_PT_REGS_MASK) << 16);
  692. if (ret)
  693. goto out;
  694. /* Actual VL set may be less than the user asked for: */
  695. vq = sve_vq_from_vl(target->thread.sve_vl);
  696. /* Registers: FPSIMD-only case */
  697. BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
  698. if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {
  699. ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,
  700. SVE_PT_FPSIMD_OFFSET);
  701. clear_tsk_thread_flag(target, TIF_SVE);
  702. goto out;
  703. }
  704. /* Otherwise: full SVE case */
  705. /*
  706. * If setting a different VL from the requested VL and there is
  707. * register data, the data layout will be wrong: don't even
  708. * try to set the registers in this case.
  709. */
  710. if (count && vq != sve_vq_from_vl(header.vl)) {
  711. ret = -EIO;
  712. goto out;
  713. }
  714. sve_alloc(target);
  715. /*
  716. * Ensure target->thread.sve_state is up to date with target's
  717. * FPSIMD regs, so that a short copyin leaves trailing registers
  718. * unmodified.
  719. */
  720. fpsimd_sync_to_sve(target);
  721. set_tsk_thread_flag(target, TIF_SVE);
  722. BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
  723. start = SVE_PT_SVE_OFFSET;
  724. end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
  725. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  726. target->thread.sve_state,
  727. start, end);
  728. if (ret)
  729. goto out;
  730. start = end;
  731. end = SVE_PT_SVE_FPSR_OFFSET(vq);
  732. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
  733. start, end);
  734. if (ret)
  735. goto out;
  736. /*
  737. * Copy fpsr, and fpcr which must follow contiguously in
  738. * struct fpsimd_state:
  739. */
  740. start = end;
  741. end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
  742. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  743. &target->thread.uw.fpsimd_state.fpsr,
  744. start, end);
  745. out:
  746. fpsimd_flush_task_state(target);
  747. return ret;
  748. }
  749. #endif /* CONFIG_ARM64_SVE */
  750. #ifdef CONFIG_ARM64_PTR_AUTH
  751. static int pac_mask_get(struct task_struct *target,
  752. const struct user_regset *regset,
  753. struct membuf to)
  754. {
  755. /*
  756. * The PAC bits can differ across data and instruction pointers
  757. * depending on TCR_EL1.TBID*, which we may make use of in future, so
  758. * we expose separate masks.
  759. */
  760. unsigned long mask = ptrauth_user_pac_mask();
  761. struct user_pac_mask uregs = {
  762. .data_mask = mask,
  763. .insn_mask = mask,
  764. };
  765. if (!system_supports_address_auth())
  766. return -EINVAL;
  767. return membuf_write(&to, &uregs, sizeof(uregs));
  768. }
  769. static int pac_enabled_keys_get(struct task_struct *target,
  770. const struct user_regset *regset,
  771. struct membuf to)
  772. {
  773. long enabled_keys = ptrauth_get_enabled_keys(target);
  774. if (IS_ERR_VALUE(enabled_keys))
  775. return enabled_keys;
  776. return membuf_write(&to, &enabled_keys, sizeof(enabled_keys));
  777. }
  778. static int pac_enabled_keys_set(struct task_struct *target,
  779. const struct user_regset *regset,
  780. unsigned int pos, unsigned int count,
  781. const void *kbuf, const void __user *ubuf)
  782. {
  783. int ret;
  784. long enabled_keys = ptrauth_get_enabled_keys(target);
  785. if (IS_ERR_VALUE(enabled_keys))
  786. return enabled_keys;
  787. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &enabled_keys, 0,
  788. sizeof(long));
  789. if (ret)
  790. return ret;
  791. return ptrauth_set_enabled_keys(target, PR_PAC_ENABLED_KEYS_MASK,
  792. enabled_keys);
  793. }
  794. #ifdef CONFIG_CHECKPOINT_RESTORE
  795. static __uint128_t pac_key_to_user(const struct ptrauth_key *key)
  796. {
  797. return (__uint128_t)key->hi << 64 | key->lo;
  798. }
  799. static struct ptrauth_key pac_key_from_user(__uint128_t ukey)
  800. {
  801. struct ptrauth_key key = {
  802. .lo = (unsigned long)ukey,
  803. .hi = (unsigned long)(ukey >> 64),
  804. };
  805. return key;
  806. }
  807. static void pac_address_keys_to_user(struct user_pac_address_keys *ukeys,
  808. const struct ptrauth_keys_user *keys)
  809. {
  810. ukeys->apiakey = pac_key_to_user(&keys->apia);
  811. ukeys->apibkey = pac_key_to_user(&keys->apib);
  812. ukeys->apdakey = pac_key_to_user(&keys->apda);
  813. ukeys->apdbkey = pac_key_to_user(&keys->apdb);
  814. }
  815. static void pac_address_keys_from_user(struct ptrauth_keys_user *keys,
  816. const struct user_pac_address_keys *ukeys)
  817. {
  818. keys->apia = pac_key_from_user(ukeys->apiakey);
  819. keys->apib = pac_key_from_user(ukeys->apibkey);
  820. keys->apda = pac_key_from_user(ukeys->apdakey);
  821. keys->apdb = pac_key_from_user(ukeys->apdbkey);
  822. }
  823. static int pac_address_keys_get(struct task_struct *target,
  824. const struct user_regset *regset,
  825. struct membuf to)
  826. {
  827. struct ptrauth_keys_user *keys = &target->thread.keys_user;
  828. struct user_pac_address_keys user_keys;
  829. if (!system_supports_address_auth())
  830. return -EINVAL;
  831. pac_address_keys_to_user(&user_keys, keys);
  832. return membuf_write(&to, &user_keys, sizeof(user_keys));
  833. }
  834. static int pac_address_keys_set(struct task_struct *target,
  835. const struct user_regset *regset,
  836. unsigned int pos, unsigned int count,
  837. const void *kbuf, const void __user *ubuf)
  838. {
  839. struct ptrauth_keys_user *keys = &target->thread.keys_user;
  840. struct user_pac_address_keys user_keys;
  841. int ret;
  842. if (!system_supports_address_auth())
  843. return -EINVAL;
  844. pac_address_keys_to_user(&user_keys, keys);
  845. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  846. &user_keys, 0, -1);
  847. if (ret)
  848. return ret;
  849. pac_address_keys_from_user(keys, &user_keys);
  850. return 0;
  851. }
  852. static void pac_generic_keys_to_user(struct user_pac_generic_keys *ukeys,
  853. const struct ptrauth_keys_user *keys)
  854. {
  855. ukeys->apgakey = pac_key_to_user(&keys->apga);
  856. }
  857. static void pac_generic_keys_from_user(struct ptrauth_keys_user *keys,
  858. const struct user_pac_generic_keys *ukeys)
  859. {
  860. keys->apga = pac_key_from_user(ukeys->apgakey);
  861. }
  862. static int pac_generic_keys_get(struct task_struct *target,
  863. const struct user_regset *regset,
  864. struct membuf to)
  865. {
  866. struct ptrauth_keys_user *keys = &target->thread.keys_user;
  867. struct user_pac_generic_keys user_keys;
  868. if (!system_supports_generic_auth())
  869. return -EINVAL;
  870. pac_generic_keys_to_user(&user_keys, keys);
  871. return membuf_write(&to, &user_keys, sizeof(user_keys));
  872. }
  873. static int pac_generic_keys_set(struct task_struct *target,
  874. const struct user_regset *regset,
  875. unsigned int pos, unsigned int count,
  876. const void *kbuf, const void __user *ubuf)
  877. {
  878. struct ptrauth_keys_user *keys = &target->thread.keys_user;
  879. struct user_pac_generic_keys user_keys;
  880. int ret;
  881. if (!system_supports_generic_auth())
  882. return -EINVAL;
  883. pac_generic_keys_to_user(&user_keys, keys);
  884. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  885. &user_keys, 0, -1);
  886. if (ret)
  887. return ret;
  888. pac_generic_keys_from_user(keys, &user_keys);
  889. return 0;
  890. }
  891. #endif /* CONFIG_CHECKPOINT_RESTORE */
  892. #endif /* CONFIG_ARM64_PTR_AUTH */
  893. #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
  894. static int tagged_addr_ctrl_get(struct task_struct *target,
  895. const struct user_regset *regset,
  896. struct membuf to)
  897. {
  898. long ctrl = get_tagged_addr_ctrl(target);
  899. if (IS_ERR_VALUE(ctrl))
  900. return ctrl;
  901. return membuf_write(&to, &ctrl, sizeof(ctrl));
  902. }
  903. static int tagged_addr_ctrl_set(struct task_struct *target, const struct
  904. user_regset *regset, unsigned int pos,
  905. unsigned int count, const void *kbuf, const
  906. void __user *ubuf)
  907. {
  908. int ret;
  909. long ctrl;
  910. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
  911. if (ret)
  912. return ret;
  913. return set_tagged_addr_ctrl(target, ctrl);
  914. }
  915. #endif
  916. enum aarch64_regset {
  917. REGSET_GPR,
  918. REGSET_FPR,
  919. REGSET_TLS,
  920. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  921. REGSET_HW_BREAK,
  922. REGSET_HW_WATCH,
  923. #endif
  924. REGSET_SYSTEM_CALL,
  925. #ifdef CONFIG_ARM64_SVE
  926. REGSET_SVE,
  927. #endif
  928. #ifdef CONFIG_ARM64_PTR_AUTH
  929. REGSET_PAC_MASK,
  930. REGSET_PAC_ENABLED_KEYS,
  931. #ifdef CONFIG_CHECKPOINT_RESTORE
  932. REGSET_PACA_KEYS,
  933. REGSET_PACG_KEYS,
  934. #endif
  935. #endif
  936. #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
  937. REGSET_TAGGED_ADDR_CTRL,
  938. #endif
  939. };
  940. static const struct user_regset aarch64_regsets[] = {
  941. [REGSET_GPR] = {
  942. .core_note_type = NT_PRSTATUS,
  943. .n = sizeof(struct user_pt_regs) / sizeof(u64),
  944. .size = sizeof(u64),
  945. .align = sizeof(u64),
  946. .regset_get = gpr_get,
  947. .set = gpr_set
  948. },
  949. [REGSET_FPR] = {
  950. .core_note_type = NT_PRFPREG,
  951. .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
  952. /*
  953. * We pretend we have 32-bit registers because the fpsr and
  954. * fpcr are 32-bits wide.
  955. */
  956. .size = sizeof(u32),
  957. .align = sizeof(u32),
  958. .active = fpr_active,
  959. .regset_get = fpr_get,
  960. .set = fpr_set
  961. },
  962. [REGSET_TLS] = {
  963. .core_note_type = NT_ARM_TLS,
  964. .n = 1,
  965. .size = sizeof(void *),
  966. .align = sizeof(void *),
  967. .regset_get = tls_get,
  968. .set = tls_set,
  969. },
  970. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  971. [REGSET_HW_BREAK] = {
  972. .core_note_type = NT_ARM_HW_BREAK,
  973. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  974. .size = sizeof(u32),
  975. .align = sizeof(u32),
  976. .regset_get = hw_break_get,
  977. .set = hw_break_set,
  978. },
  979. [REGSET_HW_WATCH] = {
  980. .core_note_type = NT_ARM_HW_WATCH,
  981. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  982. .size = sizeof(u32),
  983. .align = sizeof(u32),
  984. .regset_get = hw_break_get,
  985. .set = hw_break_set,
  986. },
  987. #endif
  988. [REGSET_SYSTEM_CALL] = {
  989. .core_note_type = NT_ARM_SYSTEM_CALL,
  990. .n = 1,
  991. .size = sizeof(int),
  992. .align = sizeof(int),
  993. .regset_get = system_call_get,
  994. .set = system_call_set,
  995. },
  996. #ifdef CONFIG_ARM64_SVE
  997. [REGSET_SVE] = { /* Scalable Vector Extension */
  998. .core_note_type = NT_ARM_SVE,
  999. .n = DIV_ROUND_UP(SVE_PT_SIZE(SVE_VQ_MAX, SVE_PT_REGS_SVE),
  1000. SVE_VQ_BYTES),
  1001. .size = SVE_VQ_BYTES,
  1002. .align = SVE_VQ_BYTES,
  1003. .regset_get = sve_get,
  1004. .set = sve_set,
  1005. },
  1006. #endif
  1007. #ifdef CONFIG_ARM64_PTR_AUTH
  1008. [REGSET_PAC_MASK] = {
  1009. .core_note_type = NT_ARM_PAC_MASK,
  1010. .n = sizeof(struct user_pac_mask) / sizeof(u64),
  1011. .size = sizeof(u64),
  1012. .align = sizeof(u64),
  1013. .regset_get = pac_mask_get,
  1014. /* this cannot be set dynamically */
  1015. },
  1016. [REGSET_PAC_ENABLED_KEYS] = {
  1017. .core_note_type = NT_ARM_PAC_ENABLED_KEYS,
  1018. .n = 1,
  1019. .size = sizeof(long),
  1020. .align = sizeof(long),
  1021. .regset_get = pac_enabled_keys_get,
  1022. .set = pac_enabled_keys_set,
  1023. },
  1024. #ifdef CONFIG_CHECKPOINT_RESTORE
  1025. [REGSET_PACA_KEYS] = {
  1026. .core_note_type = NT_ARM_PACA_KEYS,
  1027. .n = sizeof(struct user_pac_address_keys) / sizeof(__uint128_t),
  1028. .size = sizeof(__uint128_t),
  1029. .align = sizeof(__uint128_t),
  1030. .regset_get = pac_address_keys_get,
  1031. .set = pac_address_keys_set,
  1032. },
  1033. [REGSET_PACG_KEYS] = {
  1034. .core_note_type = NT_ARM_PACG_KEYS,
  1035. .n = sizeof(struct user_pac_generic_keys) / sizeof(__uint128_t),
  1036. .size = sizeof(__uint128_t),
  1037. .align = sizeof(__uint128_t),
  1038. .regset_get = pac_generic_keys_get,
  1039. .set = pac_generic_keys_set,
  1040. },
  1041. #endif
  1042. #endif
  1043. #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
  1044. [REGSET_TAGGED_ADDR_CTRL] = {
  1045. .core_note_type = NT_ARM_TAGGED_ADDR_CTRL,
  1046. .n = 1,
  1047. .size = sizeof(long),
  1048. .align = sizeof(long),
  1049. .regset_get = tagged_addr_ctrl_get,
  1050. .set = tagged_addr_ctrl_set,
  1051. },
  1052. #endif
  1053. };
  1054. static const struct user_regset_view user_aarch64_view = {
  1055. .name = "aarch64", .e_machine = EM_AARCH64,
  1056. .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
  1057. };
  1058. #ifdef CONFIG_COMPAT
  1059. enum compat_regset {
  1060. REGSET_COMPAT_GPR,
  1061. REGSET_COMPAT_VFP,
  1062. };
  1063. static inline compat_ulong_t compat_get_user_reg(struct task_struct *task, int idx)
  1064. {
  1065. struct pt_regs *regs = task_pt_regs(task);
  1066. switch (idx) {
  1067. case 15:
  1068. return regs->pc;
  1069. case 16:
  1070. return pstate_to_compat_psr(regs->pstate);
  1071. case 17:
  1072. return regs->orig_x0;
  1073. default:
  1074. return regs->regs[idx];
  1075. }
  1076. }
  1077. static int compat_gpr_get(struct task_struct *target,
  1078. const struct user_regset *regset,
  1079. struct membuf to)
  1080. {
  1081. int i = 0;
  1082. while (to.left)
  1083. membuf_store(&to, compat_get_user_reg(target, i++));
  1084. return 0;
  1085. }
  1086. static int compat_gpr_set(struct task_struct *target,
  1087. const struct user_regset *regset,
  1088. unsigned int pos, unsigned int count,
  1089. const void *kbuf, const void __user *ubuf)
  1090. {
  1091. struct pt_regs newregs;
  1092. int ret = 0;
  1093. unsigned int i, start, num_regs;
  1094. /* Calculate the number of AArch32 registers contained in count */
  1095. num_regs = count / regset->size;
  1096. /* Convert pos into an register number */
  1097. start = pos / regset->size;
  1098. if (start + num_regs > regset->n)
  1099. return -EIO;
  1100. newregs = *task_pt_regs(target);
  1101. for (i = 0; i < num_regs; ++i) {
  1102. unsigned int idx = start + i;
  1103. compat_ulong_t reg;
  1104. if (kbuf) {
  1105. memcpy(&reg, kbuf, sizeof(reg));
  1106. kbuf += sizeof(reg);
  1107. } else {
  1108. ret = copy_from_user(&reg, ubuf, sizeof(reg));
  1109. if (ret) {
  1110. ret = -EFAULT;
  1111. break;
  1112. }
  1113. ubuf += sizeof(reg);
  1114. }
  1115. switch (idx) {
  1116. case 15:
  1117. newregs.pc = reg;
  1118. break;
  1119. case 16:
  1120. reg = compat_psr_to_pstate(reg);
  1121. newregs.pstate = reg;
  1122. break;
  1123. case 17:
  1124. newregs.orig_x0 = reg;
  1125. break;
  1126. default:
  1127. newregs.regs[idx] = reg;
  1128. }
  1129. }
  1130. if (valid_user_regs(&newregs.user_regs, target))
  1131. *task_pt_regs(target) = newregs;
  1132. else
  1133. ret = -EINVAL;
  1134. return ret;
  1135. }
  1136. static int compat_vfp_get(struct task_struct *target,
  1137. const struct user_regset *regset,
  1138. struct membuf to)
  1139. {
  1140. struct user_fpsimd_state *uregs;
  1141. compat_ulong_t fpscr;
  1142. if (!system_supports_fpsimd())
  1143. return -EINVAL;
  1144. uregs = &target->thread.uw.fpsimd_state;
  1145. if (target == current)
  1146. fpsimd_preserve_current_state();
  1147. /*
  1148. * The VFP registers are packed into the fpsimd_state, so they all sit
  1149. * nicely together for us. We just need to create the fpscr separately.
  1150. */
  1151. membuf_write(&to, uregs, VFP_STATE_SIZE - sizeof(compat_ulong_t));
  1152. fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
  1153. (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
  1154. return membuf_store(&to, fpscr);
  1155. }
  1156. static int compat_vfp_set(struct task_struct *target,
  1157. const struct user_regset *regset,
  1158. unsigned int pos, unsigned int count,
  1159. const void *kbuf, const void __user *ubuf)
  1160. {
  1161. struct user_fpsimd_state *uregs;
  1162. compat_ulong_t fpscr;
  1163. int ret, vregs_end_pos;
  1164. if (!system_supports_fpsimd())
  1165. return -EINVAL;
  1166. uregs = &target->thread.uw.fpsimd_state;
  1167. vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
  1168. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  1169. vregs_end_pos);
  1170. if (count && !ret) {
  1171. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpscr,
  1172. vregs_end_pos, VFP_STATE_SIZE);
  1173. if (!ret) {
  1174. uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
  1175. uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
  1176. }
  1177. }
  1178. fpsimd_flush_task_state(target);
  1179. return ret;
  1180. }
  1181. static int compat_tls_get(struct task_struct *target,
  1182. const struct user_regset *regset,
  1183. struct membuf to)
  1184. {
  1185. return membuf_store(&to, (compat_ulong_t)target->thread.uw.tp_value);
  1186. }
  1187. static int compat_tls_set(struct task_struct *target,
  1188. const struct user_regset *regset, unsigned int pos,
  1189. unsigned int count, const void *kbuf,
  1190. const void __user *ubuf)
  1191. {
  1192. int ret;
  1193. compat_ulong_t tls = target->thread.uw.tp_value;
  1194. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  1195. if (ret)
  1196. return ret;
  1197. target->thread.uw.tp_value = tls;
  1198. return ret;
  1199. }
  1200. static const struct user_regset aarch32_regsets[] = {
  1201. [REGSET_COMPAT_GPR] = {
  1202. .core_note_type = NT_PRSTATUS,
  1203. .n = COMPAT_ELF_NGREG,
  1204. .size = sizeof(compat_elf_greg_t),
  1205. .align = sizeof(compat_elf_greg_t),
  1206. .regset_get = compat_gpr_get,
  1207. .set = compat_gpr_set
  1208. },
  1209. [REGSET_COMPAT_VFP] = {
  1210. .core_note_type = NT_ARM_VFP,
  1211. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  1212. .size = sizeof(compat_ulong_t),
  1213. .align = sizeof(compat_ulong_t),
  1214. .active = fpr_active,
  1215. .regset_get = compat_vfp_get,
  1216. .set = compat_vfp_set
  1217. },
  1218. };
  1219. static const struct user_regset_view user_aarch32_view = {
  1220. .name = "aarch32", .e_machine = EM_ARM,
  1221. .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
  1222. };
  1223. static const struct user_regset aarch32_ptrace_regsets[] = {
  1224. [REGSET_GPR] = {
  1225. .core_note_type = NT_PRSTATUS,
  1226. .n = COMPAT_ELF_NGREG,
  1227. .size = sizeof(compat_elf_greg_t),
  1228. .align = sizeof(compat_elf_greg_t),
  1229. .regset_get = compat_gpr_get,
  1230. .set = compat_gpr_set
  1231. },
  1232. [REGSET_FPR] = {
  1233. .core_note_type = NT_ARM_VFP,
  1234. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  1235. .size = sizeof(compat_ulong_t),
  1236. .align = sizeof(compat_ulong_t),
  1237. .regset_get = compat_vfp_get,
  1238. .set = compat_vfp_set
  1239. },
  1240. [REGSET_TLS] = {
  1241. .core_note_type = NT_ARM_TLS,
  1242. .n = 1,
  1243. .size = sizeof(compat_ulong_t),
  1244. .align = sizeof(compat_ulong_t),
  1245. .regset_get = compat_tls_get,
  1246. .set = compat_tls_set,
  1247. },
  1248. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  1249. [REGSET_HW_BREAK] = {
  1250. .core_note_type = NT_ARM_HW_BREAK,
  1251. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  1252. .size = sizeof(u32),
  1253. .align = sizeof(u32),
  1254. .regset_get = hw_break_get,
  1255. .set = hw_break_set,
  1256. },
  1257. [REGSET_HW_WATCH] = {
  1258. .core_note_type = NT_ARM_HW_WATCH,
  1259. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  1260. .size = sizeof(u32),
  1261. .align = sizeof(u32),
  1262. .regset_get = hw_break_get,
  1263. .set = hw_break_set,
  1264. },
  1265. #endif
  1266. [REGSET_SYSTEM_CALL] = {
  1267. .core_note_type = NT_ARM_SYSTEM_CALL,
  1268. .n = 1,
  1269. .size = sizeof(int),
  1270. .align = sizeof(int),
  1271. .regset_get = system_call_get,
  1272. .set = system_call_set,
  1273. },
  1274. };
  1275. static const struct user_regset_view user_aarch32_ptrace_view = {
  1276. .name = "aarch32", .e_machine = EM_ARM,
  1277. .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
  1278. };
  1279. static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
  1280. compat_ulong_t __user *ret)
  1281. {
  1282. compat_ulong_t tmp;
  1283. if (off & 3)
  1284. return -EIO;
  1285. if (off == COMPAT_PT_TEXT_ADDR)
  1286. tmp = tsk->mm->start_code;
  1287. else if (off == COMPAT_PT_DATA_ADDR)
  1288. tmp = tsk->mm->start_data;
  1289. else if (off == COMPAT_PT_TEXT_END_ADDR)
  1290. tmp = tsk->mm->end_code;
  1291. else if (off < sizeof(compat_elf_gregset_t))
  1292. tmp = compat_get_user_reg(tsk, off >> 2);
  1293. else if (off >= COMPAT_USER_SZ)
  1294. return -EIO;
  1295. else
  1296. tmp = 0;
  1297. return put_user(tmp, ret);
  1298. }
  1299. static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
  1300. compat_ulong_t val)
  1301. {
  1302. struct pt_regs newregs = *task_pt_regs(tsk);
  1303. unsigned int idx = off / 4;
  1304. if (off & 3 || off >= COMPAT_USER_SZ)
  1305. return -EIO;
  1306. if (off >= sizeof(compat_elf_gregset_t))
  1307. return 0;
  1308. switch (idx) {
  1309. case 15:
  1310. newregs.pc = val;
  1311. break;
  1312. case 16:
  1313. newregs.pstate = compat_psr_to_pstate(val);
  1314. break;
  1315. case 17:
  1316. newregs.orig_x0 = val;
  1317. break;
  1318. default:
  1319. newregs.regs[idx] = val;
  1320. }
  1321. if (!valid_user_regs(&newregs.user_regs, tsk))
  1322. return -EINVAL;
  1323. *task_pt_regs(tsk) = newregs;
  1324. return 0;
  1325. }
  1326. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  1327. /*
  1328. * Convert a virtual register number into an index for a thread_info
  1329. * breakpoint array. Breakpoints are identified using positive numbers
  1330. * whilst watchpoints are negative. The registers are laid out as pairs
  1331. * of (address, control), each pair mapping to a unique hw_breakpoint struct.
  1332. * Register 0 is reserved for describing resource information.
  1333. */
  1334. static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
  1335. {
  1336. return (abs(num) - 1) >> 1;
  1337. }
  1338. static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
  1339. {
  1340. u8 num_brps, num_wrps, debug_arch, wp_len;
  1341. u32 reg = 0;
  1342. num_brps = hw_breakpoint_slots(TYPE_INST);
  1343. num_wrps = hw_breakpoint_slots(TYPE_DATA);
  1344. debug_arch = debug_monitors_arch();
  1345. wp_len = 8;
  1346. reg |= debug_arch;
  1347. reg <<= 8;
  1348. reg |= wp_len;
  1349. reg <<= 8;
  1350. reg |= num_wrps;
  1351. reg <<= 8;
  1352. reg |= num_brps;
  1353. *kdata = reg;
  1354. return 0;
  1355. }
  1356. static int compat_ptrace_hbp_get(unsigned int note_type,
  1357. struct task_struct *tsk,
  1358. compat_long_t num,
  1359. u32 *kdata)
  1360. {
  1361. u64 addr = 0;
  1362. u32 ctrl = 0;
  1363. int err, idx = compat_ptrace_hbp_num_to_idx(num);
  1364. if (num & 1) {
  1365. err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
  1366. *kdata = (u32)addr;
  1367. } else {
  1368. err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
  1369. *kdata = ctrl;
  1370. }
  1371. return err;
  1372. }
  1373. static int compat_ptrace_hbp_set(unsigned int note_type,
  1374. struct task_struct *tsk,
  1375. compat_long_t num,
  1376. u32 *kdata)
  1377. {
  1378. u64 addr;
  1379. u32 ctrl;
  1380. int err, idx = compat_ptrace_hbp_num_to_idx(num);
  1381. if (num & 1) {
  1382. addr = *kdata;
  1383. err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
  1384. } else {
  1385. ctrl = *kdata;
  1386. err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
  1387. }
  1388. return err;
  1389. }
  1390. static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
  1391. compat_ulong_t __user *data)
  1392. {
  1393. int ret;
  1394. u32 kdata;
  1395. /* Watchpoint */
  1396. if (num < 0) {
  1397. ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
  1398. /* Resource info */
  1399. } else if (num == 0) {
  1400. ret = compat_ptrace_hbp_get_resource_info(&kdata);
  1401. /* Breakpoint */
  1402. } else {
  1403. ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
  1404. }
  1405. if (!ret)
  1406. ret = put_user(kdata, data);
  1407. return ret;
  1408. }
  1409. static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
  1410. compat_ulong_t __user *data)
  1411. {
  1412. int ret;
  1413. u32 kdata = 0;
  1414. if (num == 0)
  1415. return 0;
  1416. ret = get_user(kdata, data);
  1417. if (ret)
  1418. return ret;
  1419. if (num < 0)
  1420. ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
  1421. else
  1422. ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
  1423. return ret;
  1424. }
  1425. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  1426. long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
  1427. compat_ulong_t caddr, compat_ulong_t cdata)
  1428. {
  1429. unsigned long addr = caddr;
  1430. unsigned long data = cdata;
  1431. void __user *datap = compat_ptr(data);
  1432. int ret;
  1433. switch (request) {
  1434. case PTRACE_PEEKUSR:
  1435. ret = compat_ptrace_read_user(child, addr, datap);
  1436. break;
  1437. case PTRACE_POKEUSR:
  1438. ret = compat_ptrace_write_user(child, addr, data);
  1439. break;
  1440. case COMPAT_PTRACE_GETREGS:
  1441. ret = copy_regset_to_user(child,
  1442. &user_aarch32_view,
  1443. REGSET_COMPAT_GPR,
  1444. 0, sizeof(compat_elf_gregset_t),
  1445. datap);
  1446. break;
  1447. case COMPAT_PTRACE_SETREGS:
  1448. ret = copy_regset_from_user(child,
  1449. &user_aarch32_view,
  1450. REGSET_COMPAT_GPR,
  1451. 0, sizeof(compat_elf_gregset_t),
  1452. datap);
  1453. break;
  1454. case COMPAT_PTRACE_GET_THREAD_AREA:
  1455. ret = put_user((compat_ulong_t)child->thread.uw.tp_value,
  1456. (compat_ulong_t __user *)datap);
  1457. break;
  1458. case COMPAT_PTRACE_SET_SYSCALL:
  1459. task_pt_regs(child)->syscallno = data;
  1460. ret = 0;
  1461. break;
  1462. case COMPAT_PTRACE_GETVFPREGS:
  1463. ret = copy_regset_to_user(child,
  1464. &user_aarch32_view,
  1465. REGSET_COMPAT_VFP,
  1466. 0, VFP_STATE_SIZE,
  1467. datap);
  1468. break;
  1469. case COMPAT_PTRACE_SETVFPREGS:
  1470. ret = copy_regset_from_user(child,
  1471. &user_aarch32_view,
  1472. REGSET_COMPAT_VFP,
  1473. 0, VFP_STATE_SIZE,
  1474. datap);
  1475. break;
  1476. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  1477. case COMPAT_PTRACE_GETHBPREGS:
  1478. ret = compat_ptrace_gethbpregs(child, addr, datap);
  1479. break;
  1480. case COMPAT_PTRACE_SETHBPREGS:
  1481. ret = compat_ptrace_sethbpregs(child, addr, datap);
  1482. break;
  1483. #endif
  1484. default:
  1485. ret = compat_ptrace_request(child, request, addr,
  1486. data);
  1487. break;
  1488. }
  1489. return ret;
  1490. }
  1491. #endif /* CONFIG_COMPAT */
  1492. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  1493. {
  1494. #ifdef CONFIG_COMPAT
  1495. /*
  1496. * Core dumping of 32-bit tasks or compat ptrace requests must use the
  1497. * user_aarch32_view compatible with arm32. Native ptrace requests on
  1498. * 32-bit children use an extended user_aarch32_ptrace_view to allow
  1499. * access to the TLS register.
  1500. */
  1501. if (is_compat_task())
  1502. return &user_aarch32_view;
  1503. else if (is_compat_thread(task_thread_info(task)))
  1504. return &user_aarch32_ptrace_view;
  1505. #endif
  1506. return &user_aarch64_view;
  1507. }
  1508. long arch_ptrace(struct task_struct *child, long request,
  1509. unsigned long addr, unsigned long data)
  1510. {
  1511. switch (request) {
  1512. case PTRACE_PEEKMTETAGS:
  1513. case PTRACE_POKEMTETAGS:
  1514. return mte_ptrace_copy_tags(child, request, addr, data);
  1515. }
  1516. return ptrace_request(child, request, addr, data);
  1517. }
  1518. enum ptrace_syscall_dir {
  1519. PTRACE_SYSCALL_ENTER = 0,
  1520. PTRACE_SYSCALL_EXIT,
  1521. };
  1522. static void tracehook_report_syscall(struct pt_regs *regs,
  1523. enum ptrace_syscall_dir dir)
  1524. {
  1525. int regno;
  1526. unsigned long saved_reg;
  1527. /*
  1528. * We have some ABI weirdness here in the way that we handle syscall
  1529. * exit stops because we indicate whether or not the stop has been
  1530. * signalled from syscall entry or syscall exit by clobbering a general
  1531. * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee
  1532. * and restoring its old value after the stop. This means that:
  1533. *
  1534. * - Any writes by the tracer to this register during the stop are
  1535. * ignored/discarded.
  1536. *
  1537. * - The actual value of the register is not available during the stop,
  1538. * so the tracer cannot save it and restore it later.
  1539. *
  1540. * - Syscall stops behave differently to seccomp and pseudo-step traps
  1541. * (the latter do not nobble any registers).
  1542. */
  1543. regno = (is_compat_task() ? 12 : 7);
  1544. saved_reg = regs->regs[regno];
  1545. regs->regs[regno] = dir;
  1546. if (dir == PTRACE_SYSCALL_ENTER) {
  1547. if (tracehook_report_syscall_entry(regs))
  1548. forget_syscall(regs);
  1549. regs->regs[regno] = saved_reg;
  1550. } else if (!test_thread_flag(TIF_SINGLESTEP)) {
  1551. tracehook_report_syscall_exit(regs, 0);
  1552. regs->regs[regno] = saved_reg;
  1553. } else {
  1554. regs->regs[regno] = saved_reg;
  1555. /*
  1556. * Signal a pseudo-step exception since we are stepping but
  1557. * tracer modifications to the registers may have rewound the
  1558. * state machine.
  1559. */
  1560. tracehook_report_syscall_exit(regs, 1);
  1561. }
  1562. }
  1563. int syscall_trace_enter(struct pt_regs *regs)
  1564. {
  1565. unsigned long flags = READ_ONCE(current_thread_info()->flags);
  1566. if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) {
  1567. tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
  1568. if (flags & _TIF_SYSCALL_EMU)
  1569. return NO_SYSCALL;
  1570. }
  1571. /* Do the secure computing after ptrace; failures should be fast. */
  1572. if (secure_computing() == -1)
  1573. return NO_SYSCALL;
  1574. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1575. trace_sys_enter(regs, regs->syscallno);
  1576. audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
  1577. regs->regs[2], regs->regs[3]);
  1578. return regs->syscallno;
  1579. }
  1580. void syscall_trace_exit(struct pt_regs *regs)
  1581. {
  1582. unsigned long flags = READ_ONCE(current_thread_info()->flags);
  1583. audit_syscall_exit(regs);
  1584. if (flags & _TIF_SYSCALL_TRACEPOINT)
  1585. trace_sys_exit(regs, syscall_get_return_value(current, regs));
  1586. if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP))
  1587. tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
  1588. rseq_syscall(regs);
  1589. }
  1590. /*
  1591. * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a.
  1592. * We permit userspace to set SSBS (AArch64 bit 12, AArch32 bit 23) which is
  1593. * not described in ARM DDI 0487D.a.
  1594. * We treat PAN and UAO as RES0 bits, as they are meaningless at EL0, and may
  1595. * be allocated an EL0 meaning in future.
  1596. * Userspace cannot use these until they have an architectural meaning.
  1597. * Note that this follows the SPSR_ELx format, not the AArch32 PSR format.
  1598. * We also reserve IL for the kernel; SS is handled dynamically.
  1599. */
  1600. #define SPSR_EL1_AARCH64_RES0_BITS \
  1601. (GENMASK_ULL(63, 32) | GENMASK_ULL(27, 26) | GENMASK_ULL(23, 22) | \
  1602. GENMASK_ULL(20, 13) | GENMASK_ULL(5, 5))
  1603. #define SPSR_EL1_AARCH32_RES0_BITS \
  1604. (GENMASK_ULL(63, 32) | GENMASK_ULL(22, 22) | GENMASK_ULL(20, 20))
  1605. static int valid_compat_regs(struct user_pt_regs *regs)
  1606. {
  1607. regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
  1608. if (!system_supports_mixed_endian_el0()) {
  1609. if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  1610. regs->pstate |= PSR_AA32_E_BIT;
  1611. else
  1612. regs->pstate &= ~PSR_AA32_E_BIT;
  1613. }
  1614. if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
  1615. (regs->pstate & PSR_AA32_A_BIT) == 0 &&
  1616. (regs->pstate & PSR_AA32_I_BIT) == 0 &&
  1617. (regs->pstate & PSR_AA32_F_BIT) == 0) {
  1618. return 1;
  1619. }
  1620. /*
  1621. * Force PSR to a valid 32-bit EL0t, preserving the same bits as
  1622. * arch/arm.
  1623. */
  1624. regs->pstate &= PSR_AA32_N_BIT | PSR_AA32_Z_BIT |
  1625. PSR_AA32_C_BIT | PSR_AA32_V_BIT |
  1626. PSR_AA32_Q_BIT | PSR_AA32_IT_MASK |
  1627. PSR_AA32_GE_MASK | PSR_AA32_E_BIT |
  1628. PSR_AA32_T_BIT;
  1629. regs->pstate |= PSR_MODE32_BIT;
  1630. return 0;
  1631. }
  1632. static int valid_native_regs(struct user_pt_regs *regs)
  1633. {
  1634. regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
  1635. if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
  1636. (regs->pstate & PSR_D_BIT) == 0 &&
  1637. (regs->pstate & PSR_A_BIT) == 0 &&
  1638. (regs->pstate & PSR_I_BIT) == 0 &&
  1639. (regs->pstate & PSR_F_BIT) == 0) {
  1640. return 1;
  1641. }
  1642. /* Force PSR to a valid 64-bit EL0t */
  1643. regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
  1644. return 0;
  1645. }
  1646. /*
  1647. * Are the current registers suitable for user mode? (used to maintain
  1648. * security in signal handlers)
  1649. */
  1650. int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
  1651. {
  1652. /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
  1653. user_regs_reset_single_step(regs, task);
  1654. if (is_compat_thread(task_thread_info(task)))
  1655. return valid_compat_regs(regs);
  1656. else
  1657. return valid_native_regs(regs);
  1658. }