setup-rcar-gen2.c 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * R-Car Generation 2 support
  4. *
  5. * Copyright (C) 2013 Renesas Solutions Corp.
  6. * Copyright (C) 2013 Magnus Damm
  7. * Copyright (C) 2014 Ulrich Hecht
  8. */
  9. #include <linux/clocksource.h>
  10. #include <linux/device.h>
  11. #include <linux/dma-map-ops.h>
  12. #include <linux/io.h>
  13. #include <linux/kernel.h>
  14. #include <linux/memblock.h>
  15. #include <linux/of.h>
  16. #include <linux/of_clk.h>
  17. #include <linux/of_fdt.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/psci.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/secure_cntvoff.h>
  22. #include "common.h"
  23. #include "rcar-gen2.h"
  24. static const struct of_device_id cpg_matches[] __initconst = {
  25. { .compatible = "renesas,r8a7742-cpg-mssr", .data = "extal" },
  26. { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
  27. { .compatible = "renesas,r8a7744-cpg-mssr", .data = "extal" },
  28. { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
  29. { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
  30. { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
  31. { /* sentinel */ }
  32. };
  33. static unsigned int __init get_extal_freq(void)
  34. {
  35. const struct of_device_id *match;
  36. struct device_node *cpg, *extal;
  37. u32 freq = 20000000;
  38. int idx = 0;
  39. cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);
  40. if (!cpg)
  41. return freq;
  42. if (match->data)
  43. idx = of_property_match_string(cpg, "clock-names", match->data);
  44. extal = of_parse_phandle(cpg, "clocks", idx);
  45. of_node_put(cpg);
  46. if (!extal)
  47. return freq;
  48. of_property_read_u32(extal, "clock-frequency", &freq);
  49. of_node_put(extal);
  50. return freq;
  51. }
  52. #define CNTCR 0
  53. #define CNTFID0 0x20
  54. static void __init rcar_gen2_timer_init(void)
  55. {
  56. bool need_update = true;
  57. void __iomem *base;
  58. u32 freq;
  59. /*
  60. * If PSCI is available then most likely we are running on PSCI-enabled
  61. * U-Boot which, we assume, has already taken care of resetting CNTVOFF
  62. * and updating counter module before switching to non-secure mode
  63. * and we don't need to.
  64. */
  65. #ifdef CONFIG_ARM_PSCI_FW
  66. if (psci_ops.cpu_on)
  67. need_update = false;
  68. #endif
  69. if (need_update == false)
  70. goto skip_update;
  71. secure_cntvoff_init();
  72. if (of_machine_is_compatible("renesas,r8a7745") ||
  73. of_machine_is_compatible("renesas,r8a77470") ||
  74. of_machine_is_compatible("renesas,r8a7792") ||
  75. of_machine_is_compatible("renesas,r8a7794")) {
  76. freq = 260000000 / 8; /* ZS / 8 */
  77. } else {
  78. /* At Linux boot time the r8a7790 arch timer comes up
  79. * with the counter disabled. Moreover, it may also report
  80. * a potentially incorrect fixed 13 MHz frequency. To be
  81. * correct these registers need to be updated to use the
  82. * frequency EXTAL / 2.
  83. */
  84. freq = get_extal_freq() / 2;
  85. }
  86. /* Remap "armgcnt address map" space */
  87. base = ioremap(0xe6080000, PAGE_SIZE);
  88. /*
  89. * Update the timer if it is either not running, or is not at the
  90. * right frequency. The timer is only configurable in secure mode
  91. * so this avoids an abort if the loader started the timer and
  92. * entered the kernel in non-secure mode.
  93. */
  94. if ((ioread32(base + CNTCR) & 1) == 0 ||
  95. ioread32(base + CNTFID0) != freq) {
  96. /* Update registers with correct frequency */
  97. iowrite32(freq, base + CNTFID0);
  98. asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
  99. /* make sure arch timer is started by setting bit 0 of CNTCR */
  100. iowrite32(1, base + CNTCR);
  101. }
  102. iounmap(base);
  103. skip_update:
  104. of_clk_init(NULL);
  105. timer_probe();
  106. }
  107. struct memory_reserve_config {
  108. u64 reserved;
  109. u64 base, size;
  110. };
  111. static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname,
  112. int depth, void *data)
  113. {
  114. const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
  115. const __be32 *reg, *endp;
  116. int l;
  117. struct memory_reserve_config *mrc = data;
  118. u64 lpae_start = 1ULL << 32;
  119. /* We are scanning "memory" nodes only */
  120. if (type == NULL || strcmp(type, "memory"))
  121. return 0;
  122. reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
  123. if (reg == NULL)
  124. reg = of_get_flat_dt_prop(node, "reg", &l);
  125. if (reg == NULL)
  126. return 0;
  127. endp = reg + (l / sizeof(__be32));
  128. while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
  129. u64 base, size;
  130. base = dt_mem_next_cell(dt_root_addr_cells, &reg);
  131. size = dt_mem_next_cell(dt_root_size_cells, &reg);
  132. if (base >= lpae_start)
  133. continue;
  134. if ((base + size) >= lpae_start)
  135. size = lpae_start - base;
  136. if (size < mrc->reserved)
  137. continue;
  138. if (base < mrc->base)
  139. continue;
  140. /* keep the area at top near the 32-bit legacy limit */
  141. mrc->base = base + size - mrc->reserved;
  142. mrc->size = mrc->reserved;
  143. }
  144. return 0;
  145. }
  146. static void __init rcar_gen2_reserve(void)
  147. {
  148. struct memory_reserve_config mrc;
  149. /* reserve 256 MiB at the top of the physical legacy 32-bit space */
  150. memset(&mrc, 0, sizeof(mrc));
  151. mrc.reserved = SZ_256M;
  152. of_scan_flat_dt(rcar_gen2_scan_mem, &mrc);
  153. #ifdef CONFIG_DMA_CMA
  154. if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) {
  155. static struct cma *rcar_gen2_dma_contiguous;
  156. dma_contiguous_reserve_area(mrc.size, mrc.base, 0,
  157. &rcar_gen2_dma_contiguous, true);
  158. }
  159. #endif
  160. }
  161. static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
  162. "renesas,r8a7790",
  163. "renesas,r8a7791",
  164. "renesas,r8a7792",
  165. "renesas,r8a7793",
  166. "renesas,r8a7794",
  167. NULL,
  168. };
  169. DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
  170. .init_late = shmobile_init_late,
  171. .init_time = rcar_gen2_timer_init,
  172. .reserve = rcar_gen2_reserve,
  173. .dt_compat = rcar_gen2_boards_compat_dt,
  174. MACHINE_END
  175. static const char * const rz_g1_boards_compat_dt[] __initconst = {
  176. "renesas,r8a7742",
  177. "renesas,r8a7743",
  178. "renesas,r8a7744",
  179. "renesas,r8a7745",
  180. "renesas,r8a77470",
  181. NULL,
  182. };
  183. DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
  184. .init_late = shmobile_init_late,
  185. .init_time = rcar_gen2_timer_init,
  186. .reserve = rcar_gen2_reserve,
  187. .dt_compat = rz_g1_boards_compat_dt,
  188. MACHINE_END