rd88f5181l-ge-setup.c 4.9 KB

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  1. /*
  2. * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
  3. *
  4. * Marvell Orion-VoIP GE Reference Design Setup
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/gpio.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pci.h>
  15. #include <linux/irq.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/mv643xx_eth.h>
  18. #include <linux/ethtool.h>
  19. #include <linux/i2c.h>
  20. #include <linux/platform_data/dsa.h>
  21. #include <asm/mach-types.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach/pci.h>
  24. #include "common.h"
  25. #include "mpp.h"
  26. #include "orion5x.h"
  27. /*****************************************************************************
  28. * RD-88F5181L GE Info
  29. ****************************************************************************/
  30. /*
  31. * 16M NOR flash Device bus boot chip select
  32. */
  33. #define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000
  34. #define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M
  35. /*****************************************************************************
  36. * 16M NOR Flash on Device bus Boot chip select
  37. ****************************************************************************/
  38. static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
  39. .width = 1,
  40. };
  41. static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
  42. .flags = IORESOURCE_MEM,
  43. .start = RD88F5181L_GE_NOR_BOOT_BASE,
  44. .end = RD88F5181L_GE_NOR_BOOT_BASE +
  45. RD88F5181L_GE_NOR_BOOT_SIZE - 1,
  46. };
  47. static struct platform_device rd88f5181l_ge_nor_boot_flash = {
  48. .name = "physmap-flash",
  49. .id = 0,
  50. .dev = {
  51. .platform_data = &rd88f5181l_ge_nor_boot_flash_data,
  52. },
  53. .num_resources = 1,
  54. .resource = &rd88f5181l_ge_nor_boot_flash_resource,
  55. };
  56. /*****************************************************************************
  57. * General Setup
  58. ****************************************************************************/
  59. static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
  60. MPP0_GPIO, /* LED1 */
  61. MPP1_GPIO, /* LED5 */
  62. MPP2_GPIO, /* LED4 */
  63. MPP3_GPIO, /* LED3 */
  64. MPP4_GPIO, /* PCI_intA */
  65. MPP5_GPIO, /* RTC interrupt */
  66. MPP6_PCI_CLK, /* CPU PCI refclk */
  67. MPP7_PCI_CLK, /* PCI/PCIe refclk */
  68. MPP8_GPIO, /* 88e6131 interrupt */
  69. MPP9_GPIO, /* GE_RXERR */
  70. MPP10_GPIO, /* PCI_intB */
  71. MPP11_GPIO, /* LED2 */
  72. MPP12_GIGE, /* GE_TXD[4] */
  73. MPP13_GIGE, /* GE_TXD[5] */
  74. MPP14_GIGE, /* GE_TXD[6] */
  75. MPP15_GIGE, /* GE_TXD[7] */
  76. MPP16_GIGE, /* GE_RXD[4] */
  77. MPP17_GIGE, /* GE_RXD[5] */
  78. MPP18_GIGE, /* GE_RXD[6] */
  79. MPP19_GIGE, /* GE_RXD[7] */
  80. 0,
  81. };
  82. static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
  83. .phy_addr = MV643XX_ETH_PHY_NONE,
  84. .speed = SPEED_1000,
  85. .duplex = DUPLEX_FULL,
  86. };
  87. static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
  88. .port_names[0] = "lan2",
  89. .port_names[1] = "lan1",
  90. .port_names[2] = "wan",
  91. .port_names[3] = "cpu",
  92. .port_names[5] = "lan4",
  93. .port_names[7] = "lan3",
  94. };
  95. static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
  96. I2C_BOARD_INFO("ds1338", 0x68),
  97. };
  98. static void __init rd88f5181l_ge_init(void)
  99. {
  100. /*
  101. * Setup basic Orion functions. Need to be called early.
  102. */
  103. orion5x_init();
  104. orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
  105. /*
  106. * Configure peripherals.
  107. */
  108. orion5x_ehci0_init();
  109. orion5x_eth_init(&rd88f5181l_ge_eth_data);
  110. orion5x_eth_switch_init(&rd88f5181l_ge_switch_chip_data);
  111. orion5x_i2c_init();
  112. orion5x_uart0_init();
  113. mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
  114. ORION_MBUS_DEVBUS_BOOT_ATTR,
  115. RD88F5181L_GE_NOR_BOOT_BASE,
  116. RD88F5181L_GE_NOR_BOOT_SIZE);
  117. platform_device_register(&rd88f5181l_ge_nor_boot_flash);
  118. i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
  119. }
  120. static int __init
  121. rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  122. {
  123. int irq;
  124. /*
  125. * Check for devices with hard-wired IRQs.
  126. */
  127. irq = orion5x_pci_map_irq(dev, slot, pin);
  128. if (irq != -1)
  129. return irq;
  130. /*
  131. * Cardbus slot.
  132. */
  133. if (pin == 1)
  134. return gpio_to_irq(4);
  135. else
  136. return gpio_to_irq(10);
  137. }
  138. static struct hw_pci rd88f5181l_ge_pci __initdata = {
  139. .nr_controllers = 2,
  140. .setup = orion5x_pci_sys_setup,
  141. .scan = orion5x_pci_sys_scan_bus,
  142. .map_irq = rd88f5181l_ge_pci_map_irq,
  143. };
  144. static int __init rd88f5181l_ge_pci_init(void)
  145. {
  146. if (machine_is_rd88f5181l_ge()) {
  147. orion5x_pci_set_cardbus_mode();
  148. pci_common_init(&rd88f5181l_ge_pci);
  149. }
  150. return 0;
  151. }
  152. subsys_initcall(rd88f5181l_ge_pci_init);
  153. MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
  154. /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
  155. .atag_offset = 0x100,
  156. .nr_irqs = ORION5X_NR_IRQS,
  157. .init_machine = rd88f5181l_ge_init,
  158. .map_io = orion5x_map_io,
  159. .init_early = orion5x_init_early,
  160. .init_irq = orion5x_init_irq,
  161. .init_time = orion5x_timer_init,
  162. .fixup = tag_fixup_mem32,
  163. .restart = orion5x_restart,
  164. MACHINE_END