mvebu-soc-id.c 4.1 KB

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  1. /*
  2. * ID and revision information for mvebu SoCs
  3. *
  4. * Copyright (C) 2014 Marvell
  5. *
  6. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * All the mvebu SoCs have information related to their variant and
  13. * revision that can be read from the PCI control register. This is
  14. * done before the PCI initialization to avoid any conflict. Once the
  15. * ID and revision are retrieved, the mapping is freed.
  16. */
  17. #define pr_fmt(fmt) "mvebu-soc-id: " fmt
  18. #include <linux/clk.h>
  19. #include <linux/init.h>
  20. #include <linux/io.h>
  21. #include <linux/kernel.h>
  22. #include <linux/of.h>
  23. #include <linux/of_address.h>
  24. #include <linux/slab.h>
  25. #include <linux/sys_soc.h>
  26. #include "common.h"
  27. #include "mvebu-soc-id.h"
  28. #define PCIE_DEV_ID_OFF 0x0
  29. #define PCIE_DEV_REV_OFF 0x8
  30. #define SOC_ID_MASK 0xFFFF0000
  31. #define SOC_REV_MASK 0xFF
  32. static u32 soc_dev_id;
  33. static u32 soc_rev;
  34. static bool is_id_valid;
  35. static const struct of_device_id mvebu_pcie_of_match_table[] = {
  36. { .compatible = "marvell,armada-xp-pcie", },
  37. { .compatible = "marvell,armada-370-pcie", },
  38. { .compatible = "marvell,kirkwood-pcie" },
  39. {},
  40. };
  41. int mvebu_get_soc_id(u32 *dev, u32 *rev)
  42. {
  43. if (is_id_valid) {
  44. *dev = soc_dev_id;
  45. *rev = soc_rev;
  46. return 0;
  47. } else
  48. return -ENODEV;
  49. }
  50. static int __init get_soc_id_by_pci(void)
  51. {
  52. struct device_node *np;
  53. int ret = 0;
  54. void __iomem *pci_base;
  55. struct clk *clk;
  56. struct device_node *child;
  57. np = of_find_matching_node(NULL, mvebu_pcie_of_match_table);
  58. if (!np)
  59. return ret;
  60. /*
  61. * ID and revision are available from any port, so we
  62. * just pick the first one
  63. */
  64. child = of_get_next_child(np, NULL);
  65. if (child == NULL) {
  66. pr_err("cannot get pci node\n");
  67. ret = -ENOMEM;
  68. goto clk_err;
  69. }
  70. clk = of_clk_get_by_name(child, NULL);
  71. if (IS_ERR(clk)) {
  72. pr_err("cannot get clock\n");
  73. ret = -ENOMEM;
  74. goto clk_err;
  75. }
  76. ret = clk_prepare_enable(clk);
  77. if (ret) {
  78. pr_err("cannot enable clock\n");
  79. goto clk_err;
  80. }
  81. pci_base = of_iomap(child, 0);
  82. if (pci_base == NULL) {
  83. pr_err("cannot map registers\n");
  84. ret = -ENOMEM;
  85. goto res_ioremap;
  86. }
  87. /* SoC ID */
  88. soc_dev_id = readl(pci_base + PCIE_DEV_ID_OFF) >> 16;
  89. /* SoC revision */
  90. soc_rev = readl(pci_base + PCIE_DEV_REV_OFF) & SOC_REV_MASK;
  91. is_id_valid = true;
  92. pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev);
  93. iounmap(pci_base);
  94. res_ioremap:
  95. /*
  96. * If the PCIe unit is actually enabled and we have PCI
  97. * support in the kernel, we intentionally do not release the
  98. * reference to the clock. We want to keep it running since
  99. * the bootloader does some PCIe link configuration that the
  100. * kernel is for now unable to do, and gating the clock would
  101. * make us loose this precious configuration.
  102. */
  103. if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) {
  104. clk_disable_unprepare(clk);
  105. clk_put(clk);
  106. }
  107. clk_err:
  108. of_node_put(child);
  109. of_node_put(np);
  110. return ret;
  111. }
  112. static int __init mvebu_soc_id_init(void)
  113. {
  114. /*
  115. * First try to get the ID and the revision by the system
  116. * register and use PCI registers only if it is not possible
  117. */
  118. if (!mvebu_system_controller_get_soc_id(&soc_dev_id, &soc_rev)) {
  119. is_id_valid = true;
  120. pr_info("MVEBU SoC ID=0x%X, Rev=0x%X\n", soc_dev_id, soc_rev);
  121. return 0;
  122. }
  123. return get_soc_id_by_pci();
  124. }
  125. early_initcall(mvebu_soc_id_init);
  126. static int __init mvebu_soc_device(void)
  127. {
  128. struct soc_device_attribute *soc_dev_attr;
  129. struct soc_device *soc_dev;
  130. /* Also protects against running on non-mvebu systems */
  131. if (!is_id_valid)
  132. return 0;
  133. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  134. if (!soc_dev_attr)
  135. return -ENOMEM;
  136. soc_dev_attr->family = kasprintf(GFP_KERNEL, "Marvell");
  137. soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X", soc_rev);
  138. soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%X", soc_dev_id);
  139. soc_dev = soc_device_register(soc_dev_attr);
  140. if (IS_ERR(soc_dev)) {
  141. kfree(soc_dev_attr->family);
  142. kfree(soc_dev_attr->revision);
  143. kfree(soc_dev_attr->soc_id);
  144. kfree(soc_dev_attr);
  145. }
  146. return 0;
  147. }
  148. postcore_initcall(mvebu_soc_device);