board-v7.c 5.2 KB

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  1. /*
  2. * Device Tree support for Armada 370 and XP platforms.
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Lior Amsalem <alior@marvell.com>
  7. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  8. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public
  11. * License version 2. This program is licensed "as is" without any
  12. * warranty of any kind, whether express or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/of_address.h>
  17. #include <linux/of_fdt.h>
  18. #include <linux/io.h>
  19. #include <linux/clocksource.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/memblock.h>
  22. #include <linux/mbus.h>
  23. #include <linux/slab.h>
  24. #include <linux/irqchip.h>
  25. #include <asm/hardware/cache-l2x0.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/map.h>
  28. #include <asm/mach/time.h>
  29. #include <asm/smp_scu.h>
  30. #include "armada-370-xp.h"
  31. #include "common.h"
  32. #include "coherency.h"
  33. #include "mvebu-soc-id.h"
  34. static void __iomem *scu_base;
  35. /*
  36. * Enables the SCU when available. Obviously, this is only useful on
  37. * Cortex-A based SOCs, not on PJ4B based ones.
  38. */
  39. static void __init mvebu_scu_enable(void)
  40. {
  41. struct device_node *np =
  42. of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
  43. if (np) {
  44. scu_base = of_iomap(np, 0);
  45. scu_enable(scu_base);
  46. of_node_put(np);
  47. }
  48. }
  49. void __iomem *mvebu_get_scu_base(void)
  50. {
  51. return scu_base;
  52. }
  53. /*
  54. * When returning from suspend, the platform goes through the
  55. * bootloader, which executes its DDR3 training code. This code has
  56. * the unfortunate idea of using the first 10 KB of each DRAM bank to
  57. * exercise the RAM and calculate the optimal timings. Therefore, this
  58. * area of RAM is overwritten, and shouldn't be used by the kernel if
  59. * suspend/resume is supported.
  60. */
  61. #ifdef CONFIG_SUSPEND
  62. #define MVEBU_DDR_TRAINING_AREA_SZ (10 * SZ_1K)
  63. static int __init mvebu_scan_mem(unsigned long node, const char *uname,
  64. int depth, void *data)
  65. {
  66. const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
  67. const __be32 *reg, *endp;
  68. int l;
  69. if (type == NULL || strcmp(type, "memory"))
  70. return 0;
  71. reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
  72. if (reg == NULL)
  73. reg = of_get_flat_dt_prop(node, "reg", &l);
  74. if (reg == NULL)
  75. return 0;
  76. endp = reg + (l / sizeof(__be32));
  77. while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
  78. u64 base, size;
  79. base = dt_mem_next_cell(dt_root_addr_cells, &reg);
  80. size = dt_mem_next_cell(dt_root_size_cells, &reg);
  81. memblock_reserve(base, MVEBU_DDR_TRAINING_AREA_SZ);
  82. }
  83. return 0;
  84. }
  85. static void __init mvebu_memblock_reserve(void)
  86. {
  87. of_scan_flat_dt(mvebu_scan_mem, NULL);
  88. }
  89. #else
  90. static void __init mvebu_memblock_reserve(void) {}
  91. #endif
  92. static void __init mvebu_init_irq(void)
  93. {
  94. irqchip_init();
  95. mvebu_scu_enable();
  96. coherency_init();
  97. BUG_ON(mvebu_mbus_dt_init(coherency_available()));
  98. }
  99. static void __init i2c_quirk(void)
  100. {
  101. struct device_node *np;
  102. u32 dev, rev;
  103. /*
  104. * Only revisons more recent than A0 support the offload
  105. * mechanism. We can exit only if we are sure that we can
  106. * get the SoC revision and it is more recent than A0.
  107. */
  108. if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > MV78XX0_A0_REV)
  109. return;
  110. for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") {
  111. struct property *new_compat;
  112. new_compat = kzalloc(sizeof(*new_compat), GFP_KERNEL);
  113. new_compat->name = kstrdup("compatible", GFP_KERNEL);
  114. new_compat->length = sizeof("marvell,mv78230-a0-i2c");
  115. new_compat->value = kstrdup("marvell,mv78230-a0-i2c",
  116. GFP_KERNEL);
  117. of_update_property(np, new_compat);
  118. }
  119. }
  120. static void __init mvebu_dt_init(void)
  121. {
  122. if (of_machine_is_compatible("marvell,armadaxp"))
  123. i2c_quirk();
  124. }
  125. static void __init armada_370_xp_dt_fixup(void)
  126. {
  127. #ifdef CONFIG_SMP
  128. smp_set_ops(smp_ops(armada_xp_smp_ops));
  129. #endif
  130. }
  131. static const char * const armada_370_xp_dt_compat[] __initconst = {
  132. "marvell,armada-370-xp",
  133. NULL,
  134. };
  135. DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
  136. .l2c_aux_val = 0,
  137. .l2c_aux_mask = ~0,
  138. .init_machine = mvebu_dt_init,
  139. .init_irq = mvebu_init_irq,
  140. .restart = mvebu_restart,
  141. .reserve = mvebu_memblock_reserve,
  142. .dt_compat = armada_370_xp_dt_compat,
  143. .dt_fixup = armada_370_xp_dt_fixup,
  144. MACHINE_END
  145. static const char * const armada_375_dt_compat[] __initconst = {
  146. "marvell,armada375",
  147. NULL,
  148. };
  149. DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
  150. .l2c_aux_val = 0,
  151. .l2c_aux_mask = ~0,
  152. .init_irq = mvebu_init_irq,
  153. .init_machine = mvebu_dt_init,
  154. .restart = mvebu_restart,
  155. .dt_compat = armada_375_dt_compat,
  156. MACHINE_END
  157. static const char * const armada_38x_dt_compat[] __initconst = {
  158. "marvell,armada380",
  159. "marvell,armada385",
  160. NULL,
  161. };
  162. DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
  163. .l2c_aux_val = 0,
  164. .l2c_aux_mask = ~0,
  165. .init_irq = mvebu_init_irq,
  166. .restart = mvebu_restart,
  167. .dt_compat = armada_38x_dt_compat,
  168. MACHINE_END
  169. static const char * const armada_39x_dt_compat[] __initconst = {
  170. "marvell,armada390",
  171. "marvell,armada398",
  172. NULL,
  173. };
  174. DT_MACHINE_START(ARMADA_39X_DT, "Marvell Armada 39x (Device Tree)")
  175. .l2c_aux_val = 0,
  176. .l2c_aux_mask = ~0,
  177. .init_irq = mvebu_init_irq,
  178. .restart = mvebu_restart,
  179. .dt_compat = armada_39x_dt_compat,
  180. MACHINE_END