common.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * arch/arm/mach-lpc32xx/common.c
  4. *
  5. * Author: Kevin Wells <kevin.wells@nxp.com>
  6. *
  7. * Copyright (C) 2010 NXP Semiconductors
  8. */
  9. #include <linux/init.h>
  10. #include <linux/soc/nxp/lpc32xx-misc.h>
  11. #include <asm/mach/map.h>
  12. #include <asm/system_info.h>
  13. #include "lpc32xx.h"
  14. #include "common.h"
  15. /*
  16. * Returns the unique ID for the device
  17. */
  18. void lpc32xx_get_uid(u32 devid[4])
  19. {
  20. int i;
  21. for (i = 0; i < 4; i++)
  22. devid[i] = __raw_readl(LPC32XX_CLKPWR_DEVID(i << 2));
  23. }
  24. /*
  25. * Detects and returns IRAM size for the device variation
  26. */
  27. #define LPC32XX_IRAM_BANK_SIZE SZ_128K
  28. static u32 iram_size;
  29. u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr)
  30. {
  31. if (iram_size == 0) {
  32. u32 savedval1, savedval2;
  33. void __iomem *iramptr1, *iramptr2;
  34. iramptr1 = io_p2v(LPC32XX_IRAM_BASE);
  35. iramptr2 = io_p2v(LPC32XX_IRAM_BASE + LPC32XX_IRAM_BANK_SIZE);
  36. savedval1 = __raw_readl(iramptr1);
  37. savedval2 = __raw_readl(iramptr2);
  38. if (savedval1 == savedval2) {
  39. __raw_writel(savedval2 + 1, iramptr2);
  40. if (__raw_readl(iramptr1) == savedval2 + 1)
  41. iram_size = LPC32XX_IRAM_BANK_SIZE;
  42. else
  43. iram_size = LPC32XX_IRAM_BANK_SIZE * 2;
  44. __raw_writel(savedval2, iramptr2);
  45. } else
  46. iram_size = LPC32XX_IRAM_BANK_SIZE * 2;
  47. }
  48. if (dmaaddr)
  49. *dmaaddr = LPC32XX_IRAM_BASE;
  50. if (mapbase)
  51. *mapbase = io_p2v(LPC32XX_IRAM_BASE);
  52. return iram_size;
  53. }
  54. EXPORT_SYMBOL_GPL(lpc32xx_return_iram);
  55. void lpc32xx_set_phy_interface_mode(phy_interface_t mode)
  56. {
  57. u32 tmp = __raw_readl(LPC32XX_CLKPWR_MACCLK_CTRL);
  58. tmp &= ~LPC32XX_CLKPWR_MACCTRL_PINS_MSK;
  59. if (mode == PHY_INTERFACE_MODE_MII)
  60. tmp |= LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS;
  61. else
  62. tmp |= LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS;
  63. __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
  64. }
  65. EXPORT_SYMBOL_GPL(lpc32xx_set_phy_interface_mode);
  66. static struct map_desc lpc32xx_io_desc[] __initdata = {
  67. {
  68. .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START),
  69. .pfn = __phys_to_pfn(LPC32XX_AHB0_START),
  70. .length = LPC32XX_AHB0_SIZE,
  71. .type = MT_DEVICE
  72. },
  73. {
  74. .virtual = (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START),
  75. .pfn = __phys_to_pfn(LPC32XX_AHB1_START),
  76. .length = LPC32XX_AHB1_SIZE,
  77. .type = MT_DEVICE
  78. },
  79. {
  80. .virtual = (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START),
  81. .pfn = __phys_to_pfn(LPC32XX_FABAPB_START),
  82. .length = LPC32XX_FABAPB_SIZE,
  83. .type = MT_DEVICE
  84. },
  85. {
  86. .virtual = (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE),
  87. .pfn = __phys_to_pfn(LPC32XX_IRAM_BASE),
  88. .length = (LPC32XX_IRAM_BANK_SIZE * 2),
  89. .type = MT_DEVICE
  90. },
  91. };
  92. void __init lpc32xx_map_io(void)
  93. {
  94. iotable_init(lpc32xx_io_desc, ARRAY_SIZE(lpc32xx_io_desc));
  95. }
  96. static int __init lpc32xx_check_uid(void)
  97. {
  98. u32 uid[4];
  99. lpc32xx_get_uid(uid);
  100. printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",
  101. uid[3], uid[2], uid[1], uid[0]);
  102. if (!system_serial_low && !system_serial_high) {
  103. system_serial_low = uid[0];
  104. system_serial_high = uid[1];
  105. }
  106. return 1;
  107. }
  108. arch_initcall(lpc32xx_check_uid);