fsg-pci.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * arch/arch/mach-ixp4xx/fsg-pci.c
  4. *
  5. * FSG board-level PCI initialization
  6. *
  7. * Author: Rod Whitby <rod@whitby.id.au>
  8. * Maintainer: http://www.nslu2-linux.org/
  9. *
  10. * based on ixdp425-pci.c:
  11. * Copyright (C) 2002 Intel Corporation.
  12. * Copyright (C) 2003-2004 MontaVista Software, Inc.
  13. */
  14. #include <linux/pci.h>
  15. #include <linux/init.h>
  16. #include <linux/irq.h>
  17. #include <asm/mach/pci.h>
  18. #include <asm/mach-types.h>
  19. #include "irqs.h"
  20. #define MAX_DEV 3
  21. #define IRQ_LINES 3
  22. /* PCI controller GPIO to IRQ pin mappings */
  23. #define INTA 6
  24. #define INTB 7
  25. #define INTC 5
  26. void __init fsg_pci_preinit(void)
  27. {
  28. irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
  29. irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
  30. irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
  31. ixp4xx_pci_preinit();
  32. }
  33. static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  34. {
  35. static int pci_irq_table[IRQ_LINES] = {
  36. IXP4XX_GPIO_IRQ(INTC),
  37. IXP4XX_GPIO_IRQ(INTB),
  38. IXP4XX_GPIO_IRQ(INTA),
  39. };
  40. int irq = -1;
  41. slot -= 11;
  42. if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
  43. irq = pci_irq_table[slot - 1];
  44. printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
  45. __func__, slot, pin, irq);
  46. return irq;
  47. }
  48. struct hw_pci fsg_pci __initdata = {
  49. .nr_controllers = 1,
  50. .ops = &ixp4xx_ops,
  51. .preinit = fsg_pci_preinit,
  52. .setup = ixp4xx_setup,
  53. .map_irq = fsg_map_irq,
  54. };
  55. int __init fsg_pci_init(void)
  56. {
  57. if (machine_is_fsg())
  58. pci_common_init(&fsg_pci);
  59. return 0;
  60. }
  61. subsys_initcall(fsg_pci_init);