core.c 7.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/mach-ebsa110/core.c
  4. *
  5. * Copyright (C) 1998-2001 Russell King
  6. *
  7. * Extra MM routines for the EBSA-110 architecture
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/mm.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/serial_8250.h>
  13. #include <linux/init.h>
  14. #include <linux/io.h>
  15. #include <mach/hardware.h>
  16. #include <asm/irq.h>
  17. #include <asm/setup.h>
  18. #include <asm/mach-types.h>
  19. #include <asm/page.h>
  20. #include <asm/system_misc.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/irq.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/time.h>
  25. #include "core.h"
  26. static void ebsa110_mask_irq(struct irq_data *d)
  27. {
  28. __raw_writeb(1 << d->irq, IRQ_MCLR);
  29. }
  30. static void ebsa110_unmask_irq(struct irq_data *d)
  31. {
  32. __raw_writeb(1 << d->irq, IRQ_MSET);
  33. }
  34. static struct irq_chip ebsa110_irq_chip = {
  35. .irq_ack = ebsa110_mask_irq,
  36. .irq_mask = ebsa110_mask_irq,
  37. .irq_unmask = ebsa110_unmask_irq,
  38. };
  39. static void __init ebsa110_init_irq(void)
  40. {
  41. unsigned long flags;
  42. unsigned int irq;
  43. local_irq_save(flags);
  44. __raw_writeb(0xff, IRQ_MCLR);
  45. __raw_writeb(0x55, IRQ_MSET);
  46. __raw_writeb(0x00, IRQ_MSET);
  47. if (__raw_readb(IRQ_MASK) != 0x55)
  48. while (1);
  49. __raw_writeb(0xff, IRQ_MCLR); /* clear all interrupt enables */
  50. local_irq_restore(flags);
  51. for (irq = 0; irq < NR_IRQS; irq++) {
  52. irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
  53. handle_level_irq);
  54. irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
  55. }
  56. }
  57. static struct map_desc ebsa110_io_desc[] __initdata = {
  58. /*
  59. * sparse external-decode ISAIO space
  60. */
  61. { /* IRQ_STAT/IRQ_MCLR */
  62. .virtual = (unsigned long)IRQ_STAT,
  63. .pfn = __phys_to_pfn(TRICK4_PHYS),
  64. .length = TRICK4_SIZE,
  65. .type = MT_DEVICE
  66. }, { /* IRQ_MASK/IRQ_MSET */
  67. .virtual = (unsigned long)IRQ_MASK,
  68. .pfn = __phys_to_pfn(TRICK3_PHYS),
  69. .length = TRICK3_SIZE,
  70. .type = MT_DEVICE
  71. }, { /* SOFT_BASE */
  72. .virtual = (unsigned long)SOFT_BASE,
  73. .pfn = __phys_to_pfn(TRICK1_PHYS),
  74. .length = TRICK1_SIZE,
  75. .type = MT_DEVICE
  76. }, { /* PIT_BASE */
  77. .virtual = (unsigned long)PIT_BASE,
  78. .pfn = __phys_to_pfn(TRICK0_PHYS),
  79. .length = TRICK0_SIZE,
  80. .type = MT_DEVICE
  81. },
  82. /*
  83. * self-decode ISAIO space
  84. */
  85. {
  86. .virtual = ISAIO_BASE,
  87. .pfn = __phys_to_pfn(ISAIO_PHYS),
  88. .length = ISAIO_SIZE,
  89. .type = MT_DEVICE
  90. }, {
  91. .virtual = ISAMEM_BASE,
  92. .pfn = __phys_to_pfn(ISAMEM_PHYS),
  93. .length = ISAMEM_SIZE,
  94. .type = MT_DEVICE
  95. }
  96. };
  97. static void __init ebsa110_map_io(void)
  98. {
  99. iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
  100. }
  101. static void __iomem *ebsa110_ioremap_caller(phys_addr_t cookie, size_t size,
  102. unsigned int flags, void *caller)
  103. {
  104. return (void __iomem *)cookie;
  105. }
  106. static void ebsa110_iounmap(volatile void __iomem *io_addr)
  107. {}
  108. static void __init ebsa110_init_early(void)
  109. {
  110. arch_ioremap_caller = ebsa110_ioremap_caller;
  111. arch_iounmap = ebsa110_iounmap;
  112. }
  113. #define PIT_CTRL (PIT_BASE + 0x0d)
  114. #define PIT_T2 (PIT_BASE + 0x09)
  115. #define PIT_T1 (PIT_BASE + 0x05)
  116. #define PIT_T0 (PIT_BASE + 0x01)
  117. /*
  118. * This is the rate at which your MCLK signal toggles (in Hz)
  119. * This was measured on a 10 digit frequency counter sampling
  120. * over 1 second.
  121. */
  122. #define MCLK 47894000
  123. /*
  124. * This is the rate at which the PIT timers get clocked
  125. */
  126. #define CLKBY7 (MCLK / 7)
  127. /*
  128. * This is the counter value. We tick at 200Hz on this platform.
  129. */
  130. #define COUNT ((CLKBY7 + (HZ / 2)) / HZ)
  131. /*
  132. * Get the time offset from the system PIT. Note that if we have missed an
  133. * interrupt, then the PIT counter will roll over (ie, be negative).
  134. * This actually works out to be convenient.
  135. */
  136. static u32 ebsa110_gettimeoffset(void)
  137. {
  138. unsigned long offset, count;
  139. __raw_writeb(0x40, PIT_CTRL);
  140. count = __raw_readb(PIT_T1);
  141. count |= __raw_readb(PIT_T1) << 8;
  142. /*
  143. * If count > COUNT, make the number negative.
  144. */
  145. if (count > COUNT)
  146. count |= 0xffff0000;
  147. offset = COUNT;
  148. offset -= count;
  149. /*
  150. * `offset' is in units of timer counts. Convert
  151. * offset to units of microseconds.
  152. */
  153. offset = offset * (1000000 / HZ) / COUNT;
  154. return offset * 1000;
  155. }
  156. static irqreturn_t
  157. ebsa110_timer_interrupt(int irq, void *dev_id)
  158. {
  159. u32 count;
  160. /* latch and read timer 1 */
  161. __raw_writeb(0x40, PIT_CTRL);
  162. count = __raw_readb(PIT_T1);
  163. count |= __raw_readb(PIT_T1) << 8;
  164. count += COUNT;
  165. __raw_writeb(count & 0xff, PIT_T1);
  166. __raw_writeb(count >> 8, PIT_T1);
  167. timer_tick();
  168. return IRQ_HANDLED;
  169. }
  170. /*
  171. * Set up timer interrupt.
  172. */
  173. void __init ebsa110_timer_init(void)
  174. {
  175. int irq = IRQ_EBSA110_TIMER0;
  176. arch_gettimeoffset = ebsa110_gettimeoffset;
  177. /*
  178. * Timer 1, mode 2, LSB/MSB
  179. */
  180. __raw_writeb(0x70, PIT_CTRL);
  181. __raw_writeb(COUNT & 0xff, PIT_T1);
  182. __raw_writeb(COUNT >> 8, PIT_T1);
  183. if (request_irq(irq, ebsa110_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
  184. "EBSA110 Timer Tick", NULL))
  185. pr_err("Failed to request irq %d (EBSA110 Timer Tick)\n", irq);
  186. }
  187. static struct plat_serial8250_port serial_platform_data[] = {
  188. {
  189. .iobase = 0x3f8,
  190. .irq = 1,
  191. .uartclk = 1843200,
  192. .regshift = 0,
  193. .iotype = UPIO_PORT,
  194. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  195. },
  196. {
  197. .iobase = 0x2f8,
  198. .irq = 2,
  199. .uartclk = 1843200,
  200. .regshift = 0,
  201. .iotype = UPIO_PORT,
  202. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  203. },
  204. { },
  205. };
  206. static struct platform_device serial_device = {
  207. .name = "serial8250",
  208. .id = PLAT8250_DEV_PLATFORM,
  209. .dev = {
  210. .platform_data = serial_platform_data,
  211. },
  212. };
  213. static struct resource am79c961_resources[] = {
  214. {
  215. .start = 0x220,
  216. .end = 0x238,
  217. .flags = IORESOURCE_IO,
  218. }, {
  219. .start = IRQ_EBSA110_ETHERNET,
  220. .end = IRQ_EBSA110_ETHERNET,
  221. .flags = IORESOURCE_IRQ,
  222. },
  223. };
  224. static struct platform_device am79c961_device = {
  225. .name = "am79c961",
  226. .id = -1,
  227. .num_resources = ARRAY_SIZE(am79c961_resources),
  228. .resource = am79c961_resources,
  229. };
  230. static struct platform_device *ebsa110_devices[] = {
  231. &serial_device,
  232. &am79c961_device,
  233. };
  234. /*
  235. * EBSA110 idling methodology:
  236. *
  237. * We can not execute the "wait for interrupt" instruction since that
  238. * will stop our MCLK signal (which provides the clock for the glue
  239. * logic, and therefore the timer interrupt).
  240. *
  241. * Instead, we spin, polling the IRQ_STAT register for the occurrence
  242. * of any interrupt with core clock down to the memory clock.
  243. */
  244. static void ebsa110_idle(void)
  245. {
  246. const char *irq_stat = (char *)0xff000000;
  247. /* disable clock switching */
  248. asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
  249. /* wait for an interrupt to occur */
  250. while (!*irq_stat);
  251. /* enable clock switching */
  252. asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
  253. }
  254. static int __init ebsa110_init(void)
  255. {
  256. arm_pm_idle = ebsa110_idle;
  257. return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
  258. }
  259. arch_initcall(ebsa110_init);
  260. static void ebsa110_restart(enum reboot_mode mode, const char *cmd)
  261. {
  262. soft_restart(0x80000000);
  263. }
  264. MACHINE_START(EBSA110, "EBSA110")
  265. /* Maintainer: Russell King */
  266. .atag_offset = 0x400,
  267. .reserve_lp0 = 1,
  268. .reserve_lp2 = 1,
  269. .map_io = ebsa110_map_io,
  270. .init_early = ebsa110_init_early,
  271. .init_irq = ebsa110_init_irq,
  272. .init_time = ebsa110_timer_init,
  273. .restart = ebsa110_restart,
  274. MACHINE_END