irqs.h 12 KB

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  1. /*
  2. * DaVinci interrupt controller definitions
  3. *
  4. * Copyright (C) 2006 Texas Instruments.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  12. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  13. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  14. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  15. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  17. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  19. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21. *
  22. * You should have received a copy of the GNU General Public License along
  23. * with this program; if not, write to the Free Software Foundation, Inc.,
  24. * 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. #ifndef __ASM_ARCH_IRQS_H
  28. #define __ASM_ARCH_IRQS_H
  29. /* Base address */
  30. #define DAVINCI_ARM_INTC_BASE 0x01C48000
  31. /* Interrupt lines */
  32. #define IRQ_VDINT0 0
  33. #define IRQ_VDINT1 1
  34. #define IRQ_VDINT2 2
  35. #define IRQ_HISTINT 3
  36. #define IRQ_H3AINT 4
  37. #define IRQ_PRVUINT 5
  38. #define IRQ_RSZINT 6
  39. #define IRQ_VFOCINT 7
  40. #define IRQ_VENCINT 8
  41. #define IRQ_ASQINT 9
  42. #define IRQ_IMXINT 10
  43. #define IRQ_VLCDINT 11
  44. #define IRQ_USBINT 12
  45. #define IRQ_EMACINT 13
  46. #define IRQ_CCINT0 16
  47. #define IRQ_CCERRINT 17
  48. #define IRQ_TCERRINT0 18
  49. #define IRQ_TCERRINT 19
  50. #define IRQ_PSCIN 20
  51. #define IRQ_IDE 22
  52. #define IRQ_HPIINT 23
  53. #define IRQ_MBXINT 24
  54. #define IRQ_MBRINT 25
  55. #define IRQ_MMCINT 26
  56. #define IRQ_SDIOINT 27
  57. #define IRQ_MSINT 28
  58. #define IRQ_DDRINT 29
  59. #define IRQ_AEMIFINT 30
  60. #define IRQ_VLQINT 31
  61. #define IRQ_TINT0_TINT12 32
  62. #define IRQ_TINT0_TINT34 33
  63. #define IRQ_TINT1_TINT12 34
  64. #define IRQ_TINT1_TINT34 35
  65. #define IRQ_PWMINT0 36
  66. #define IRQ_PWMINT1 37
  67. #define IRQ_PWMINT2 38
  68. #define IRQ_I2C 39
  69. #define IRQ_UARTINT0 40
  70. #define IRQ_UARTINT1 41
  71. #define IRQ_UARTINT2 42
  72. #define IRQ_SPINT0 43
  73. #define IRQ_SPINT1 44
  74. #define IRQ_DSP2ARM0 46
  75. #define IRQ_DSP2ARM1 47
  76. #define IRQ_GPIO0 48
  77. #define IRQ_GPIO1 49
  78. #define IRQ_GPIO2 50
  79. #define IRQ_GPIO3 51
  80. #define IRQ_GPIO4 52
  81. #define IRQ_GPIO5 53
  82. #define IRQ_GPIO6 54
  83. #define IRQ_GPIO7 55
  84. #define IRQ_GPIOBNK0 56
  85. #define IRQ_GPIOBNK1 57
  86. #define IRQ_GPIOBNK2 58
  87. #define IRQ_GPIOBNK3 59
  88. #define IRQ_GPIOBNK4 60
  89. #define IRQ_COMMTX 61
  90. #define IRQ_COMMRX 62
  91. #define IRQ_EMUINT 63
  92. #define DAVINCI_N_AINTC_IRQ 64
  93. #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
  94. /* DaVinci DM6467-specific Interrupts */
  95. #define IRQ_DM646X_VP_VERTINT0 0
  96. #define IRQ_DM646X_VP_VERTINT1 1
  97. #define IRQ_DM646X_VP_VERTINT2 2
  98. #define IRQ_DM646X_VP_VERTINT3 3
  99. #define IRQ_DM646X_VP_ERRINT 4
  100. #define IRQ_DM646X_RESERVED_1 5
  101. #define IRQ_DM646X_RESERVED_2 6
  102. #define IRQ_DM646X_WDINT 7
  103. #define IRQ_DM646X_CRGENINT0 8
  104. #define IRQ_DM646X_CRGENINT1 9
  105. #define IRQ_DM646X_TSIFINT0 10
  106. #define IRQ_DM646X_TSIFINT1 11
  107. #define IRQ_DM646X_VDCEINT 12
  108. #define IRQ_DM646X_USBINT 13
  109. #define IRQ_DM646X_USBDMAINT 14
  110. #define IRQ_DM646X_PCIINT 15
  111. #define IRQ_DM646X_TCERRINT2 20
  112. #define IRQ_DM646X_TCERRINT3 21
  113. #define IRQ_DM646X_IDE 22
  114. #define IRQ_DM646X_HPIINT 23
  115. #define IRQ_DM646X_EMACRXTHINT 24
  116. #define IRQ_DM646X_EMACRXINT 25
  117. #define IRQ_DM646X_EMACTXINT 26
  118. #define IRQ_DM646X_EMACMISCINT 27
  119. #define IRQ_DM646X_MCASP0TXINT 28
  120. #define IRQ_DM646X_MCASP0RXINT 29
  121. #define IRQ_DM646X_MCASP1TXINT 30
  122. #define IRQ_DM646X_RESERVED_3 31
  123. #define IRQ_DM646X_VLQINT 38
  124. #define IRQ_DM646X_UARTINT2 42
  125. #define IRQ_DM646X_SPINT0 43
  126. #define IRQ_DM646X_SPINT1 44
  127. #define IRQ_DM646X_DSP2ARMINT 45
  128. #define IRQ_DM646X_RESERVED_4 46
  129. #define IRQ_DM646X_PSCINT 47
  130. #define IRQ_DM646X_GPIO0 48
  131. #define IRQ_DM646X_GPIO1 49
  132. #define IRQ_DM646X_GPIO2 50
  133. #define IRQ_DM646X_GPIO3 51
  134. #define IRQ_DM646X_GPIO4 52
  135. #define IRQ_DM646X_GPIO5 53
  136. #define IRQ_DM646X_GPIO6 54
  137. #define IRQ_DM646X_GPIO7 55
  138. #define IRQ_DM646X_GPIOBNK0 56
  139. #define IRQ_DM646X_GPIOBNK1 57
  140. #define IRQ_DM646X_GPIOBNK2 58
  141. #define IRQ_DM646X_DDRINT 59
  142. #define IRQ_DM646X_AEMIFINT 60
  143. /* DaVinci DM355-specific Interrupts */
  144. #define IRQ_DM355_CCDC_VDINT0 0
  145. #define IRQ_DM355_CCDC_VDINT1 1
  146. #define IRQ_DM355_CCDC_VDINT2 2
  147. #define IRQ_DM355_IPIPE_HST 3
  148. #define IRQ_DM355_H3AINT 4
  149. #define IRQ_DM355_IPIPE_SDR 5
  150. #define IRQ_DM355_IPIPEIFINT 6
  151. #define IRQ_DM355_OSDINT 7
  152. #define IRQ_DM355_VENCINT 8
  153. #define IRQ_DM355_IMCOPINT 11
  154. #define IRQ_DM355_RTOINT 13
  155. #define IRQ_DM355_TINT4 13
  156. #define IRQ_DM355_TINT2_TINT12 13
  157. #define IRQ_DM355_UARTINT2 14
  158. #define IRQ_DM355_TINT5 14
  159. #define IRQ_DM355_TINT2_TINT34 14
  160. #define IRQ_DM355_TINT6 15
  161. #define IRQ_DM355_TINT3_TINT12 15
  162. #define IRQ_DM355_SPINT1_0 17
  163. #define IRQ_DM355_SPINT1_1 18
  164. #define IRQ_DM355_SPINT2_0 19
  165. #define IRQ_DM355_SPINT2_1 21
  166. #define IRQ_DM355_TINT7 22
  167. #define IRQ_DM355_TINT3_TINT34 22
  168. #define IRQ_DM355_SDIOINT0 23
  169. #define IRQ_DM355_MMCINT0 26
  170. #define IRQ_DM355_MSINT 26
  171. #define IRQ_DM355_MMCINT1 27
  172. #define IRQ_DM355_PWMINT3 28
  173. #define IRQ_DM355_SDIOINT1 31
  174. #define IRQ_DM355_SPINT0_0 42
  175. #define IRQ_DM355_SPINT0_1 43
  176. #define IRQ_DM355_GPIO0 44
  177. #define IRQ_DM355_GPIO1 45
  178. #define IRQ_DM355_GPIO2 46
  179. #define IRQ_DM355_GPIO3 47
  180. #define IRQ_DM355_GPIO4 48
  181. #define IRQ_DM355_GPIO5 49
  182. #define IRQ_DM355_GPIO6 50
  183. #define IRQ_DM355_GPIO7 51
  184. #define IRQ_DM355_GPIO8 52
  185. #define IRQ_DM355_GPIO9 53
  186. #define IRQ_DM355_GPIOBNK0 54
  187. #define IRQ_DM355_GPIOBNK1 55
  188. #define IRQ_DM355_GPIOBNK2 56
  189. #define IRQ_DM355_GPIOBNK3 57
  190. #define IRQ_DM355_GPIOBNK4 58
  191. #define IRQ_DM355_GPIOBNK5 59
  192. #define IRQ_DM355_GPIOBNK6 60
  193. /* DaVinci DM365-specific Interrupts */
  194. #define IRQ_DM365_INSFINT 7
  195. #define IRQ_DM365_IMXINT1 8
  196. #define IRQ_DM365_IMXINT0 10
  197. #define IRQ_DM365_KLD_ARMINT 10
  198. #define IRQ_DM365_IMCOPINT 11
  199. #define IRQ_DM365_RTOINT 13
  200. #define IRQ_DM365_TINT5 14
  201. #define IRQ_DM365_TINT6 15
  202. #define IRQ_DM365_SPINT2_1 21
  203. #define IRQ_DM365_TINT7 22
  204. #define IRQ_DM365_SDIOINT0 23
  205. #define IRQ_DM365_MMCINT1 27
  206. #define IRQ_DM365_PWMINT3 28
  207. #define IRQ_DM365_RTCINT 29
  208. #define IRQ_DM365_SDIOINT1 31
  209. #define IRQ_DM365_SPIINT0_0 42
  210. #define IRQ_DM365_SPIINT3_0 43
  211. #define IRQ_DM365_GPIO0 44
  212. #define IRQ_DM365_GPIO1 45
  213. #define IRQ_DM365_GPIO2 46
  214. #define IRQ_DM365_GPIO3 47
  215. #define IRQ_DM365_GPIO4 48
  216. #define IRQ_DM365_GPIO5 49
  217. #define IRQ_DM365_GPIO6 50
  218. #define IRQ_DM365_GPIO7 51
  219. #define IRQ_DM365_EMAC_RXTHRESH 52
  220. #define IRQ_DM365_EMAC_RXPULSE 53
  221. #define IRQ_DM365_EMAC_TXPULSE 54
  222. #define IRQ_DM365_EMAC_MISCPULSE 55
  223. #define IRQ_DM365_GPIO12 56
  224. #define IRQ_DM365_GPIO13 57
  225. #define IRQ_DM365_GPIO14 58
  226. #define IRQ_DM365_GPIO15 59
  227. #define IRQ_DM365_ADCINT 59
  228. #define IRQ_DM365_KEYINT 60
  229. #define IRQ_DM365_TCERRINT2 61
  230. #define IRQ_DM365_TCERRINT3 62
  231. #define IRQ_DM365_EMUINT 63
  232. /* DA8XX interrupts */
  233. #define IRQ_DA8XX_COMMTX 0
  234. #define IRQ_DA8XX_COMMRX 1
  235. #define IRQ_DA8XX_NINT 2
  236. #define IRQ_DA8XX_EVTOUT0 3
  237. #define IRQ_DA8XX_EVTOUT1 4
  238. #define IRQ_DA8XX_EVTOUT2 5
  239. #define IRQ_DA8XX_EVTOUT3 6
  240. #define IRQ_DA8XX_EVTOUT4 7
  241. #define IRQ_DA8XX_EVTOUT5 8
  242. #define IRQ_DA8XX_EVTOUT6 9
  243. #define IRQ_DA8XX_EVTOUT7 10
  244. #define IRQ_DA8XX_CCINT0 11
  245. #define IRQ_DA8XX_CCERRINT 12
  246. #define IRQ_DA8XX_TCERRINT0 13
  247. #define IRQ_DA8XX_AEMIFINT 14
  248. #define IRQ_DA8XX_I2CINT0 15
  249. #define IRQ_DA8XX_MMCSDINT0 16
  250. #define IRQ_DA8XX_MMCSDINT1 17
  251. #define IRQ_DA8XX_ALLINT0 18
  252. #define IRQ_DA8XX_RTC 19
  253. #define IRQ_DA8XX_SPINT0 20
  254. #define IRQ_DA8XX_TINT12_0 21
  255. #define IRQ_DA8XX_TINT34_0 22
  256. #define IRQ_DA8XX_TINT12_1 23
  257. #define IRQ_DA8XX_TINT34_1 24
  258. #define IRQ_DA8XX_UARTINT0 25
  259. #define IRQ_DA8XX_KEYMGRINT 26
  260. #define IRQ_DA8XX_SECINT 26
  261. #define IRQ_DA8XX_SECKEYERR 26
  262. #define IRQ_DA8XX_CHIPINT0 28
  263. #define IRQ_DA8XX_CHIPINT1 29
  264. #define IRQ_DA8XX_CHIPINT2 30
  265. #define IRQ_DA8XX_CHIPINT3 31
  266. #define IRQ_DA8XX_TCERRINT1 32
  267. #define IRQ_DA8XX_C0_RX_THRESH_PULSE 33
  268. #define IRQ_DA8XX_C0_RX_PULSE 34
  269. #define IRQ_DA8XX_C0_TX_PULSE 35
  270. #define IRQ_DA8XX_C0_MISC_PULSE 36
  271. #define IRQ_DA8XX_C1_RX_THRESH_PULSE 37
  272. #define IRQ_DA8XX_C1_RX_PULSE 38
  273. #define IRQ_DA8XX_C1_TX_PULSE 39
  274. #define IRQ_DA8XX_C1_MISC_PULSE 40
  275. #define IRQ_DA8XX_MEMERR 41
  276. #define IRQ_DA8XX_GPIO0 42
  277. #define IRQ_DA8XX_GPIO1 43
  278. #define IRQ_DA8XX_GPIO2 44
  279. #define IRQ_DA8XX_GPIO3 45
  280. #define IRQ_DA8XX_GPIO4 46
  281. #define IRQ_DA8XX_GPIO5 47
  282. #define IRQ_DA8XX_GPIO6 48
  283. #define IRQ_DA8XX_GPIO7 49
  284. #define IRQ_DA8XX_GPIO8 50
  285. #define IRQ_DA8XX_I2CINT1 51
  286. #define IRQ_DA8XX_LCDINT 52
  287. #define IRQ_DA8XX_UARTINT1 53
  288. #define IRQ_DA8XX_MCASPINT 54
  289. #define IRQ_DA8XX_ALLINT1 55
  290. #define IRQ_DA8XX_SPINT1 56
  291. #define IRQ_DA8XX_UHPI_INT1 57
  292. #define IRQ_DA8XX_USB_INT 58
  293. #define IRQ_DA8XX_IRQN 59
  294. #define IRQ_DA8XX_RWAKEUP 60
  295. #define IRQ_DA8XX_UARTINT2 61
  296. #define IRQ_DA8XX_DFTSSINT 62
  297. #define IRQ_DA8XX_EHRPWM0 63
  298. #define IRQ_DA8XX_EHRPWM0TZ 64
  299. #define IRQ_DA8XX_EHRPWM1 65
  300. #define IRQ_DA8XX_EHRPWM1TZ 66
  301. #define IRQ_DA8XX_ECAP0 69
  302. #define IRQ_DA8XX_ECAP1 70
  303. #define IRQ_DA8XX_ECAP2 71
  304. #define IRQ_DA8XX_ARMCLKSTOPREQ 90
  305. /* DA830 specific interrupts */
  306. #define IRQ_DA830_MPUERR 27
  307. #define IRQ_DA830_IOPUERR 27
  308. #define IRQ_DA830_BOOTCFGERR 27
  309. #define IRQ_DA830_EHRPWM2 67
  310. #define IRQ_DA830_EHRPWM2TZ 68
  311. #define IRQ_DA830_EQEP0 72
  312. #define IRQ_DA830_EQEP1 73
  313. #define IRQ_DA830_T12CMPINT0_0 74
  314. #define IRQ_DA830_T12CMPINT1_0 75
  315. #define IRQ_DA830_T12CMPINT2_0 76
  316. #define IRQ_DA830_T12CMPINT3_0 77
  317. #define IRQ_DA830_T12CMPINT4_0 78
  318. #define IRQ_DA830_T12CMPINT5_0 79
  319. #define IRQ_DA830_T12CMPINT6_0 80
  320. #define IRQ_DA830_T12CMPINT7_0 81
  321. #define IRQ_DA830_T12CMPINT0_1 82
  322. #define IRQ_DA830_T12CMPINT1_1 83
  323. #define IRQ_DA830_T12CMPINT2_1 84
  324. #define IRQ_DA830_T12CMPINT3_1 85
  325. #define IRQ_DA830_T12CMPINT4_1 86
  326. #define IRQ_DA830_T12CMPINT5_1 87
  327. #define IRQ_DA830_T12CMPINT6_1 88
  328. #define IRQ_DA830_T12CMPINT7_1 89
  329. #define DA830_N_CP_INTC_IRQ 96
  330. /* DA850 speicific interrupts */
  331. #define IRQ_DA850_MPUADDRERR0 27
  332. #define IRQ_DA850_MPUPROTERR0 27
  333. #define IRQ_DA850_IOPUADDRERR0 27
  334. #define IRQ_DA850_IOPUPROTERR0 27
  335. #define IRQ_DA850_IOPUADDRERR1 27
  336. #define IRQ_DA850_IOPUPROTERR1 27
  337. #define IRQ_DA850_IOPUADDRERR2 27
  338. #define IRQ_DA850_IOPUPROTERR2 27
  339. #define IRQ_DA850_BOOTCFG_ADDR_ERR 27
  340. #define IRQ_DA850_BOOTCFG_PROT_ERR 27
  341. #define IRQ_DA850_MPUADDRERR1 27
  342. #define IRQ_DA850_MPUPROTERR1 27
  343. #define IRQ_DA850_IOPUADDRERR3 27
  344. #define IRQ_DA850_IOPUPROTERR3 27
  345. #define IRQ_DA850_IOPUADDRERR4 27
  346. #define IRQ_DA850_IOPUPROTERR4 27
  347. #define IRQ_DA850_IOPUADDRERR5 27
  348. #define IRQ_DA850_IOPUPROTERR5 27
  349. #define IRQ_DA850_MIOPU_BOOTCFG_ERR 27
  350. #define IRQ_DA850_SATAINT 67
  351. #define IRQ_DA850_TINT12_2 68
  352. #define IRQ_DA850_TINT34_2 68
  353. #define IRQ_DA850_TINTALL_2 68
  354. #define IRQ_DA850_MMCSDINT0_1 72
  355. #define IRQ_DA850_MMCSDINT1_1 73
  356. #define IRQ_DA850_T12CMPINT0_2 74
  357. #define IRQ_DA850_T12CMPINT1_2 75
  358. #define IRQ_DA850_T12CMPINT2_2 76
  359. #define IRQ_DA850_T12CMPINT3_2 77
  360. #define IRQ_DA850_T12CMPINT4_2 78
  361. #define IRQ_DA850_T12CMPINT5_2 79
  362. #define IRQ_DA850_T12CMPINT6_2 80
  363. #define IRQ_DA850_T12CMPINT7_2 81
  364. #define IRQ_DA850_T12CMPINT0_3 82
  365. #define IRQ_DA850_T12CMPINT1_3 83
  366. #define IRQ_DA850_T12CMPINT2_3 84
  367. #define IRQ_DA850_T12CMPINT3_3 85
  368. #define IRQ_DA850_T12CMPINT4_3 86
  369. #define IRQ_DA850_T12CMPINT5_3 87
  370. #define IRQ_DA850_T12CMPINT6_3 88
  371. #define IRQ_DA850_T12CMPINT7_3 89
  372. #define IRQ_DA850_RPIINT 91
  373. #define IRQ_DA850_VPIFINT 92
  374. #define IRQ_DA850_CCINT1 93
  375. #define IRQ_DA850_CCERRINT1 94
  376. #define IRQ_DA850_TCERRINT2 95
  377. #define IRQ_DA850_TINT12_3 96
  378. #define IRQ_DA850_TINT34_3 96
  379. #define IRQ_DA850_TINTALL_3 96
  380. #define IRQ_DA850_MCBSP0RINT 97
  381. #define IRQ_DA850_MCBSP0XINT 98
  382. #define IRQ_DA850_MCBSP1RINT 99
  383. #define IRQ_DA850_MCBSP1XINT 100
  384. #define DA850_N_CP_INTC_IRQ 101
  385. /* da850 currently has the most gpio pins (144) */
  386. #define DAVINCI_N_GPIO 144
  387. /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
  388. #endif /* __ASM_ARCH_IRQS_H */