davinci.h 4.8 KB

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  1. /*
  2. * This file contains the processor specific definitions
  3. * of the TI DM644x, DM355, DM365, and DM646x.
  4. *
  5. * Copyright (C) 2011 Texas Instruments Incorporated
  6. * Copyright (c) 2007 Deep Root Systems, LLC
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2.
  11. *
  12. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  13. * kind, whether express or implied; without even the implied warranty
  14. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #ifndef __DAVINCI_H
  18. #define __DAVINCI_H
  19. #include <linux/clk.h>
  20. #include <linux/videodev2.h>
  21. #include <linux/davinci_emac.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/platform_data/davinci_asp.h>
  25. #include <linux/platform_data/edma.h>
  26. #include <linux/platform_data/keyscan-davinci.h>
  27. #include <mach/hardware.h>
  28. #include <media/davinci/vpfe_capture.h>
  29. #include <media/davinci/vpif_types.h>
  30. #include <media/davinci/vpss.h>
  31. #include <media/davinci/vpbe_types.h>
  32. #include <media/davinci/vpbe_venc.h>
  33. #include <media/davinci/vpbe.h>
  34. #include <media/davinci/vpbe_osd.h>
  35. #define DAVINCI_PLL1_BASE 0x01c40800
  36. #define DAVINCI_PLL2_BASE 0x01c40c00
  37. #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01c41000
  38. #define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
  39. #define SYSMOD_VDAC_CONFIG 0x2c
  40. #define SYSMOD_VIDCLKCTL 0x38
  41. #define SYSMOD_VPSS_CLKCTL 0x44
  42. #define SYSMOD_VDD3P3VPWDN 0x48
  43. #define SYSMOD_VSCLKDIS 0x6c
  44. #define SYSMOD_PUPDCTL1 0x7c
  45. /* VPSS CLKCTL bit definitions */
  46. #define VPSS_MUXSEL_EXTCLK_ENABLE BIT(1)
  47. #define VPSS_VENCCLKEN_ENABLE BIT(3)
  48. #define VPSS_DACCLKEN_ENABLE BIT(4)
  49. #define VPSS_PLLC2SYSCLK5_ENABLE BIT(5)
  50. extern void __iomem *davinci_sysmod_base;
  51. #define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x))
  52. void davinci_map_sysmod(void);
  53. #define DAVINCI_GPIO_BASE 0x01C67000
  54. int davinci_gpio_register(struct resource *res, int size, void *pdata);
  55. #define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
  56. #define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
  57. /* DM355 base addresses */
  58. #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000
  59. #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
  60. #define ASP1_TX_EVT_EN 1
  61. #define ASP1_RX_EVT_EN 2
  62. /* DM365 base addresses */
  63. #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000
  64. #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
  65. #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
  66. /* DM644x base addresses */
  67. #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000
  68. #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
  69. #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
  70. #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
  71. #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
  72. /* DM646x base addresses */
  73. #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000
  74. #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000
  75. int davinci_init_wdt(void);
  76. /* DM355 function declarations */
  77. void dm355_init(void);
  78. void dm355_init_time(void);
  79. void dm355_init_irq(void);
  80. void dm355_register_clocks(void);
  81. void dm355_init_spi0(unsigned chipselect_mask,
  82. const struct spi_board_info *info, unsigned len);
  83. void dm355_init_asp1(u32 evt_enable);
  84. int dm355_init_video(struct vpfe_config *, struct vpbe_config *);
  85. int dm355_gpio_register(void);
  86. /* DM365 function declarations */
  87. void dm365_init(void);
  88. void dm365_init_irq(void);
  89. void dm365_init_time(void);
  90. void dm365_register_clocks(void);
  91. void dm365_init_asp(void);
  92. void dm365_init_vc(void);
  93. void dm365_init_ks(struct davinci_ks_platform_data *pdata);
  94. void dm365_init_rtc(void);
  95. void dm365_init_spi0(unsigned chipselect_mask,
  96. const struct spi_board_info *info, unsigned len);
  97. int dm365_init_video(struct vpfe_config *, struct vpbe_config *);
  98. int dm365_gpio_register(void);
  99. /* DM644x function declarations */
  100. void dm644x_init(void);
  101. void dm644x_init_irq(void);
  102. void dm644x_init_devices(void);
  103. void dm644x_init_time(void);
  104. void dm644x_register_clocks(void);
  105. void dm644x_init_asp(void);
  106. int dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
  107. int dm644x_gpio_register(void);
  108. /* DM646x function declarations */
  109. void dm646x_init(void);
  110. void dm646x_init_irq(void);
  111. void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate);
  112. void dm646x_register_clocks(void);
  113. void dm646x_init_mcasp0(struct snd_platform_data *pdata);
  114. void dm646x_init_mcasp1(struct snd_platform_data *pdata);
  115. int dm646x_init_edma(struct edma_rsv_info *rsv);
  116. void dm646x_video_init(void);
  117. void dm646x_setup_vpif(struct vpif_display_config *,
  118. struct vpif_capture_config *);
  119. int dm646x_gpio_register(void);
  120. extern struct platform_device dm365_serial_device[];
  121. extern struct platform_device dm355_serial_device[];
  122. extern struct platform_device dm644x_serial_device[];
  123. extern struct platform_device dm646x_serial_device[];
  124. #endif /*__DAVINCI_H */