irq.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/arch/arm/kernel/irq.c
  4. *
  5. * Copyright (C) 1992 Linus Torvalds
  6. * Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
  7. *
  8. * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
  9. * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
  10. * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
  11. *
  12. * This file contains the code used by various IRQ handling routines:
  13. * asking for different IRQ's should be done through these routines
  14. * instead of just grabbing them. Thus setups with different IRQ numbers
  15. * shouldn't result in any weird surprises, and installing new handlers
  16. * should be easier.
  17. *
  18. * IRQ's are in fact implemented a bit like signal handlers for the kernel.
  19. * Naturally it's not a 1:1 relation, but there are similarities.
  20. */
  21. #include <linux/signal.h>
  22. #include <linux/ioport.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/irqchip.h>
  26. #include <linux/random.h>
  27. #include <linux/smp.h>
  28. #include <linux/init.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/errno.h>
  31. #include <linux/list.h>
  32. #include <linux/kallsyms.h>
  33. #include <linux/proc_fs.h>
  34. #include <linux/export.h>
  35. #include <asm/hardware/cache-l2x0.h>
  36. #include <asm/hardware/cache-uniphier.h>
  37. #include <asm/outercache.h>
  38. #include <asm/exception.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/irq.h>
  41. #include <asm/mach/time.h>
  42. unsigned long irq_err_count;
  43. int arch_show_interrupts(struct seq_file *p, int prec)
  44. {
  45. #ifdef CONFIG_FIQ
  46. show_fiq_list(p, prec);
  47. #endif
  48. #ifdef CONFIG_SMP
  49. show_ipi_list(p, prec);
  50. #endif
  51. seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
  52. return 0;
  53. }
  54. /*
  55. * handle_IRQ handles all hardware IRQ's. Decoded IRQs should
  56. * not come via this function. Instead, they should provide their
  57. * own 'handler'. Used by platform code implementing C-based 1st
  58. * level decoding.
  59. */
  60. void handle_IRQ(unsigned int irq, struct pt_regs *regs)
  61. {
  62. __handle_domain_irq(NULL, irq, false, regs);
  63. }
  64. /*
  65. * asm_do_IRQ is the interface to be used from assembly code.
  66. */
  67. asmlinkage void __exception_irq_entry
  68. asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
  69. {
  70. handle_IRQ(irq, regs);
  71. }
  72. void __init init_IRQ(void)
  73. {
  74. int ret;
  75. if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
  76. irqchip_init();
  77. else
  78. machine_desc->init_irq();
  79. if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
  80. (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
  81. if (!outer_cache.write_sec)
  82. outer_cache.write_sec = machine_desc->l2c_write_sec;
  83. ret = l2x0_of_init(machine_desc->l2c_aux_val,
  84. machine_desc->l2c_aux_mask);
  85. if (ret && ret != -ENODEV)
  86. pr_err("L2C: failed to init: %d\n", ret);
  87. }
  88. uniphier_cache_init();
  89. }
  90. #ifdef CONFIG_SPARSE_IRQ
  91. int __init arch_probe_nr_irqs(void)
  92. {
  93. nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
  94. return nr_irqs;
  95. }
  96. #endif