sha2-ce-core.S 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * sha2-ce-core.S - SHA-224/256 secure hash using ARMv8 Crypto Extensions
  4. *
  5. * Copyright (C) 2015 Linaro Ltd.
  6. * Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
  7. */
  8. #include <linux/linkage.h>
  9. #include <asm/assembler.h>
  10. .text
  11. .arch armv8-a
  12. .fpu crypto-neon-fp-armv8
  13. k0 .req q7
  14. k1 .req q8
  15. rk .req r3
  16. ta0 .req q9
  17. ta1 .req q10
  18. tb0 .req q10
  19. tb1 .req q9
  20. dga .req q11
  21. dgb .req q12
  22. dg0 .req q13
  23. dg1 .req q14
  24. dg2 .req q15
  25. .macro add_only, ev, s0
  26. vmov dg2, dg0
  27. .ifnb \s0
  28. vld1.32 {k\ev}, [rk, :128]!
  29. .endif
  30. sha256h.32 dg0, dg1, tb\ev
  31. sha256h2.32 dg1, dg2, tb\ev
  32. .ifnb \s0
  33. vadd.u32 ta\ev, q\s0, k\ev
  34. .endif
  35. .endm
  36. .macro add_update, ev, s0, s1, s2, s3
  37. sha256su0.32 q\s0, q\s1
  38. add_only \ev, \s1
  39. sha256su1.32 q\s0, q\s2, q\s3
  40. .endm
  41. .align 6
  42. .Lsha256_rcon:
  43. .word 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5
  44. .word 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5
  45. .word 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3
  46. .word 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174
  47. .word 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc
  48. .word 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da
  49. .word 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7
  50. .word 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967
  51. .word 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13
  52. .word 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85
  53. .word 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3
  54. .word 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070
  55. .word 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5
  56. .word 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3
  57. .word 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208
  58. .word 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
  59. /*
  60. * void sha2_ce_transform(struct sha256_state *sst, u8 const *src,
  61. int blocks);
  62. */
  63. ENTRY(sha2_ce_transform)
  64. /* load state */
  65. vld1.32 {dga-dgb}, [r0]
  66. /* load input */
  67. 0: vld1.32 {q0-q1}, [r1]!
  68. vld1.32 {q2-q3}, [r1]!
  69. subs r2, r2, #1
  70. #ifndef CONFIG_CPU_BIG_ENDIAN
  71. vrev32.8 q0, q0
  72. vrev32.8 q1, q1
  73. vrev32.8 q2, q2
  74. vrev32.8 q3, q3
  75. #endif
  76. /* load first round constant */
  77. adr rk, .Lsha256_rcon
  78. vld1.32 {k0}, [rk, :128]!
  79. vadd.u32 ta0, q0, k0
  80. vmov dg0, dga
  81. vmov dg1, dgb
  82. add_update 1, 0, 1, 2, 3
  83. add_update 0, 1, 2, 3, 0
  84. add_update 1, 2, 3, 0, 1
  85. add_update 0, 3, 0, 1, 2
  86. add_update 1, 0, 1, 2, 3
  87. add_update 0, 1, 2, 3, 0
  88. add_update 1, 2, 3, 0, 1
  89. add_update 0, 3, 0, 1, 2
  90. add_update 1, 0, 1, 2, 3
  91. add_update 0, 1, 2, 3, 0
  92. add_update 1, 2, 3, 0, 1
  93. add_update 0, 3, 0, 1, 2
  94. add_only 1, 1
  95. add_only 0, 2
  96. add_only 1, 3
  97. add_only 0
  98. /* update state */
  99. vadd.u32 dga, dga, dg0
  100. vadd.u32 dgb, dgb, dg1
  101. bne 0b
  102. /* store new state */
  103. vst1.32 {dga-dgb}, [r0]
  104. bx lr
  105. ENDPROC(sha2_ce_transform)