boot-options.rst 11 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. ===========================
  3. AMD64 Specific Boot Options
  4. ===========================
  5. There are many others (usually documented in driver documentation), but
  6. only the AMD64 specific ones are listed here.
  7. Machine check
  8. =============
  9. Please see Documentation/x86/x86_64/machinecheck.rst for sysfs runtime tunables.
  10. mce=off
  11. Disable machine check
  12. mce=no_cmci
  13. Disable CMCI(Corrected Machine Check Interrupt) that
  14. Intel processor supports. Usually this disablement is
  15. not recommended, but it might be handy if your hardware
  16. is misbehaving.
  17. Note that you'll get more problems without CMCI than with
  18. due to the shared banks, i.e. you might get duplicated
  19. error logs.
  20. mce=dont_log_ce
  21. Don't make logs for corrected errors. All events reported
  22. as corrected are silently cleared by OS.
  23. This option will be useful if you have no interest in any
  24. of corrected errors.
  25. mce=ignore_ce
  26. Disable features for corrected errors, e.g. polling timer
  27. and CMCI. All events reported as corrected are not cleared
  28. by OS and remained in its error banks.
  29. Usually this disablement is not recommended, however if
  30. there is an agent checking/clearing corrected errors
  31. (e.g. BIOS or hardware monitoring applications), conflicting
  32. with OS's error handling, and you cannot deactivate the agent,
  33. then this option will be a help.
  34. mce=no_lmce
  35. Do not opt-in to Local MCE delivery. Use legacy method
  36. to broadcast MCEs.
  37. mce=bootlog
  38. Enable logging of machine checks left over from booting.
  39. Disabled by default on AMD Fam10h and older because some BIOS
  40. leave bogus ones.
  41. If your BIOS doesn't do that it's a good idea to enable though
  42. to make sure you log even machine check events that result
  43. in a reboot. On Intel systems it is enabled by default.
  44. mce=nobootlog
  45. Disable boot machine check logging.
  46. mce=tolerancelevel[,monarchtimeout] (number,number)
  47. tolerance levels:
  48. 0: always panic on uncorrected errors, log corrected errors
  49. 1: panic or SIGBUS on uncorrected errors, log corrected errors
  50. 2: SIGBUS or log uncorrected errors, log corrected errors
  51. 3: never panic or SIGBUS, log all errors (for testing only)
  52. Default is 1
  53. Can be also set using sysfs which is preferable.
  54. monarchtimeout:
  55. Sets the time in us to wait for other CPUs on machine checks. 0
  56. to disable.
  57. mce=bios_cmci_threshold
  58. Don't overwrite the bios-set CMCI threshold. This boot option
  59. prevents Linux from overwriting the CMCI threshold set by the
  60. bios. Without this option, Linux always sets the CMCI
  61. threshold to 1. Enabling this may make memory predictive failure
  62. analysis less effective if the bios sets thresholds for memory
  63. errors since we will not see details for all errors.
  64. mce=recovery
  65. Force-enable recoverable machine check code paths
  66. nomce (for compatibility with i386)
  67. same as mce=off
  68. Everything else is in sysfs now.
  69. APICs
  70. =====
  71. apic
  72. Use IO-APIC. Default
  73. noapic
  74. Don't use the IO-APIC.
  75. disableapic
  76. Don't use the local APIC
  77. nolapic
  78. Don't use the local APIC (alias for i386 compatibility)
  79. pirq=...
  80. See Documentation/x86/i386/IO-APIC.rst
  81. noapictimer
  82. Don't set up the APIC timer
  83. no_timer_check
  84. Don't check the IO-APIC timer. This can work around
  85. problems with incorrect timer initialization on some boards.
  86. apicpmtimer
  87. Do APIC timer calibration using the pmtimer. Implies
  88. apicmaintimer. Useful when your PIT timer is totally broken.
  89. Timing
  90. ======
  91. notsc
  92. Deprecated, use tsc=unstable instead.
  93. nohpet
  94. Don't use the HPET timer.
  95. Idle loop
  96. =========
  97. idle=poll
  98. Don't do power saving in the idle loop using HLT, but poll for rescheduling
  99. event. This will make the CPUs eat a lot more power, but may be useful
  100. to get slightly better performance in multiprocessor benchmarks. It also
  101. makes some profiling using performance counters more accurate.
  102. Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
  103. CPUs) this option has no performance advantage over the normal idle loop.
  104. It may also interact badly with hyperthreading.
  105. Rebooting
  106. =========
  107. reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
  108. bios
  109. Use the CPU reboot vector for warm reset
  110. warm
  111. Don't set the cold reboot flag
  112. cold
  113. Set the cold reboot flag
  114. triple
  115. Force a triple fault (init)
  116. kbd
  117. Use the keyboard controller. cold reset (default)
  118. acpi
  119. Use the ACPI RESET_REG in the FADT. If ACPI is not configured or
  120. the ACPI reset does not work, the reboot path attempts the reset
  121. using the keyboard controller.
  122. efi
  123. Use efi reset_system runtime service. If EFI is not configured or
  124. the EFI reset does not work, the reboot path attempts the reset using
  125. the keyboard controller.
  126. Using warm reset will be much faster especially on big memory
  127. systems because the BIOS will not go through the memory check.
  128. Disadvantage is that not all hardware will be completely reinitialized
  129. on reboot so there may be boot problems on some systems.
  130. reboot=force
  131. Don't stop other CPUs on reboot. This can make reboot more reliable
  132. in some cases.
  133. Non Executable Mappings
  134. =======================
  135. noexec=on|off
  136. on
  137. Enable(default)
  138. off
  139. Disable
  140. NUMA
  141. ====
  142. numa=off
  143. Only set up a single NUMA node spanning all memory.
  144. numa=noacpi
  145. Don't parse the SRAT table for NUMA setup
  146. numa=nohmat
  147. Don't parse the HMAT table for NUMA setup, or soft-reserved memory
  148. partitioning.
  149. numa=fake=<size>[MG]
  150. If given as a memory unit, fills all system RAM with nodes of
  151. size interleaved over physical nodes.
  152. numa=fake=<N>
  153. If given as an integer, fills all system RAM with N fake nodes
  154. interleaved over physical nodes.
  155. numa=fake=<N>U
  156. If given as an integer followed by 'U', it will divide each
  157. physical node into N emulated nodes.
  158. ACPI
  159. ====
  160. acpi=off
  161. Don't enable ACPI
  162. acpi=ht
  163. Use ACPI boot table parsing, but don't enable ACPI interpreter
  164. acpi=force
  165. Force ACPI on (currently not needed)
  166. acpi=strict
  167. Disable out of spec ACPI workarounds.
  168. acpi_sci={edge,level,high,low}
  169. Set up ACPI SCI interrupt.
  170. acpi=noirq
  171. Don't route interrupts
  172. acpi=nocmcff
  173. Disable firmware first mode for corrected errors. This
  174. disables parsing the HEST CMC error source to check if
  175. firmware has set the FF flag. This may result in
  176. duplicate corrected error reports.
  177. PCI
  178. ===
  179. pci=off
  180. Don't use PCI
  181. pci=conf1
  182. Use conf1 access.
  183. pci=conf2
  184. Use conf2 access.
  185. pci=rom
  186. Assign ROMs.
  187. pci=assign-busses
  188. Assign busses
  189. pci=irqmask=MASK
  190. Set PCI interrupt mask to MASK
  191. pci=lastbus=NUMBER
  192. Scan up to NUMBER busses, no matter what the mptable says.
  193. pci=noacpi
  194. Don't use ACPI to set up PCI interrupt routing.
  195. IOMMU (input/output memory management unit)
  196. ===========================================
  197. Multiple x86-64 PCI-DMA mapping implementations exist, for example:
  198. 1. <kernel/dma/direct.c>: use no hardware/software IOMMU at all
  199. (e.g. because you have < 3 GB memory).
  200. Kernel boot message: "PCI-DMA: Disabling IOMMU"
  201. 2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
  202. Kernel boot message: "PCI-DMA: using GART IOMMU"
  203. 3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
  204. e.g. if there is no hardware IOMMU in the system and it is need because
  205. you have >3GB memory or told the kernel to us it (iommu=soft))
  206. Kernel boot message: "PCI-DMA: Using software bounce buffering
  207. for IO (SWIOTLB)"
  208. 4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
  209. pSeries and xSeries servers. This hardware IOMMU supports DMA address
  210. mapping with memory protection, etc.
  211. Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
  212. ::
  213. iommu=[<size>][,noagp][,off][,force][,noforce]
  214. [,memaper[=<order>]][,merge][,fullflush][,nomerge]
  215. [,noaperture][,calgary]
  216. General iommu options:
  217. off
  218. Don't initialize and use any kind of IOMMU.
  219. noforce
  220. Don't force hardware IOMMU usage when it is not needed. (default).
  221. force
  222. Force the use of the hardware IOMMU even when it is
  223. not actually needed (e.g. because < 3 GB memory).
  224. soft
  225. Use software bounce buffering (SWIOTLB) (default for
  226. Intel machines). This can be used to prevent the usage
  227. of an available hardware IOMMU.
  228. iommu options only relevant to the AMD GART hardware IOMMU:
  229. <size>
  230. Set the size of the remapping area in bytes.
  231. allowed
  232. Overwrite iommu off workarounds for specific chipsets.
  233. fullflush
  234. Flush IOMMU on each allocation (default).
  235. nofullflush
  236. Don't use IOMMU fullflush.
  237. memaper[=<order>]
  238. Allocate an own aperture over RAM with size 32MB<<order.
  239. (default: order=1, i.e. 64MB)
  240. merge
  241. Do scatter-gather (SG) merging. Implies "force" (experimental).
  242. nomerge
  243. Don't do scatter-gather (SG) merging.
  244. noaperture
  245. Ask the IOMMU not to touch the aperture for AGP.
  246. noagp
  247. Don't initialize the AGP driver and use full aperture.
  248. panic
  249. Always panic when IOMMU overflows.
  250. calgary
  251. Use the Calgary IOMMU if it is available
  252. iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
  253. implementation:
  254. swiotlb=<pages>[,force]
  255. <pages>
  256. Prereserve that many 128K pages for the software IO bounce buffering.
  257. force
  258. Force all IO through the software TLB.
  259. Settings for the IBM Calgary hardware IOMMU currently found in IBM
  260. pSeries and xSeries machines
  261. calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
  262. Set the size of each PCI slot's translation table when using the
  263. Calgary IOMMU. This is the size of the translation table itself
  264. in main memory. The smallest table, 64k, covers an IO space of
  265. 32MB; the largest, 8MB table, can cover an IO space of 4GB.
  266. Normally the kernel will make the right choice by itself.
  267. calgary=[translate_empty_slots]
  268. Enable translation even on slots that have no devices attached to
  269. them, in case a device will be hotplugged in the future.
  270. calgary=[disable=<PCI bus number>]
  271. Disable translation on a given PHB. For
  272. example, the built-in graphics adapter resides on the first bridge
  273. (PCI bus number 0); if translation (isolation) is enabled on this
  274. bridge, X servers that access the hardware directly from user
  275. space might stop working. Use this option if you have devices that
  276. are accessed from userspace directly on some PCI host bridge.
  277. panic
  278. Always panic when IOMMU overflows
  279. Miscellaneous
  280. =============
  281. nogbpages
  282. Do not use GB pages for kernel direct mappings.
  283. gbpages
  284. Use GB pages for kernel direct mappings.