cpu_features.rst 2.7 KB

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  1. ============
  2. CPU Features
  3. ============
  4. Hollis Blanchard <hollis@austin.ibm.com>
  5. 5 Jun 2002
  6. This document describes the system (including self-modifying code) used in the
  7. PPC Linux kernel to support a variety of PowerPC CPUs without requiring
  8. compile-time selection.
  9. Early in the boot process the ppc32 kernel detects the current CPU type and
  10. chooses a set of features accordingly. Some examples include Altivec support,
  11. split instruction and data caches, and if the CPU supports the DOZE and NAP
  12. sleep modes.
  13. Detection of the feature set is simple. A list of processors can be found in
  14. arch/powerpc/kernel/cputable.c. The PVR register is masked and compared with
  15. each value in the list. If a match is found, the cpu_features of cur_cpu_spec
  16. is assigned to the feature bitmask for this processor and a __setup_cpu
  17. function is called.
  18. C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a
  19. particular feature bit. This is done in quite a few places, for example
  20. in ppc_setup_l2cr().
  21. Implementing cpufeatures in assembly is a little more involved. There are
  22. several paths that are performance-critical and would suffer if an array
  23. index, structure dereference, and conditional branch were added. To avoid the
  24. performance penalty but still allow for runtime (rather than compile-time) CPU
  25. selection, unused code is replaced by 'nop' instructions. This nop'ing is
  26. based on CPU 0's capabilities, so a multi-processor system with non-identical
  27. processors will not work (but such a system would likely have other problems
  28. anyways).
  29. After detecting the processor type, the kernel patches out sections of code
  30. that shouldn't be used by writing nop's over it. Using cpufeatures requires
  31. just 2 macros (found in arch/powerpc/include/asm/cputable.h), as seen in head.S
  32. transfer_to_handler::
  33. #ifdef CONFIG_ALTIVEC
  34. BEGIN_FTR_SECTION
  35. mfspr r22,SPRN_VRSAVE /* if G4, save vrsave register value */
  36. stw r22,THREAD_VRSAVE(r23)
  37. END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
  38. #endif /* CONFIG_ALTIVEC */
  39. If CPU 0 supports Altivec, the code is left untouched. If it doesn't, both
  40. instructions are replaced with nop's.
  41. The END_FTR_SECTION macro has two simpler variations: END_FTR_SECTION_IFSET
  42. and END_FTR_SECTION_IFCLR. These simply test if a flag is set (in
  43. cur_cpu_spec[0]->cpu_features) or is cleared, respectively. These two macros
  44. should be used in the majority of cases.
  45. The END_FTR_SECTION macros are implemented by storing information about this
  46. code in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups
  47. (arch/powerpc/kernel/misc.S) is invoked, it will iterate over the records in
  48. __ftr_fixup, and if the required feature is not present it will loop writing
  49. nop's from each BEGIN_FTR_SECTION to END_FTR_SECTION.