openrisc_port.rst 4.0 KB

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  1. ==============
  2. OpenRISC Linux
  3. ==============
  4. This is a port of Linux to the OpenRISC class of microprocessors; the initial
  5. target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
  6. For information about OpenRISC processors and ongoing development:
  7. ======= =============================
  8. website https://openrisc.io
  9. email openrisc@lists.librecores.org
  10. ======= =============================
  11. ---------------------------------------------------------------------
  12. Build instructions for OpenRISC toolchain and Linux
  13. ===================================================
  14. In order to build and run Linux for OpenRISC, you'll need at least a basic
  15. toolchain and, perhaps, the architectural simulator. Steps to get these bits
  16. in place are outlined here.
  17. 1) Toolchain
  18. Toolchain binaries can be obtained from openrisc.io or our github releases page.
  19. Instructions for building the different toolchains can be found on openrisc.io
  20. or Stafford's toolchain build and release scripts.
  21. ========== =================================================
  22. binaries https://github.com/openrisc/or1k-gcc/releases
  23. toolchains https://openrisc.io/software
  24. building https://github.com/stffrdhrn/or1k-toolchain-build
  25. ========== =================================================
  26. 2) Building
  27. Build the Linux kernel as usual::
  28. make ARCH=openrisc CROSS_COMPILE="or1k-linux-" defconfig
  29. make ARCH=openrisc CROSS_COMPILE="or1k-linux-"
  30. 3) Running on FPGA (optional)
  31. The OpenRISC community typically uses FuseSoC to manage building and programming
  32. an SoC into an FPGA. The below is an example of programming a De0 Nano
  33. development board with the OpenRISC SoC. During the build FPGA RTL is code
  34. downloaded from the FuseSoC IP cores repository and built using the FPGA vendor
  35. tools. Binaries are loaded onto the board with openocd.
  36. ::
  37. git clone https://github.com/olofk/fusesoc
  38. cd fusesoc
  39. sudo pip install -e .
  40. fusesoc init
  41. fusesoc build de0_nano
  42. fusesoc pgm de0_nano
  43. openocd -f interface/altera-usb-blaster.cfg \
  44. -f board/or1k_generic.cfg
  45. telnet localhost 4444
  46. > init
  47. > halt; load_image vmlinux ; reset
  48. 4) Running on a Simulator (optional)
  49. QEMU is a processor emulator which we recommend for simulating the OpenRISC
  50. platform. Please follow the OpenRISC instructions on the QEMU website to get
  51. Linux running on QEMU. You can build QEMU yourself, but your Linux distribution
  52. likely provides binary packages to support OpenRISC.
  53. ============= ======================================================
  54. qemu openrisc https://wiki.qemu.org/Documentation/Platforms/OpenRISC
  55. ============= ======================================================
  56. ---------------------------------------------------------------------
  57. Terminology
  58. ===========
  59. In the code, the following particles are used on symbols to limit the scope
  60. to more or less specific processor implementations:
  61. ========= =======================================
  62. openrisc: the OpenRISC class of processors
  63. or1k: the OpenRISC 1000 family of processors
  64. or1200: the OpenRISC 1200 processor
  65. ========= =======================================
  66. ---------------------------------------------------------------------
  67. History
  68. ========
  69. 18-11-2003 Matjaz Breskvar (phoenix@bsemi.com)
  70. initial port of linux to OpenRISC/or32 architecture.
  71. all the core stuff is implemented and seams usable.
  72. 08-12-2003 Matjaz Breskvar (phoenix@bsemi.com)
  73. complete change of TLB miss handling.
  74. rewrite of exceptions handling.
  75. fully functional sash-3.6 in default initrd.
  76. a much improved version with changes all around.
  77. 10-04-2004 Matjaz Breskvar (phoenix@bsemi.com)
  78. alot of bugfixes all over.
  79. ethernet support, functional http and telnet servers.
  80. running many standard linux apps.
  81. 26-06-2004 Matjaz Breskvar (phoenix@bsemi.com)
  82. port to 2.6.x
  83. 30-11-2004 Matjaz Breskvar (phoenix@bsemi.com)
  84. lots of bugfixes and enhancments.
  85. added opencores framebuffer driver.
  86. 09-10-2010 Jonas Bonn (jonas@southpole.se)
  87. major rewrite to bring up to par with upstream Linux 2.6.36