error_handling.rst 3.8 KB

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  1. ========================
  2. SoundWire Error Handling
  3. ========================
  4. The SoundWire PHY was designed with care and errors on the bus are going to
  5. be very unlikely, and if they happen it should be limited to single bit
  6. errors. Examples of this design can be found in the synchronization
  7. mechanism (sync loss after two errors) and short CRCs used for the Bulk
  8. Register Access.
  9. The errors can be detected with multiple mechanisms:
  10. 1. Bus clash or parity errors: This mechanism relies on low-level detectors
  11. that are independent of the payload and usages, and they cover both control
  12. and audio data. The current implementation only logs such errors.
  13. Improvements could be invalidating an entire programming sequence and
  14. restarting from a known position. In the case of such errors outside of a
  15. control/command sequence, there is no concealment or recovery for audio
  16. data enabled by the SoundWire protocol, the location of the error will also
  17. impact its audibility (most-significant bits will be more impacted in PCM),
  18. and after a number of such errors are detected the bus might be reset. Note
  19. that bus clashes due to programming errors (two streams using the same bit
  20. slots) or electrical issues during the transmit/receive transition cannot
  21. be distinguished, although a recurring bus clash when audio is enabled is a
  22. indication of a bus allocation issue. The interrupt mechanism can also help
  23. identify Slaves which detected a Bus Clash or a Parity Error, but they may
  24. not be responsible for the errors so resetting them individually is not a
  25. viable recovery strategy.
  26. 2. Command status: Each command is associated with a status, which only
  27. covers transmission of the data between devices. The ACK status indicates
  28. that the command was received and will be executed by the end of the
  29. current frame. A NAK indicates that the command was in error and will not
  30. be applied. In case of a bad programming (command sent to non-existent
  31. Slave or to a non-implemented register) or electrical issue, no response
  32. signals the command was ignored. Some Master implementations allow for a
  33. command to be retransmitted several times. If the retransmission fails,
  34. backtracking and restarting the entire programming sequence might be a
  35. solution. Alternatively some implementations might directly issue a bus
  36. reset and re-enumerate all devices.
  37. 3. Timeouts: In a number of cases such as ChannelPrepare or
  38. ClockStopPrepare, the bus driver is supposed to poll a register field until
  39. it transitions to a NotFinished value of zero. The MIPI SoundWire spec 1.1
  40. does not define timeouts but the MIPI SoundWire DisCo document adds
  41. recommendation on timeouts. If such configurations do not complete, the
  42. driver will return a -ETIMEOUT. Such timeouts are symptoms of a faulty
  43. Slave device and are likely impossible to recover from.
  44. Errors during global reconfiguration sequences are extremely difficult to
  45. handle:
  46. 1. BankSwitch: An error during the last command issuing a BankSwitch is
  47. difficult to backtrack from. Retransmitting the Bank Switch command may be
  48. possible in a single segment setup, but this can lead to synchronization
  49. problems when enabling multiple bus segments (a command with side effects
  50. such as frame reconfiguration would be handled at different times). A global
  51. hard-reset might be the best solution.
  52. Note that SoundWire does not provide a mechanism to detect illegal values
  53. written in valid registers. In a number of cases the standard even mentions
  54. that the Slave might behave in implementation-defined ways. The bus
  55. implementation does not provide a recovery mechanism for such errors, Slave
  56. or Master driver implementers are responsible for writing valid values in
  57. valid registers and implement additional range checking if needed.