libata.rst 38 KB

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  1. ========================
  2. libATA Developer's Guide
  3. ========================
  4. :Author: Jeff Garzik
  5. Introduction
  6. ============
  7. libATA is a library used inside the Linux kernel to support ATA host
  8. controllers and devices. libATA provides an ATA driver API, class
  9. transports for ATA and ATAPI devices, and SCSI<->ATA translation for ATA
  10. devices according to the T10 SAT specification.
  11. This Guide documents the libATA driver API, library functions, library
  12. internals, and a couple sample ATA low-level drivers.
  13. libata Driver API
  14. =================
  15. :c:type:`struct ata_port_operations <ata_port_operations>`
  16. is defined for every low-level libata
  17. hardware driver, and it controls how the low-level driver interfaces
  18. with the ATA and SCSI layers.
  19. FIS-based drivers will hook into the system with ``->qc_prep()`` and
  20. ``->qc_issue()`` high-level hooks. Hardware which behaves in a manner
  21. similar to PCI IDE hardware may utilize several generic helpers,
  22. defining at a bare minimum the bus I/O addresses of the ATA shadow
  23. register blocks.
  24. :c:type:`struct ata_port_operations <ata_port_operations>`
  25. ----------------------------------------------------------
  26. Disable ATA port
  27. ~~~~~~~~~~~~~~~~
  28. ::
  29. void (*port_disable) (struct ata_port *);
  30. Called from :c:func:`ata_bus_probe` error path, as well as when unregistering
  31. from the SCSI module (rmmod, hot unplug). This function should do
  32. whatever needs to be done to take the port out of use. In most cases,
  33. :c:func:`ata_port_disable` can be used as this hook.
  34. Called from :c:func:`ata_bus_probe` on a failed probe. Called from
  35. :c:func:`ata_scsi_release`.
  36. Post-IDENTIFY device configuration
  37. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  38. ::
  39. void (*dev_config) (struct ata_port *, struct ata_device *);
  40. Called after IDENTIFY [PACKET] DEVICE is issued to each device found.
  41. Typically used to apply device-specific fixups prior to issue of SET
  42. FEATURES - XFER MODE, and prior to operation.
  43. This entry may be specified as NULL in ata_port_operations.
  44. Set PIO/DMA mode
  45. ~~~~~~~~~~~~~~~~
  46. ::
  47. void (*set_piomode) (struct ata_port *, struct ata_device *);
  48. void (*set_dmamode) (struct ata_port *, struct ata_device *);
  49. void (*post_set_mode) (struct ata_port *);
  50. unsigned int (*mode_filter) (struct ata_port *, struct ata_device *, unsigned int);
  51. Hooks called prior to the issue of SET FEATURES - XFER MODE command. The
  52. optional ``->mode_filter()`` hook is called when libata has built a mask of
  53. the possible modes. This is passed to the ``->mode_filter()`` function
  54. which should return a mask of valid modes after filtering those
  55. unsuitable due to hardware limits. It is not valid to use this interface
  56. to add modes.
  57. ``dev->pio_mode`` and ``dev->dma_mode`` are guaranteed to be valid when
  58. ``->set_piomode()`` and when ``->set_dmamode()`` is called. The timings for
  59. any other drive sharing the cable will also be valid at this point. That
  60. is the library records the decisions for the modes of each drive on a
  61. channel before it attempts to set any of them.
  62. ``->post_set_mode()`` is called unconditionally, after the SET FEATURES -
  63. XFER MODE command completes successfully.
  64. ``->set_piomode()`` is always called (if present), but ``->set_dma_mode()``
  65. is only called if DMA is possible.
  66. Taskfile read/write
  67. ~~~~~~~~~~~~~~~~~~~
  68. ::
  69. void (*sff_tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
  70. void (*sff_tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
  71. ``->tf_load()`` is called to load the given taskfile into hardware
  72. registers / DMA buffers. ``->tf_read()`` is called to read the hardware
  73. registers / DMA buffers, to obtain the current set of taskfile register
  74. values. Most drivers for taskfile-based hardware (PIO or MMIO) use
  75. :c:func:`ata_sff_tf_load` and :c:func:`ata_sff_tf_read` for these hooks.
  76. PIO data read/write
  77. ~~~~~~~~~~~~~~~~~~~
  78. ::
  79. void (*sff_data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
  80. All bmdma-style drivers must implement this hook. This is the low-level
  81. operation that actually copies the data bytes during a PIO data
  82. transfer. Typically the driver will choose one of
  83. :c:func:`ata_sff_data_xfer`, or :c:func:`ata_sff_data_xfer32`.
  84. ATA command execute
  85. ~~~~~~~~~~~~~~~~~~~
  86. ::
  87. void (*sff_exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
  88. causes an ATA command, previously loaded with ``->tf_load()``, to be
  89. initiated in hardware. Most drivers for taskfile-based hardware use
  90. :c:func:`ata_sff_exec_command` for this hook.
  91. Per-cmd ATAPI DMA capabilities filter
  92. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  93. ::
  94. int (*check_atapi_dma) (struct ata_queued_cmd *qc);
  95. Allow low-level driver to filter ATA PACKET commands, returning a status
  96. indicating whether or not it is OK to use DMA for the supplied PACKET
  97. command.
  98. This hook may be specified as NULL, in which case libata will assume
  99. that atapi dma can be supported.
  100. Read specific ATA shadow registers
  101. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  102. ::
  103. u8 (*sff_check_status)(struct ata_port *ap);
  104. u8 (*sff_check_altstatus)(struct ata_port *ap);
  105. Reads the Status/AltStatus ATA shadow register from hardware. On some
  106. hardware, reading the Status register has the side effect of clearing
  107. the interrupt condition. Most drivers for taskfile-based hardware use
  108. :c:func:`ata_sff_check_status` for this hook.
  109. Write specific ATA shadow register
  110. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  111. ::
  112. void (*sff_set_devctl)(struct ata_port *ap, u8 ctl);
  113. Write the device control ATA shadow register to the hardware. Most
  114. drivers don't need to define this.
  115. Select ATA device on bus
  116. ~~~~~~~~~~~~~~~~~~~~~~~~
  117. ::
  118. void (*sff_dev_select)(struct ata_port *ap, unsigned int device);
  119. Issues the low-level hardware command(s) that causes one of N hardware
  120. devices to be considered 'selected' (active and available for use) on
  121. the ATA bus. This generally has no meaning on FIS-based devices.
  122. Most drivers for taskfile-based hardware use :c:func:`ata_sff_dev_select` for
  123. this hook.
  124. Private tuning method
  125. ~~~~~~~~~~~~~~~~~~~~~
  126. ::
  127. void (*set_mode) (struct ata_port *ap);
  128. By default libata performs drive and controller tuning in accordance
  129. with the ATA timing rules and also applies blacklists and cable limits.
  130. Some controllers need special handling and have custom tuning rules,
  131. typically raid controllers that use ATA commands but do not actually do
  132. drive timing.
  133. **Warning**
  134. This hook should not be used to replace the standard controller
  135. tuning logic when a controller has quirks. Replacing the default
  136. tuning logic in that case would bypass handling for drive and bridge
  137. quirks that may be important to data reliability. If a controller
  138. needs to filter the mode selection it should use the mode_filter
  139. hook instead.
  140. Control PCI IDE BMDMA engine
  141. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  142. ::
  143. void (*bmdma_setup) (struct ata_queued_cmd *qc);
  144. void (*bmdma_start) (struct ata_queued_cmd *qc);
  145. void (*bmdma_stop) (struct ata_port *ap);
  146. u8 (*bmdma_status) (struct ata_port *ap);
  147. When setting up an IDE BMDMA transaction, these hooks arm
  148. (``->bmdma_setup``), fire (``->bmdma_start``), and halt (``->bmdma_stop``) the
  149. hardware's DMA engine. ``->bmdma_status`` is used to read the standard PCI
  150. IDE DMA Status register.
  151. These hooks are typically either no-ops, or simply not implemented, in
  152. FIS-based drivers.
  153. Most legacy IDE drivers use :c:func:`ata_bmdma_setup` for the
  154. :c:func:`bmdma_setup` hook. :c:func:`ata_bmdma_setup` will write the pointer
  155. to the PRD table to the IDE PRD Table Address register, enable DMA in the DMA
  156. Command register, and call :c:func:`exec_command` to begin the transfer.
  157. Most legacy IDE drivers use :c:func:`ata_bmdma_start` for the
  158. :c:func:`bmdma_start` hook. :c:func:`ata_bmdma_start` will write the
  159. ATA_DMA_START flag to the DMA Command register.
  160. Many legacy IDE drivers use :c:func:`ata_bmdma_stop` for the
  161. :c:func:`bmdma_stop` hook. :c:func:`ata_bmdma_stop` clears the ATA_DMA_START
  162. flag in the DMA command register.
  163. Many legacy IDE drivers use :c:func:`ata_bmdma_status` as the
  164. :c:func:`bmdma_status` hook.
  165. High-level taskfile hooks
  166. ~~~~~~~~~~~~~~~~~~~~~~~~~
  167. ::
  168. enum ata_completion_errors (*qc_prep) (struct ata_queued_cmd *qc);
  169. int (*qc_issue) (struct ata_queued_cmd *qc);
  170. Higher-level hooks, these two hooks can potentially supersede several of
  171. the above taskfile/DMA engine hooks. ``->qc_prep`` is called after the
  172. buffers have been DMA-mapped, and is typically used to populate the
  173. hardware's DMA scatter-gather table. Some drivers use the standard
  174. :c:func:`ata_bmdma_qc_prep` and :c:func:`ata_bmdma_dumb_qc_prep` helper
  175. functions, but more advanced drivers roll their own.
  176. ``->qc_issue`` is used to make a command active, once the hardware and S/G
  177. tables have been prepared. IDE BMDMA drivers use the helper function
  178. :c:func:`ata_sff_qc_issue` for taskfile protocol-based dispatch. More
  179. advanced drivers implement their own ``->qc_issue``.
  180. :c:func:`ata_sff_qc_issue` calls ``->sff_tf_load()``, ``->bmdma_setup()``, and
  181. ``->bmdma_start()`` as necessary to initiate a transfer.
  182. Exception and probe handling (EH)
  183. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  184. ::
  185. void (*eng_timeout) (struct ata_port *ap);
  186. void (*phy_reset) (struct ata_port *ap);
  187. Deprecated. Use ``->error_handler()`` instead.
  188. ::
  189. void (*freeze) (struct ata_port *ap);
  190. void (*thaw) (struct ata_port *ap);
  191. :c:func:`ata_port_freeze` is called when HSM violations or some other
  192. condition disrupts normal operation of the port. A frozen port is not
  193. allowed to perform any operation until the port is thawed, which usually
  194. follows a successful reset.
  195. The optional ``->freeze()`` callback can be used for freezing the port
  196. hardware-wise (e.g. mask interrupt and stop DMA engine). If a port
  197. cannot be frozen hardware-wise, the interrupt handler must ack and clear
  198. interrupts unconditionally while the port is frozen.
  199. The optional ``->thaw()`` callback is called to perform the opposite of
  200. ``->freeze()``: prepare the port for normal operation once again. Unmask
  201. interrupts, start DMA engine, etc.
  202. ::
  203. void (*error_handler) (struct ata_port *ap);
  204. ``->error_handler()`` is a driver's hook into probe, hotplug, and recovery
  205. and other exceptional conditions. The primary responsibility of an
  206. implementation is to call :c:func:`ata_do_eh` or :c:func:`ata_bmdma_drive_eh`
  207. with a set of EH hooks as arguments:
  208. 'prereset' hook (may be NULL) is called during an EH reset, before any
  209. other actions are taken.
  210. 'postreset' hook (may be NULL) is called after the EH reset is
  211. performed. Based on existing conditions, severity of the problem, and
  212. hardware capabilities,
  213. Either 'softreset' (may be NULL) or 'hardreset' (may be NULL) will be
  214. called to perform the low-level EH reset.
  215. ::
  216. void (*post_internal_cmd) (struct ata_queued_cmd *qc);
  217. Perform any hardware-specific actions necessary to finish processing
  218. after executing a probe-time or EH-time command via
  219. :c:func:`ata_exec_internal`.
  220. Hardware interrupt handling
  221. ~~~~~~~~~~~~~~~~~~~~~~~~~~~
  222. ::
  223. irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
  224. void (*irq_clear) (struct ata_port *);
  225. ``->irq_handler`` is the interrupt handling routine registered with the
  226. system, by libata. ``->irq_clear`` is called during probe just before the
  227. interrupt handler is registered, to be sure hardware is quiet.
  228. The second argument, dev_instance, should be cast to a pointer to
  229. :c:type:`struct ata_host_set <ata_host_set>`.
  230. Most legacy IDE drivers use :c:func:`ata_sff_interrupt` for the irq_handler
  231. hook, which scans all ports in the host_set, determines which queued
  232. command was active (if any), and calls ata_sff_host_intr(ap,qc).
  233. Most legacy IDE drivers use :c:func:`ata_sff_irq_clear` for the
  234. :c:func:`irq_clear` hook, which simply clears the interrupt and error flags
  235. in the DMA status register.
  236. SATA phy read/write
  237. ~~~~~~~~~~~~~~~~~~~
  238. ::
  239. int (*scr_read) (struct ata_port *ap, unsigned int sc_reg,
  240. u32 *val);
  241. int (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
  242. u32 val);
  243. Read and write standard SATA phy registers. Currently only used if
  244. ``->phy_reset`` hook called the :c:func:`sata_phy_reset` helper function.
  245. sc_reg is one of SCR_STATUS, SCR_CONTROL, SCR_ERROR, or SCR_ACTIVE.
  246. Init and shutdown
  247. ~~~~~~~~~~~~~~~~~
  248. ::
  249. int (*port_start) (struct ata_port *ap);
  250. void (*port_stop) (struct ata_port *ap);
  251. void (*host_stop) (struct ata_host_set *host_set);
  252. ``->port_start()`` is called just after the data structures for each port
  253. are initialized. Typically this is used to alloc per-port DMA buffers /
  254. tables / rings, enable DMA engines, and similar tasks. Some drivers also
  255. use this entry point as a chance to allocate driver-private memory for
  256. ``ap->private_data``.
  257. Many drivers use :c:func:`ata_port_start` as this hook or call it from their
  258. own :c:func:`port_start` hooks. :c:func:`ata_port_start` allocates space for
  259. a legacy IDE PRD table and returns.
  260. ``->port_stop()`` is called after ``->host_stop()``. Its sole function is to
  261. release DMA/memory resources, now that they are no longer actively being
  262. used. Many drivers also free driver-private data from port at this time.
  263. ``->host_stop()`` is called after all ``->port_stop()`` calls have completed.
  264. The hook must finalize hardware shutdown, release DMA and other
  265. resources, etc. This hook may be specified as NULL, in which case it is
  266. not called.
  267. Error handling
  268. ==============
  269. This chapter describes how errors are handled under libata. Readers are
  270. advised to read SCSI EH (Documentation/scsi/scsi_eh.rst) and ATA
  271. exceptions doc first.
  272. Origins of commands
  273. -------------------
  274. In libata, a command is represented with
  275. :c:type:`struct ata_queued_cmd <ata_queued_cmd>` or qc.
  276. qc's are preallocated during port initialization and repetitively used
  277. for command executions. Currently only one qc is allocated per port but
  278. yet-to-be-merged NCQ branch allocates one for each tag and maps each qc
  279. to NCQ tag 1-to-1.
  280. libata commands can originate from two sources - libata itself and SCSI
  281. midlayer. libata internal commands are used for initialization and error
  282. handling. All normal blk requests and commands for SCSI emulation are
  283. passed as SCSI commands through queuecommand callback of SCSI host
  284. template.
  285. How commands are issued
  286. -----------------------
  287. Internal commands
  288. First, qc is allocated and initialized using :c:func:`ata_qc_new_init`.
  289. Although :c:func:`ata_qc_new_init` doesn't implement any wait or retry
  290. mechanism when qc is not available, internal commands are currently
  291. issued only during initialization and error recovery, so no other
  292. command is active and allocation is guaranteed to succeed.
  293. Once allocated qc's taskfile is initialized for the command to be
  294. executed. qc currently has two mechanisms to notify completion. One
  295. is via ``qc->complete_fn()`` callback and the other is completion
  296. ``qc->waiting``. ``qc->complete_fn()`` callback is the asynchronous path
  297. used by normal SCSI translated commands and ``qc->waiting`` is the
  298. synchronous (issuer sleeps in process context) path used by internal
  299. commands.
  300. Once initialization is complete, host_set lock is acquired and the
  301. qc is issued.
  302. SCSI commands
  303. All libata drivers use :c:func:`ata_scsi_queuecmd` as
  304. ``hostt->queuecommand`` callback. scmds can either be simulated or
  305. translated. No qc is involved in processing a simulated scmd. The
  306. result is computed right away and the scmd is completed.
  307. For a translated scmd, :c:func:`ata_qc_new_init` is invoked to allocate a
  308. qc and the scmd is translated into the qc. SCSI midlayer's
  309. completion notification function pointer is stored into
  310. ``qc->scsidone``.
  311. ``qc->complete_fn()`` callback is used for completion notification. ATA
  312. commands use :c:func:`ata_scsi_qc_complete` while ATAPI commands use
  313. :c:func:`atapi_qc_complete`. Both functions end up calling ``qc->scsidone``
  314. to notify upper layer when the qc is finished. After translation is
  315. completed, the qc is issued with :c:func:`ata_qc_issue`.
  316. Note that SCSI midlayer invokes hostt->queuecommand while holding
  317. host_set lock, so all above occur while holding host_set lock.
  318. How commands are processed
  319. --------------------------
  320. Depending on which protocol and which controller are used, commands are
  321. processed differently. For the purpose of discussion, a controller which
  322. uses taskfile interface and all standard callbacks is assumed.
  323. Currently 6 ATA command protocols are used. They can be sorted into the
  324. following four categories according to how they are processed.
  325. ATA NO DATA or DMA
  326. ATA_PROT_NODATA and ATA_PROT_DMA fall into this category. These
  327. types of commands don't require any software intervention once
  328. issued. Device will raise interrupt on completion.
  329. ATA PIO
  330. ATA_PROT_PIO is in this category. libata currently implements PIO
  331. with polling. ATA_NIEN bit is set to turn off interrupt and
  332. pio_task on ata_wq performs polling and IO.
  333. ATAPI NODATA or DMA
  334. ATA_PROT_ATAPI_NODATA and ATA_PROT_ATAPI_DMA are in this
  335. category. packet_task is used to poll BSY bit after issuing PACKET
  336. command. Once BSY is turned off by the device, packet_task
  337. transfers CDB and hands off processing to interrupt handler.
  338. ATAPI PIO
  339. ATA_PROT_ATAPI is in this category. ATA_NIEN bit is set and, as
  340. in ATAPI NODATA or DMA, packet_task submits cdb. However, after
  341. submitting cdb, further processing (data transfer) is handed off to
  342. pio_task.
  343. How commands are completed
  344. --------------------------
  345. Once issued, all qc's are either completed with :c:func:`ata_qc_complete` or
  346. time out. For commands which are handled by interrupts,
  347. :c:func:`ata_host_intr` invokes :c:func:`ata_qc_complete`, and, for PIO tasks,
  348. pio_task invokes :c:func:`ata_qc_complete`. In error cases, packet_task may
  349. also complete commands.
  350. :c:func:`ata_qc_complete` does the following.
  351. 1. DMA memory is unmapped.
  352. 2. ATA_QCFLAG_ACTIVE is cleared from qc->flags.
  353. 3. :c:expr:`qc->complete_fn` callback is invoked. If the return value of the
  354. callback is not zero. Completion is short circuited and
  355. :c:func:`ata_qc_complete` returns.
  356. 4. :c:func:`__ata_qc_complete` is called, which does
  357. 1. ``qc->flags`` is cleared to zero.
  358. 2. ``ap->active_tag`` and ``qc->tag`` are poisoned.
  359. 3. ``qc->waiting`` is cleared & completed (in that order).
  360. 4. qc is deallocated by clearing appropriate bit in ``ap->qactive``.
  361. So, it basically notifies upper layer and deallocates qc. One exception
  362. is short-circuit path in #3 which is used by :c:func:`atapi_qc_complete`.
  363. For all non-ATAPI commands, whether it fails or not, almost the same
  364. code path is taken and very little error handling takes place. A qc is
  365. completed with success status if it succeeded, with failed status
  366. otherwise.
  367. However, failed ATAPI commands require more handling as REQUEST SENSE is
  368. needed to acquire sense data. If an ATAPI command fails,
  369. :c:func:`ata_qc_complete` is invoked with error status, which in turn invokes
  370. :c:func:`atapi_qc_complete` via ``qc->complete_fn()`` callback.
  371. This makes :c:func:`atapi_qc_complete` set ``scmd->result`` to
  372. SAM_STAT_CHECK_CONDITION, complete the scmd and return 1. As the
  373. sense data is empty but ``scmd->result`` is CHECK CONDITION, SCSI midlayer
  374. will invoke EH for the scmd, and returning 1 makes :c:func:`ata_qc_complete`
  375. to return without deallocating the qc. This leads us to
  376. :c:func:`ata_scsi_error` with partially completed qc.
  377. :c:func:`ata_scsi_error`
  378. ------------------------
  379. :c:func:`ata_scsi_error` is the current ``transportt->eh_strategy_handler()``
  380. for libata. As discussed above, this will be entered in two cases -
  381. timeout and ATAPI error completion. This function calls low level libata
  382. driver's :c:func:`eng_timeout` callback, the standard callback for which is
  383. :c:func:`ata_eng_timeout`. It checks if a qc is active and calls
  384. :c:func:`ata_qc_timeout` on the qc if so. Actual error handling occurs in
  385. :c:func:`ata_qc_timeout`.
  386. If EH is invoked for timeout, :c:func:`ata_qc_timeout` stops BMDMA and
  387. completes the qc. Note that as we're currently in EH, we cannot call
  388. scsi_done. As described in SCSI EH doc, a recovered scmd should be
  389. either retried with :c:func:`scsi_queue_insert` or finished with
  390. :c:func:`scsi_finish_command`. Here, we override ``qc->scsidone`` with
  391. :c:func:`scsi_finish_command` and calls :c:func:`ata_qc_complete`.
  392. If EH is invoked due to a failed ATAPI qc, the qc here is completed but
  393. not deallocated. The purpose of this half-completion is to use the qc as
  394. place holder to make EH code reach this place. This is a bit hackish,
  395. but it works.
  396. Once control reaches here, the qc is deallocated by invoking
  397. :c:func:`__ata_qc_complete` explicitly. Then, internal qc for REQUEST SENSE
  398. is issued. Once sense data is acquired, scmd is finished by directly
  399. invoking :c:func:`scsi_finish_command` on the scmd. Note that as we already
  400. have completed and deallocated the qc which was associated with the
  401. scmd, we don't need to/cannot call :c:func:`ata_qc_complete` again.
  402. Problems with the current EH
  403. ----------------------------
  404. - Error representation is too crude. Currently any and all error
  405. conditions are represented with ATA STATUS and ERROR registers.
  406. Errors which aren't ATA device errors are treated as ATA device
  407. errors by setting ATA_ERR bit. Better error descriptor which can
  408. properly represent ATA and other errors/exceptions is needed.
  409. - When handling timeouts, no action is taken to make device forget
  410. about the timed out command and ready for new commands.
  411. - EH handling via :c:func:`ata_scsi_error` is not properly protected from
  412. usual command processing. On EH entrance, the device is not in
  413. quiescent state. Timed out commands may succeed or fail any time.
  414. pio_task and atapi_task may still be running.
  415. - Too weak error recovery. Devices / controllers causing HSM mismatch
  416. errors and other errors quite often require reset to return to known
  417. state. Also, advanced error handling is necessary to support features
  418. like NCQ and hotplug.
  419. - ATA errors are directly handled in the interrupt handler and PIO
  420. errors in pio_task. This is problematic for advanced error handling
  421. for the following reasons.
  422. First, advanced error handling often requires context and internal qc
  423. execution.
  424. Second, even a simple failure (say, CRC error) needs information
  425. gathering and could trigger complex error handling (say, resetting &
  426. reconfiguring). Having multiple code paths to gather information,
  427. enter EH and trigger actions makes life painful.
  428. Third, scattered EH code makes implementing low level drivers
  429. difficult. Low level drivers override libata callbacks. If EH is
  430. scattered over several places, each affected callbacks should perform
  431. its part of error handling. This can be error prone and painful.
  432. libata Library
  433. ==============
  434. .. kernel-doc:: drivers/ata/libata-core.c
  435. :export:
  436. libata Core Internals
  437. =====================
  438. .. kernel-doc:: drivers/ata/libata-core.c
  439. :internal:
  440. .. kernel-doc:: drivers/ata/libata-eh.c
  441. libata SCSI translation/emulation
  442. =================================
  443. .. kernel-doc:: drivers/ata/libata-scsi.c
  444. :export:
  445. .. kernel-doc:: drivers/ata/libata-scsi.c
  446. :internal:
  447. ATA errors and exceptions
  448. =========================
  449. This chapter tries to identify what error/exception conditions exist for
  450. ATA/ATAPI devices and describe how they should be handled in
  451. implementation-neutral way.
  452. The term 'error' is used to describe conditions where either an explicit
  453. error condition is reported from device or a command has timed out.
  454. The term 'exception' is either used to describe exceptional conditions
  455. which are not errors (say, power or hotplug events), or to describe both
  456. errors and non-error exceptional conditions. Where explicit distinction
  457. between error and exception is necessary, the term 'non-error exception'
  458. is used.
  459. Exception categories
  460. --------------------
  461. Exceptions are described primarily with respect to legacy taskfile + bus
  462. master IDE interface. If a controller provides other better mechanism
  463. for error reporting, mapping those into categories described below
  464. shouldn't be difficult.
  465. In the following sections, two recovery actions - reset and
  466. reconfiguring transport - are mentioned. These are described further in
  467. `EH recovery actions <#exrec>`__.
  468. HSM violation
  469. ~~~~~~~~~~~~~
  470. This error is indicated when STATUS value doesn't match HSM requirement
  471. during issuing or execution any ATA/ATAPI command.
  472. - ATA_STATUS doesn't contain !BSY && DRDY && !DRQ while trying to
  473. issue a command.
  474. - !BSY && !DRQ during PIO data transfer.
  475. - DRQ on command completion.
  476. - !BSY && ERR after CDB transfer starts but before the last byte of CDB
  477. is transferred. ATA/ATAPI standard states that "The device shall not
  478. terminate the PACKET command with an error before the last byte of
  479. the command packet has been written" in the error outputs description
  480. of PACKET command and the state diagram doesn't include such
  481. transitions.
  482. In these cases, HSM is violated and not much information regarding the
  483. error can be acquired from STATUS or ERROR register. IOW, this error can
  484. be anything - driver bug, faulty device, controller and/or cable.
  485. As HSM is violated, reset is necessary to restore known state.
  486. Reconfiguring transport for lower speed might be helpful too as
  487. transmission errors sometimes cause this kind of errors.
  488. ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION)
  489. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  490. These are errors detected and reported by ATA/ATAPI devices indicating
  491. device problems. For this type of errors, STATUS and ERROR register
  492. values are valid and describe error condition. Note that some of ATA bus
  493. errors are detected by ATA/ATAPI devices and reported using the same
  494. mechanism as device errors. Those cases are described later in this
  495. section.
  496. For ATA commands, this type of errors are indicated by !BSY && ERR
  497. during command execution and on completion.
  498. For ATAPI commands,
  499. - !BSY && ERR && ABRT right after issuing PACKET indicates that PACKET
  500. command is not supported and falls in this category.
  501. - !BSY && ERR(==CHK) && !ABRT after the last byte of CDB is transferred
  502. indicates CHECK CONDITION and doesn't fall in this category.
  503. - !BSY && ERR(==CHK) && ABRT after the last byte of CDB is transferred
  504. \*probably\* indicates CHECK CONDITION and doesn't fall in this
  505. category.
  506. Of errors detected as above, the following are not ATA/ATAPI device
  507. errors but ATA bus errors and should be handled according to
  508. `ATA bus error <#excatATAbusErr>`__.
  509. CRC error during data transfer
  510. This is indicated by ICRC bit in the ERROR register and means that
  511. corruption occurred during data transfer. Up to ATA/ATAPI-7, the
  512. standard specifies that this bit is only applicable to UDMA
  513. transfers but ATA/ATAPI-8 draft revision 1f says that the bit may be
  514. applicable to multiword DMA and PIO.
  515. ABRT error during data transfer or on completion
  516. Up to ATA/ATAPI-7, the standard specifies that ABRT could be set on
  517. ICRC errors and on cases where a device is not able to complete a
  518. command. Combined with the fact that MWDMA and PIO transfer errors
  519. aren't allowed to use ICRC bit up to ATA/ATAPI-7, it seems to imply
  520. that ABRT bit alone could indicate transfer errors.
  521. However, ATA/ATAPI-8 draft revision 1f removes the part that ICRC
  522. errors can turn on ABRT. So, this is kind of gray area. Some
  523. heuristics are needed here.
  524. ATA/ATAPI device errors can be further categorized as follows.
  525. Media errors
  526. This is indicated by UNC bit in the ERROR register. ATA devices
  527. reports UNC error only after certain number of retries cannot
  528. recover the data, so there's nothing much else to do other than
  529. notifying upper layer.
  530. READ and WRITE commands report CHS or LBA of the first failed sector
  531. but ATA/ATAPI standard specifies that the amount of transferred data
  532. on error completion is indeterminate, so we cannot assume that
  533. sectors preceding the failed sector have been transferred and thus
  534. cannot complete those sectors successfully as SCSI does.
  535. Media changed / media change requested error
  536. <<TODO: fill here>>
  537. Address error
  538. This is indicated by IDNF bit in the ERROR register. Report to upper
  539. layer.
  540. Other errors
  541. This can be invalid command or parameter indicated by ABRT ERROR bit
  542. or some other error condition. Note that ABRT bit can indicate a lot
  543. of things including ICRC and Address errors. Heuristics needed.
  544. Depending on commands, not all STATUS/ERROR bits are applicable. These
  545. non-applicable bits are marked with "na" in the output descriptions but
  546. up to ATA/ATAPI-7 no definition of "na" can be found. However,
  547. ATA/ATAPI-8 draft revision 1f describes "N/A" as follows.
  548. 3.2.3.3a N/A
  549. A keyword the indicates a field has no defined value in this
  550. standard and should not be checked by the host or device. N/A
  551. fields should be cleared to zero.
  552. So, it seems reasonable to assume that "na" bits are cleared to zero by
  553. devices and thus need no explicit masking.
  554. ATAPI device CHECK CONDITION
  555. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  556. ATAPI device CHECK CONDITION error is indicated by set CHK bit (ERR bit)
  557. in the STATUS register after the last byte of CDB is transferred for a
  558. PACKET command. For this kind of errors, sense data should be acquired
  559. to gather information regarding the errors. REQUEST SENSE packet command
  560. should be used to acquire sense data.
  561. Once sense data is acquired, this type of errors can be handled
  562. similarly to other SCSI errors. Note that sense data may indicate ATA
  563. bus error (e.g. Sense Key 04h HARDWARE ERROR && ASC/ASCQ 47h/00h SCSI
  564. PARITY ERROR). In such cases, the error should be considered as an ATA
  565. bus error and handled according to `ATA bus error <#excatATAbusErr>`__.
  566. ATA device error (NCQ)
  567. ~~~~~~~~~~~~~~~~~~~~~~
  568. NCQ command error is indicated by cleared BSY and set ERR bit during NCQ
  569. command phase (one or more NCQ commands outstanding). Although STATUS
  570. and ERROR registers will contain valid values describing the error, READ
  571. LOG EXT is required to clear the error condition, determine which
  572. command has failed and acquire more information.
  573. READ LOG EXT Log Page 10h reports which tag has failed and taskfile
  574. register values describing the error. With this information the failed
  575. command can be handled as a normal ATA command error as in
  576. `ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION) <#excatDevErr>`__
  577. and all other in-flight commands must be retried. Note that this retry
  578. should not be counted - it's likely that commands retried this way would
  579. have completed normally if it were not for the failed command.
  580. Note that ATA bus errors can be reported as ATA device NCQ errors. This
  581. should be handled as described in `ATA bus error <#excatATAbusErr>`__.
  582. If READ LOG EXT Log Page 10h fails or reports NQ, we're thoroughly
  583. screwed. This condition should be treated according to
  584. `HSM violation <#excatHSMviolation>`__.
  585. ATA bus error
  586. ~~~~~~~~~~~~~
  587. ATA bus error means that data corruption occurred during transmission
  588. over ATA bus (SATA or PATA). This type of errors can be indicated by
  589. - ICRC or ABRT error as described in
  590. `ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION) <#excatDevErr>`__.
  591. - Controller-specific error completion with error information
  592. indicating transmission error.
  593. - On some controllers, command timeout. In this case, there may be a
  594. mechanism to determine that the timeout is due to transmission error.
  595. - Unknown/random errors, timeouts and all sorts of weirdities.
  596. As described above, transmission errors can cause wide variety of
  597. symptoms ranging from device ICRC error to random device lockup, and,
  598. for many cases, there is no way to tell if an error condition is due to
  599. transmission error or not; therefore, it's necessary to employ some kind
  600. of heuristic when dealing with errors and timeouts. For example,
  601. encountering repetitive ABRT errors for known supported command is
  602. likely to indicate ATA bus error.
  603. Once it's determined that ATA bus errors have possibly occurred,
  604. lowering ATA bus transmission speed is one of actions which may
  605. alleviate the problem. See `Reconfigure transport <#exrecReconf>`__ for
  606. more information.
  607. PCI bus error
  608. ~~~~~~~~~~~~~
  609. Data corruption or other failures during transmission over PCI (or other
  610. system bus). For standard BMDMA, this is indicated by Error bit in the
  611. BMDMA Status register. This type of errors must be logged as it
  612. indicates something is very wrong with the system. Resetting host
  613. controller is recommended.
  614. Late completion
  615. ~~~~~~~~~~~~~~~
  616. This occurs when timeout occurs and the timeout handler finds out that
  617. the timed out command has completed successfully or with error. This is
  618. usually caused by lost interrupts. This type of errors must be logged.
  619. Resetting host controller is recommended.
  620. Unknown error (timeout)
  621. ~~~~~~~~~~~~~~~~~~~~~~~
  622. This is when timeout occurs and the command is still processing or the
  623. host and device are in unknown state. When this occurs, HSM could be in
  624. any valid or invalid state. To bring the device to known state and make
  625. it forget about the timed out command, resetting is necessary. The timed
  626. out command may be retried.
  627. Timeouts can also be caused by transmission errors. Refer to
  628. `ATA bus error <#excatATAbusErr>`__ for more details.
  629. Hotplug and power management exceptions
  630. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  631. <<TODO: fill here>>
  632. EH recovery actions
  633. -------------------
  634. This section discusses several important recovery actions.
  635. Clearing error condition
  636. ~~~~~~~~~~~~~~~~~~~~~~~~
  637. Many controllers require its error registers to be cleared by error
  638. handler. Different controllers may have different requirements.
  639. For SATA, it's strongly recommended to clear at least SError register
  640. during error handling.
  641. Reset
  642. ~~~~~
  643. During EH, resetting is necessary in the following cases.
  644. - HSM is in unknown or invalid state
  645. - HBA is in unknown or invalid state
  646. - EH needs to make HBA/device forget about in-flight commands
  647. - HBA/device behaves weirdly
  648. Resetting during EH might be a good idea regardless of error condition
  649. to improve EH robustness. Whether to reset both or either one of HBA and
  650. device depends on situation but the following scheme is recommended.
  651. - When it's known that HBA is in ready state but ATA/ATAPI device is in
  652. unknown state, reset only device.
  653. - If HBA is in unknown state, reset both HBA and device.
  654. HBA resetting is implementation specific. For a controller complying to
  655. taskfile/BMDMA PCI IDE, stopping active DMA transaction may be
  656. sufficient iff BMDMA state is the only HBA context. But even mostly
  657. taskfile/BMDMA PCI IDE complying controllers may have implementation
  658. specific requirements and mechanism to reset themselves. This must be
  659. addressed by specific drivers.
  660. OTOH, ATA/ATAPI standard describes in detail ways to reset ATA/ATAPI
  661. devices.
  662. PATA hardware reset
  663. This is hardware initiated device reset signalled with asserted PATA
  664. RESET- signal. There is no standard way to initiate hardware reset
  665. from software although some hardware provides registers that allow
  666. driver to directly tweak the RESET- signal.
  667. Software reset
  668. This is achieved by turning CONTROL SRST bit on for at least 5us.
  669. Both PATA and SATA support it but, in case of SATA, this may require
  670. controller-specific support as the second Register FIS to clear SRST
  671. should be transmitted while BSY bit is still set. Note that on PATA,
  672. this resets both master and slave devices on a channel.
  673. EXECUTE DEVICE DIAGNOSTIC command
  674. Although ATA/ATAPI standard doesn't describe exactly, EDD implies
  675. some level of resetting, possibly similar level with software reset.
  676. Host-side EDD protocol can be handled with normal command processing
  677. and most SATA controllers should be able to handle EDD's just like
  678. other commands. As in software reset, EDD affects both devices on a
  679. PATA bus.
  680. Although EDD does reset devices, this doesn't suit error handling as
  681. EDD cannot be issued while BSY is set and it's unclear how it will
  682. act when device is in unknown/weird state.
  683. ATAPI DEVICE RESET command
  684. This is very similar to software reset except that reset can be
  685. restricted to the selected device without affecting the other device
  686. sharing the cable.
  687. SATA phy reset
  688. This is the preferred way of resetting a SATA device. In effect,
  689. it's identical to PATA hardware reset. Note that this can be done
  690. with the standard SCR Control register. As such, it's usually easier
  691. to implement than software reset.
  692. One more thing to consider when resetting devices is that resetting
  693. clears certain configuration parameters and they need to be set to their
  694. previous or newly adjusted values after reset.
  695. Parameters affected are.
  696. - CHS set up with INITIALIZE DEVICE PARAMETERS (seldom used)
  697. - Parameters set with SET FEATURES including transfer mode setting
  698. - Block count set with SET MULTIPLE MODE
  699. - Other parameters (SET MAX, MEDIA LOCK...)
  700. ATA/ATAPI standard specifies that some parameters must be maintained
  701. across hardware or software reset, but doesn't strictly specify all of
  702. them. Always reconfiguring needed parameters after reset is required for
  703. robustness. Note that this also applies when resuming from deep sleep
  704. (power-off).
  705. Also, ATA/ATAPI standard requires that IDENTIFY DEVICE / IDENTIFY PACKET
  706. DEVICE is issued after any configuration parameter is updated or a
  707. hardware reset and the result used for further operation. OS driver is
  708. required to implement revalidation mechanism to support this.
  709. Reconfigure transport
  710. ~~~~~~~~~~~~~~~~~~~~~
  711. For both PATA and SATA, a lot of corners are cut for cheap connectors,
  712. cables or controllers and it's quite common to see high transmission
  713. error rate. This can be mitigated by lowering transmission speed.
  714. The following is a possible scheme Jeff Garzik suggested.
  715. If more than $N (3?) transmission errors happen in 15 minutes,
  716. - if SATA, decrease SATA PHY speed. if speed cannot be decreased,
  717. - decrease UDMA xfer speed. if at UDMA0, switch to PIO4,
  718. - decrease PIO xfer speed. if at PIO3, complain, but continue
  719. ata_piix Internals
  720. ===================
  721. .. kernel-doc:: drivers/ata/ata_piix.c
  722. :internal:
  723. sata_sil Internals
  724. ===================
  725. .. kernel-doc:: drivers/ata/sata_sil.c
  726. :internal:
  727. Thanks
  728. ======
  729. The bulk of the ATA knowledge comes thanks to long conversations with
  730. Andre Hedrick (www.linux-ide.org), and long hours pondering the ATA and
  731. SCSI specifications.
  732. Thanks to Alan Cox for pointing out similarities between SATA and SCSI,
  733. and in general for motivation to hack on libata.
  734. libata's device detection method, ata_pio_devchk, and in general all
  735. the early probing was based on extensive study of Hale Landis's
  736. probe/reset code in his ATADRVR driver (www.ata-atapi.com).