hugetlbpage.rst 1.4 KB

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  1. .. _hugetlbpage_index:
  2. ====================
  3. HugeTLBpage on ARM64
  4. ====================
  5. Hugepage relies on making efficient use of TLBs to improve performance of
  6. address translations. The benefit depends on both -
  7. - the size of hugepages
  8. - size of entries supported by the TLBs
  9. The ARM64 port supports two flavours of hugepages.
  10. 1) Block mappings at the pud/pmd level
  11. --------------------------------------
  12. These are regular hugepages where a pmd or a pud page table entry points to a
  13. block of memory. Regardless of the supported size of entries in TLB, block
  14. mappings reduce the depth of page table walk needed to translate hugepage
  15. addresses.
  16. 2) Using the Contiguous bit
  17. ---------------------------
  18. The architecture provides a contiguous bit in the translation table entries
  19. (D4.5.3, ARM DDI 0487C.a) that hints to the MMU to indicate that it is one of a
  20. contiguous set of entries that can be cached in a single TLB entry.
  21. The contiguous bit is used in Linux to increase the mapping size at the pmd and
  22. pte (last) level. The number of supported contiguous entries varies by page size
  23. and level of the page table.
  24. The following hugepage sizes are supported -
  25. ====== ======== ==== ======== ===
  26. - CONT PTE PMD CONT PMD PUD
  27. ====== ======== ==== ======== ===
  28. 4K: 64K 2M 32M 1G
  29. 16K: 2M 32M 1G
  30. 64K: 2M 512M 16G
  31. ====== ======== ==== ======== ===