cpuidle.rst 42 KB

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  1. .. SPDX-License-Identifier: GPL-2.0
  2. .. include:: <isonum.txt>
  3. .. |struct cpuidle_state| replace:: :c:type:`struct cpuidle_state <cpuidle_state>`
  4. .. |cpufreq| replace:: :doc:`CPU Performance Scaling <cpufreq>`
  5. ========================
  6. CPU Idle Time Management
  7. ========================
  8. :Copyright: |copy| 2018 Intel Corporation
  9. :Author: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  10. Concepts
  11. ========
  12. Modern processors are generally able to enter states in which the execution of
  13. a program is suspended and instructions belonging to it are not fetched from
  14. memory or executed. Those states are the *idle* states of the processor.
  15. Since part of the processor hardware is not used in idle states, entering them
  16. generally allows power drawn by the processor to be reduced and, in consequence,
  17. it is an opportunity to save energy.
  18. CPU idle time management is an energy-efficiency feature concerned about using
  19. the idle states of processors for this purpose.
  20. Logical CPUs
  21. ------------
  22. CPU idle time management operates on CPUs as seen by the *CPU scheduler* (that
  23. is the part of the kernel responsible for the distribution of computational
  24. work in the system). In its view, CPUs are *logical* units. That is, they need
  25. not be separate physical entities and may just be interfaces appearing to
  26. software as individual single-core processors. In other words, a CPU is an
  27. entity which appears to be fetching instructions that belong to one sequence
  28. (program) from memory and executing them, but it need not work this way
  29. physically. Generally, three different cases can be consider here.
  30. First, if the whole processor can only follow one sequence of instructions (one
  31. program) at a time, it is a CPU. In that case, if the hardware is asked to
  32. enter an idle state, that applies to the processor as a whole.
  33. Second, if the processor is multi-core, each core in it is able to follow at
  34. least one program at a time. The cores need not be entirely independent of each
  35. other (for example, they may share caches), but still most of the time they
  36. work physically in parallel with each other, so if each of them executes only
  37. one program, those programs run mostly independently of each other at the same
  38. time. The entire cores are CPUs in that case and if the hardware is asked to
  39. enter an idle state, that applies to the core that asked for it in the first
  40. place, but it also may apply to a larger unit (say a "package" or a "cluster")
  41. that the core belongs to (in fact, it may apply to an entire hierarchy of larger
  42. units containing the core). Namely, if all of the cores in the larger unit
  43. except for one have been put into idle states at the "core level" and the
  44. remaining core asks the processor to enter an idle state, that may trigger it
  45. to put the whole larger unit into an idle state which also will affect the
  46. other cores in that unit.
  47. Finally, each core in a multi-core processor may be able to follow more than one
  48. program in the same time frame (that is, each core may be able to fetch
  49. instructions from multiple locations in memory and execute them in the same time
  50. frame, but not necessarily entirely in parallel with each other). In that case
  51. the cores present themselves to software as "bundles" each consisting of
  52. multiple individual single-core "processors", referred to as *hardware threads*
  53. (or hyper-threads specifically on Intel hardware), that each can follow one
  54. sequence of instructions. Then, the hardware threads are CPUs from the CPU idle
  55. time management perspective and if the processor is asked to enter an idle state
  56. by one of them, the hardware thread (or CPU) that asked for it is stopped, but
  57. nothing more happens, unless all of the other hardware threads within the same
  58. core also have asked the processor to enter an idle state. In that situation,
  59. the core may be put into an idle state individually or a larger unit containing
  60. it may be put into an idle state as a whole (if the other cores within the
  61. larger unit are in idle states already).
  62. Idle CPUs
  63. ---------
  64. Logical CPUs, simply referred to as "CPUs" in what follows, are regarded as
  65. *idle* by the Linux kernel when there are no tasks to run on them except for the
  66. special "idle" task.
  67. Tasks are the CPU scheduler's representation of work. Each task consists of a
  68. sequence of instructions to execute, or code, data to be manipulated while
  69. running that code, and some context information that needs to be loaded into the
  70. processor every time the task's code is run by a CPU. The CPU scheduler
  71. distributes work by assigning tasks to run to the CPUs present in the system.
  72. Tasks can be in various states. In particular, they are *runnable* if there are
  73. no specific conditions preventing their code from being run by a CPU as long as
  74. there is a CPU available for that (for example, they are not waiting for any
  75. events to occur or similar). When a task becomes runnable, the CPU scheduler
  76. assigns it to one of the available CPUs to run and if there are no more runnable
  77. tasks assigned to it, the CPU will load the given task's context and run its
  78. code (from the instruction following the last one executed so far, possibly by
  79. another CPU). [If there are multiple runnable tasks assigned to one CPU
  80. simultaneously, they will be subject to prioritization and time sharing in order
  81. to allow them to make some progress over time.]
  82. The special "idle" task becomes runnable if there are no other runnable tasks
  83. assigned to the given CPU and the CPU is then regarded as idle. In other words,
  84. in Linux idle CPUs run the code of the "idle" task called *the idle loop*. That
  85. code may cause the processor to be put into one of its idle states, if they are
  86. supported, in order to save energy, but if the processor does not support any
  87. idle states, or there is not enough time to spend in an idle state before the
  88. next wakeup event, or there are strict latency constraints preventing any of the
  89. available idle states from being used, the CPU will simply execute more or less
  90. useless instructions in a loop until it is assigned a new task to run.
  91. .. _idle-loop:
  92. The Idle Loop
  93. =============
  94. The idle loop code takes two major steps in every iteration of it. First, it
  95. calls into a code module referred to as the *governor* that belongs to the CPU
  96. idle time management subsystem called ``CPUIdle`` to select an idle state for
  97. the CPU to ask the hardware to enter. Second, it invokes another code module
  98. from the ``CPUIdle`` subsystem, called the *driver*, to actually ask the
  99. processor hardware to enter the idle state selected by the governor.
  100. The role of the governor is to find an idle state most suitable for the
  101. conditions at hand. For this purpose, idle states that the hardware can be
  102. asked to enter by logical CPUs are represented in an abstract way independent of
  103. the platform or the processor architecture and organized in a one-dimensional
  104. (linear) array. That array has to be prepared and supplied by the ``CPUIdle``
  105. driver matching the platform the kernel is running on at the initialization
  106. time. This allows ``CPUIdle`` governors to be independent of the underlying
  107. hardware and to work with any platforms that the Linux kernel can run on.
  108. Each idle state present in that array is characterized by two parameters to be
  109. taken into account by the governor, the *target residency* and the (worst-case)
  110. *exit latency*. The target residency is the minimum time the hardware must
  111. spend in the given state, including the time needed to enter it (which may be
  112. substantial), in order to save more energy than it would save by entering one of
  113. the shallower idle states instead. [The "depth" of an idle state roughly
  114. corresponds to the power drawn by the processor in that state.] The exit
  115. latency, in turn, is the maximum time it will take a CPU asking the processor
  116. hardware to enter an idle state to start executing the first instruction after a
  117. wakeup from that state. Note that in general the exit latency also must cover
  118. the time needed to enter the given state in case the wakeup occurs when the
  119. hardware is entering it and it must be entered completely to be exited in an
  120. ordered manner.
  121. There are two types of information that can influence the governor's decisions.
  122. First of all, the governor knows the time until the closest timer event. That
  123. time is known exactly, because the kernel programs timers and it knows exactly
  124. when they will trigger, and it is the maximum time the hardware that the given
  125. CPU depends on can spend in an idle state, including the time necessary to enter
  126. and exit it. However, the CPU may be woken up by a non-timer event at any time
  127. (in particular, before the closest timer triggers) and it generally is not known
  128. when that may happen. The governor can only see how much time the CPU actually
  129. was idle after it has been woken up (that time will be referred to as the *idle
  130. duration* from now on) and it can use that information somehow along with the
  131. time until the closest timer to estimate the idle duration in future. How the
  132. governor uses that information depends on what algorithm is implemented by it
  133. and that is the primary reason for having more than one governor in the
  134. ``CPUIdle`` subsystem.
  135. There are four ``CPUIdle`` governors available, ``menu``, `TEO <teo-gov_>`_,
  136. ``ladder`` and ``haltpoll``. Which of them is used by default depends on the
  137. configuration of the kernel and in particular on whether or not the scheduler
  138. tick can be `stopped by the idle loop <idle-cpus-and-tick_>`_. Available
  139. governors can be read from the :file:`available_governors`, and the governor
  140. can be changed at runtime. The name of the ``CPUIdle`` governor currently
  141. used by the kernel can be read from the :file:`current_governor_ro` or
  142. :file:`current_governor` file under :file:`/sys/devices/system/cpu/cpuidle/`
  143. in ``sysfs``.
  144. Which ``CPUIdle`` driver is used, on the other hand, usually depends on the
  145. platform the kernel is running on, but there are platforms with more than one
  146. matching driver. For example, there are two drivers that can work with the
  147. majority of Intel platforms, ``intel_idle`` and ``acpi_idle``, one with
  148. hardcoded idle states information and the other able to read that information
  149. from the system's ACPI tables, respectively. Still, even in those cases, the
  150. driver chosen at the system initialization time cannot be replaced later, so the
  151. decision on which one of them to use has to be made early (on Intel platforms
  152. the ``acpi_idle`` driver will be used if ``intel_idle`` is disabled for some
  153. reason or if it does not recognize the processor). The name of the ``CPUIdle``
  154. driver currently used by the kernel can be read from the :file:`current_driver`
  155. file under :file:`/sys/devices/system/cpu/cpuidle/` in ``sysfs``.
  156. .. _idle-cpus-and-tick:
  157. Idle CPUs and The Scheduler Tick
  158. ================================
  159. The scheduler tick is a timer that triggers periodically in order to implement
  160. the time sharing strategy of the CPU scheduler. Of course, if there are
  161. multiple runnable tasks assigned to one CPU at the same time, the only way to
  162. allow them to make reasonable progress in a given time frame is to make them
  163. share the available CPU time. Namely, in rough approximation, each task is
  164. given a slice of the CPU time to run its code, subject to the scheduling class,
  165. prioritization and so on and when that time slice is used up, the CPU should be
  166. switched over to running (the code of) another task. The currently running task
  167. may not want to give the CPU away voluntarily, however, and the scheduler tick
  168. is there to make the switch happen regardless. That is not the only role of the
  169. tick, but it is the primary reason for using it.
  170. The scheduler tick is problematic from the CPU idle time management perspective,
  171. because it triggers periodically and relatively often (depending on the kernel
  172. configuration, the length of the tick period is between 1 ms and 10 ms).
  173. Thus, if the tick is allowed to trigger on idle CPUs, it will not make sense
  174. for them to ask the hardware to enter idle states with target residencies above
  175. the tick period length. Moreover, in that case the idle duration of any CPU
  176. will never exceed the tick period length and the energy used for entering and
  177. exiting idle states due to the tick wakeups on idle CPUs will be wasted.
  178. Fortunately, it is not really necessary to allow the tick to trigger on idle
  179. CPUs, because (by definition) they have no tasks to run except for the special
  180. "idle" one. In other words, from the CPU scheduler perspective, the only user
  181. of the CPU time on them is the idle loop. Since the time of an idle CPU need
  182. not be shared between multiple runnable tasks, the primary reason for using the
  183. tick goes away if the given CPU is idle. Consequently, it is possible to stop
  184. the scheduler tick entirely on idle CPUs in principle, even though that may not
  185. always be worth the effort.
  186. Whether or not it makes sense to stop the scheduler tick in the idle loop
  187. depends on what is expected by the governor. First, if there is another
  188. (non-tick) timer due to trigger within the tick range, stopping the tick clearly
  189. would be a waste of time, even though the timer hardware may not need to be
  190. reprogrammed in that case. Second, if the governor is expecting a non-timer
  191. wakeup within the tick range, stopping the tick is not necessary and it may even
  192. be harmful. Namely, in that case the governor will select an idle state with
  193. the target residency within the time until the expected wakeup, so that state is
  194. going to be relatively shallow. The governor really cannot select a deep idle
  195. state then, as that would contradict its own expectation of a wakeup in short
  196. order. Now, if the wakeup really occurs shortly, stopping the tick would be a
  197. waste of time and in this case the timer hardware would need to be reprogrammed,
  198. which is expensive. On the other hand, if the tick is stopped and the wakeup
  199. does not occur any time soon, the hardware may spend indefinite amount of time
  200. in the shallow idle state selected by the governor, which will be a waste of
  201. energy. Hence, if the governor is expecting a wakeup of any kind within the
  202. tick range, it is better to allow the tick trigger. Otherwise, however, the
  203. governor will select a relatively deep idle state, so the tick should be stopped
  204. so that it does not wake up the CPU too early.
  205. In any case, the governor knows what it is expecting and the decision on whether
  206. or not to stop the scheduler tick belongs to it. Still, if the tick has been
  207. stopped already (in one of the previous iterations of the loop), it is better
  208. to leave it as is and the governor needs to take that into account.
  209. The kernel can be configured to disable stopping the scheduler tick in the idle
  210. loop altogether. That can be done through the build-time configuration of it
  211. (by unsetting the ``CONFIG_NO_HZ_IDLE`` configuration option) or by passing
  212. ``nohz=off`` to it in the command line. In both cases, as the stopping of the
  213. scheduler tick is disabled, the governor's decisions regarding it are simply
  214. ignored by the idle loop code and the tick is never stopped.
  215. The systems that run kernels configured to allow the scheduler tick to be
  216. stopped on idle CPUs are referred to as *tickless* systems and they are
  217. generally regarded as more energy-efficient than the systems running kernels in
  218. which the tick cannot be stopped. If the given system is tickless, it will use
  219. the ``menu`` governor by default and if it is not tickless, the default
  220. ``CPUIdle`` governor on it will be ``ladder``.
  221. .. _menu-gov:
  222. The ``menu`` Governor
  223. =====================
  224. The ``menu`` governor is the default ``CPUIdle`` governor for tickless systems.
  225. It is quite complex, but the basic principle of its design is straightforward.
  226. Namely, when invoked to select an idle state for a CPU (i.e. an idle state that
  227. the CPU will ask the processor hardware to enter), it attempts to predict the
  228. idle duration and uses the predicted value for idle state selection.
  229. It first obtains the time until the closest timer event with the assumption
  230. that the scheduler tick will be stopped. That time, referred to as the *sleep
  231. length* in what follows, is the upper bound on the time before the next CPU
  232. wakeup. It is used to determine the sleep length range, which in turn is needed
  233. to get the sleep length correction factor.
  234. The ``menu`` governor maintains two arrays of sleep length correction factors.
  235. One of them is used when tasks previously running on the given CPU are waiting
  236. for some I/O operations to complete and the other one is used when that is not
  237. the case. Each array contains several correction factor values that correspond
  238. to different sleep length ranges organized so that each range represented in the
  239. array is approximately 10 times wider than the previous one.
  240. The correction factor for the given sleep length range (determined before
  241. selecting the idle state for the CPU) is updated after the CPU has been woken
  242. up and the closer the sleep length is to the observed idle duration, the closer
  243. to 1 the correction factor becomes (it must fall between 0 and 1 inclusive).
  244. The sleep length is multiplied by the correction factor for the range that it
  245. falls into to obtain the first approximation of the predicted idle duration.
  246. Next, the governor uses a simple pattern recognition algorithm to refine its
  247. idle duration prediction. Namely, it saves the last 8 observed idle duration
  248. values and, when predicting the idle duration next time, it computes the average
  249. and variance of them. If the variance is small (smaller than 400 square
  250. milliseconds) or it is small relative to the average (the average is greater
  251. that 6 times the standard deviation), the average is regarded as the "typical
  252. interval" value. Otherwise, the longest of the saved observed idle duration
  253. values is discarded and the computation is repeated for the remaining ones.
  254. Again, if the variance of them is small (in the above sense), the average is
  255. taken as the "typical interval" value and so on, until either the "typical
  256. interval" is determined or too many data points are disregarded, in which case
  257. the "typical interval" is assumed to equal "infinity" (the maximum unsigned
  258. integer value). The "typical interval" computed this way is compared with the
  259. sleep length multiplied by the correction factor and the minimum of the two is
  260. taken as the predicted idle duration.
  261. Then, the governor computes an extra latency limit to help "interactive"
  262. workloads. It uses the observation that if the exit latency of the selected
  263. idle state is comparable with the predicted idle duration, the total time spent
  264. in that state probably will be very short and the amount of energy to save by
  265. entering it will be relatively small, so likely it is better to avoid the
  266. overhead related to entering that state and exiting it. Thus selecting a
  267. shallower state is likely to be a better option then. The first approximation
  268. of the extra latency limit is the predicted idle duration itself which
  269. additionally is divided by a value depending on the number of tasks that
  270. previously ran on the given CPU and now they are waiting for I/O operations to
  271. complete. The result of that division is compared with the latency limit coming
  272. from the power management quality of service, or `PM QoS <cpu-pm-qos_>`_,
  273. framework and the minimum of the two is taken as the limit for the idle states'
  274. exit latency.
  275. Now, the governor is ready to walk the list of idle states and choose one of
  276. them. For this purpose, it compares the target residency of each state with
  277. the predicted idle duration and the exit latency of it with the computed latency
  278. limit. It selects the state with the target residency closest to the predicted
  279. idle duration, but still below it, and exit latency that does not exceed the
  280. limit.
  281. In the final step the governor may still need to refine the idle state selection
  282. if it has not decided to `stop the scheduler tick <idle-cpus-and-tick_>`_. That
  283. happens if the idle duration predicted by it is less than the tick period and
  284. the tick has not been stopped already (in a previous iteration of the idle
  285. loop). Then, the sleep length used in the previous computations may not reflect
  286. the real time until the closest timer event and if it really is greater than
  287. that time, the governor may need to select a shallower state with a suitable
  288. target residency.
  289. .. _teo-gov:
  290. The Timer Events Oriented (TEO) Governor
  291. ========================================
  292. The timer events oriented (TEO) governor is an alternative ``CPUIdle`` governor
  293. for tickless systems. It follows the same basic strategy as the ``menu`` `one
  294. <menu-gov_>`_: it always tries to find the deepest idle state suitable for the
  295. given conditions. However, it applies a different approach to that problem.
  296. First, it does not use sleep length correction factors, but instead it attempts
  297. to correlate the observed idle duration values with the available idle states
  298. and use that information to pick up the idle state that is most likely to
  299. "match" the upcoming CPU idle interval. Second, it does not take the tasks
  300. that were running on the given CPU in the past and are waiting on some I/O
  301. operations to complete now at all (there is no guarantee that they will run on
  302. the same CPU when they become runnable again) and the pattern detection code in
  303. it avoids taking timer wakeups into account. It also only uses idle duration
  304. values less than the current time till the closest timer (with the scheduler
  305. tick excluded) for that purpose.
  306. Like in the ``menu`` governor `case <menu-gov_>`_, the first step is to obtain
  307. the *sleep length*, which is the time until the closest timer event with the
  308. assumption that the scheduler tick will be stopped (that also is the upper bound
  309. on the time until the next CPU wakeup). That value is then used to preselect an
  310. idle state on the basis of three metrics maintained for each idle state provided
  311. by the ``CPUIdle`` driver: ``hits``, ``misses`` and ``early_hits``.
  312. The ``hits`` and ``misses`` metrics measure the likelihood that a given idle
  313. state will "match" the observed (post-wakeup) idle duration if it "matches" the
  314. sleep length. They both are subject to decay (after a CPU wakeup) every time
  315. the target residency of the idle state corresponding to them is less than or
  316. equal to the sleep length and the target residency of the next idle state is
  317. greater than the sleep length (that is, when the idle state corresponding to
  318. them "matches" the sleep length). The ``hits`` metric is increased if the
  319. former condition is satisfied and the target residency of the given idle state
  320. is less than or equal to the observed idle duration and the target residency of
  321. the next idle state is greater than the observed idle duration at the same time
  322. (that is, it is increased when the given idle state "matches" both the sleep
  323. length and the observed idle duration). In turn, the ``misses`` metric is
  324. increased when the given idle state "matches" the sleep length only and the
  325. observed idle duration is too short for its target residency.
  326. The ``early_hits`` metric measures the likelihood that a given idle state will
  327. "match" the observed (post-wakeup) idle duration if it does not "match" the
  328. sleep length. It is subject to decay on every CPU wakeup and it is increased
  329. when the idle state corresponding to it "matches" the observed (post-wakeup)
  330. idle duration and the target residency of the next idle state is less than or
  331. equal to the sleep length (i.e. the idle state "matching" the sleep length is
  332. deeper than the given one).
  333. The governor walks the list of idle states provided by the ``CPUIdle`` driver
  334. and finds the last (deepest) one with the target residency less than or equal
  335. to the sleep length. Then, the ``hits`` and ``misses`` metrics of that idle
  336. state are compared with each other and it is preselected if the ``hits`` one is
  337. greater (which means that that idle state is likely to "match" the observed idle
  338. duration after CPU wakeup). If the ``misses`` one is greater, the governor
  339. preselects the shallower idle state with the maximum ``early_hits`` metric
  340. (or if there are multiple shallower idle states with equal ``early_hits``
  341. metric which also is the maximum, the shallowest of them will be preselected).
  342. [If there is a wakeup latency constraint coming from the `PM QoS framework
  343. <cpu-pm-qos_>`_ which is hit before reaching the deepest idle state with the
  344. target residency within the sleep length, the deepest idle state with the exit
  345. latency within the constraint is preselected without consulting the ``hits``,
  346. ``misses`` and ``early_hits`` metrics.]
  347. Next, the governor takes several idle duration values observed most recently
  348. into consideration and if at least a half of them are greater than or equal to
  349. the target residency of the preselected idle state, that idle state becomes the
  350. final candidate to ask for. Otherwise, the average of the most recent idle
  351. duration values below the target residency of the preselected idle state is
  352. computed and the governor walks the idle states shallower than the preselected
  353. one and finds the deepest of them with the target residency within that average.
  354. That idle state is then taken as the final candidate to ask for.
  355. Still, at this point the governor may need to refine the idle state selection if
  356. it has not decided to `stop the scheduler tick <idle-cpus-and-tick_>`_. That
  357. generally happens if the target residency of the idle state selected so far is
  358. less than the tick period and the tick has not been stopped already (in a
  359. previous iteration of the idle loop). Then, like in the ``menu`` governor
  360. `case <menu-gov_>`_, the sleep length used in the previous computations may not
  361. reflect the real time until the closest timer event and if it really is greater
  362. than that time, a shallower state with a suitable target residency may need to
  363. be selected.
  364. .. _idle-states-representation:
  365. Representation of Idle States
  366. =============================
  367. For the CPU idle time management purposes all of the physical idle states
  368. supported by the processor have to be represented as a one-dimensional array of
  369. |struct cpuidle_state| objects each allowing an individual (logical) CPU to ask
  370. the processor hardware to enter an idle state of certain properties. If there
  371. is a hierarchy of units in the processor, one |struct cpuidle_state| object can
  372. cover a combination of idle states supported by the units at different levels of
  373. the hierarchy. In that case, the `target residency and exit latency parameters
  374. of it <idle-loop_>`_, must reflect the properties of the idle state at the
  375. deepest level (i.e. the idle state of the unit containing all of the other
  376. units).
  377. For example, take a processor with two cores in a larger unit referred to as
  378. a "module" and suppose that asking the hardware to enter a specific idle state
  379. (say "X") at the "core" level by one core will trigger the module to try to
  380. enter a specific idle state of its own (say "MX") if the other core is in idle
  381. state "X" already. In other words, asking for idle state "X" at the "core"
  382. level gives the hardware a license to go as deep as to idle state "MX" at the
  383. "module" level, but there is no guarantee that this is going to happen (the core
  384. asking for idle state "X" may just end up in that state by itself instead).
  385. Then, the target residency of the |struct cpuidle_state| object representing
  386. idle state "X" must reflect the minimum time to spend in idle state "MX" of
  387. the module (including the time needed to enter it), because that is the minimum
  388. time the CPU needs to be idle to save any energy in case the hardware enters
  389. that state. Analogously, the exit latency parameter of that object must cover
  390. the exit time of idle state "MX" of the module (and usually its entry time too),
  391. because that is the maximum delay between a wakeup signal and the time the CPU
  392. will start to execute the first new instruction (assuming that both cores in the
  393. module will always be ready to execute instructions as soon as the module
  394. becomes operational as a whole).
  395. There are processors without direct coordination between different levels of the
  396. hierarchy of units inside them, however. In those cases asking for an idle
  397. state at the "core" level does not automatically affect the "module" level, for
  398. example, in any way and the ``CPUIdle`` driver is responsible for the entire
  399. handling of the hierarchy. Then, the definition of the idle state objects is
  400. entirely up to the driver, but still the physical properties of the idle state
  401. that the processor hardware finally goes into must always follow the parameters
  402. used by the governor for idle state selection (for instance, the actual exit
  403. latency of that idle state must not exceed the exit latency parameter of the
  404. idle state object selected by the governor).
  405. In addition to the target residency and exit latency idle state parameters
  406. discussed above, the objects representing idle states each contain a few other
  407. parameters describing the idle state and a pointer to the function to run in
  408. order to ask the hardware to enter that state. Also, for each
  409. |struct cpuidle_state| object, there is a corresponding
  410. :c:type:`struct cpuidle_state_usage <cpuidle_state_usage>` one containing usage
  411. statistics of the given idle state. That information is exposed by the kernel
  412. via ``sysfs``.
  413. For each CPU in the system, there is a :file:`/sys/devices/system/cpu/cpu<N>/cpuidle/`
  414. directory in ``sysfs``, where the number ``<N>`` is assigned to the given
  415. CPU at the initialization time. That directory contains a set of subdirectories
  416. called :file:`state0`, :file:`state1` and so on, up to the number of idle state
  417. objects defined for the given CPU minus one. Each of these directories
  418. corresponds to one idle state object and the larger the number in its name, the
  419. deeper the (effective) idle state represented by it. Each of them contains
  420. a number of files (attributes) representing the properties of the idle state
  421. object corresponding to it, as follows:
  422. ``above``
  423. Total number of times this idle state had been asked for, but the
  424. observed idle duration was certainly too short to match its target
  425. residency.
  426. ``below``
  427. Total number of times this idle state had been asked for, but certainly
  428. a deeper idle state would have been a better match for the observed idle
  429. duration.
  430. ``desc``
  431. Description of the idle state.
  432. ``disable``
  433. Whether or not this idle state is disabled.
  434. ``default_status``
  435. The default status of this state, "enabled" or "disabled".
  436. ``latency``
  437. Exit latency of the idle state in microseconds.
  438. ``name``
  439. Name of the idle state.
  440. ``power``
  441. Power drawn by hardware in this idle state in milliwatts (if specified,
  442. 0 otherwise).
  443. ``residency``
  444. Target residency of the idle state in microseconds.
  445. ``time``
  446. Total time spent in this idle state by the given CPU (as measured by the
  447. kernel) in microseconds.
  448. ``usage``
  449. Total number of times the hardware has been asked by the given CPU to
  450. enter this idle state.
  451. ``rejected``
  452. Total number of times a request to enter this idle state on the given
  453. CPU was rejected.
  454. The :file:`desc` and :file:`name` files both contain strings. The difference
  455. between them is that the name is expected to be more concise, while the
  456. description may be longer and it may contain white space or special characters.
  457. The other files listed above contain integer numbers.
  458. The :file:`disable` attribute is the only writeable one. If it contains 1, the
  459. given idle state is disabled for this particular CPU, which means that the
  460. governor will never select it for this particular CPU and the ``CPUIdle``
  461. driver will never ask the hardware to enter it for that CPU as a result.
  462. However, disabling an idle state for one CPU does not prevent it from being
  463. asked for by the other CPUs, so it must be disabled for all of them in order to
  464. never be asked for by any of them. [Note that, due to the way the ``ladder``
  465. governor is implemented, disabling an idle state prevents that governor from
  466. selecting any idle states deeper than the disabled one too.]
  467. If the :file:`disable` attribute contains 0, the given idle state is enabled for
  468. this particular CPU, but it still may be disabled for some or all of the other
  469. CPUs in the system at the same time. Writing 1 to it causes the idle state to
  470. be disabled for this particular CPU and writing 0 to it allows the governor to
  471. take it into consideration for the given CPU and the driver to ask for it,
  472. unless that state was disabled globally in the driver (in which case it cannot
  473. be used at all).
  474. The :file:`power` attribute is not defined very well, especially for idle state
  475. objects representing combinations of idle states at different levels of the
  476. hierarchy of units in the processor, and it generally is hard to obtain idle
  477. state power numbers for complex hardware, so :file:`power` often contains 0 (not
  478. available) and if it contains a nonzero number, that number may not be very
  479. accurate and it should not be relied on for anything meaningful.
  480. The number in the :file:`time` file generally may be greater than the total time
  481. really spent by the given CPU in the given idle state, because it is measured by
  482. the kernel and it may not cover the cases in which the hardware refused to enter
  483. this idle state and entered a shallower one instead of it (or even it did not
  484. enter any idle state at all). The kernel can only measure the time span between
  485. asking the hardware to enter an idle state and the subsequent wakeup of the CPU
  486. and it cannot say what really happened in the meantime at the hardware level.
  487. Moreover, if the idle state object in question represents a combination of idle
  488. states at different levels of the hierarchy of units in the processor,
  489. the kernel can never say how deep the hardware went down the hierarchy in any
  490. particular case. For these reasons, the only reliable way to find out how
  491. much time has been spent by the hardware in different idle states supported by
  492. it is to use idle state residency counters in the hardware, if available.
  493. Generally, an interrupt received when trying to enter an idle state causes the
  494. idle state entry request to be rejected, in which case the ``CPUIdle`` driver
  495. may return an error code to indicate that this was the case. The :file:`usage`
  496. and :file:`rejected` files report the number of times the given idle state
  497. was entered successfully or rejected, respectively.
  498. .. _cpu-pm-qos:
  499. Power Management Quality of Service for CPUs
  500. ============================================
  501. The power management quality of service (PM QoS) framework in the Linux kernel
  502. allows kernel code and user space processes to set constraints on various
  503. energy-efficiency features of the kernel to prevent performance from dropping
  504. below a required level.
  505. CPU idle time management can be affected by PM QoS in two ways, through the
  506. global CPU latency limit and through the resume latency constraints for
  507. individual CPUs. Kernel code (e.g. device drivers) can set both of them with
  508. the help of special internal interfaces provided by the PM QoS framework. User
  509. space can modify the former by opening the :file:`cpu_dma_latency` special
  510. device file under :file:`/dev/` and writing a binary value (interpreted as a
  511. signed 32-bit integer) to it. In turn, the resume latency constraint for a CPU
  512. can be modified from user space by writing a string (representing a signed
  513. 32-bit integer) to the :file:`power/pm_qos_resume_latency_us` file under
  514. :file:`/sys/devices/system/cpu/cpu<N>/` in ``sysfs``, where the CPU number
  515. ``<N>`` is allocated at the system initialization time. Negative values
  516. will be rejected in both cases and, also in both cases, the written integer
  517. number will be interpreted as a requested PM QoS constraint in microseconds.
  518. The requested value is not automatically applied as a new constraint, however,
  519. as it may be less restrictive (greater in this particular case) than another
  520. constraint previously requested by someone else. For this reason, the PM QoS
  521. framework maintains a list of requests that have been made so far for the
  522. global CPU latency limit and for each individual CPU, aggregates them and
  523. applies the effective (minimum in this particular case) value as the new
  524. constraint.
  525. In fact, opening the :file:`cpu_dma_latency` special device file causes a new
  526. PM QoS request to be created and added to a global priority list of CPU latency
  527. limit requests and the file descriptor coming from the "open" operation
  528. represents that request. If that file descriptor is then used for writing, the
  529. number written to it will be associated with the PM QoS request represented by
  530. it as a new requested limit value. Next, the priority list mechanism will be
  531. used to determine the new effective value of the entire list of requests and
  532. that effective value will be set as a new CPU latency limit. Thus requesting a
  533. new limit value will only change the real limit if the effective "list" value is
  534. affected by it, which is the case if it is the minimum of the requested values
  535. in the list.
  536. The process holding a file descriptor obtained by opening the
  537. :file:`cpu_dma_latency` special device file controls the PM QoS request
  538. associated with that file descriptor, but it controls this particular PM QoS
  539. request only.
  540. Closing the :file:`cpu_dma_latency` special device file or, more precisely, the
  541. file descriptor obtained while opening it, causes the PM QoS request associated
  542. with that file descriptor to be removed from the global priority list of CPU
  543. latency limit requests and destroyed. If that happens, the priority list
  544. mechanism will be used again, to determine the new effective value for the whole
  545. list and that value will become the new limit.
  546. In turn, for each CPU there is one resume latency PM QoS request associated with
  547. the :file:`power/pm_qos_resume_latency_us` file under
  548. :file:`/sys/devices/system/cpu/cpu<N>/` in ``sysfs`` and writing to it causes
  549. this single PM QoS request to be updated regardless of which user space
  550. process does that. In other words, this PM QoS request is shared by the entire
  551. user space, so access to the file associated with it needs to be arbitrated
  552. to avoid confusion. [Arguably, the only legitimate use of this mechanism in
  553. practice is to pin a process to the CPU in question and let it use the
  554. ``sysfs`` interface to control the resume latency constraint for it.] It is
  555. still only a request, however. It is an entry in a priority list used to
  556. determine the effective value to be set as the resume latency constraint for the
  557. CPU in question every time the list of requests is updated this way or another
  558. (there may be other requests coming from kernel code in that list).
  559. CPU idle time governors are expected to regard the minimum of the global
  560. (effective) CPU latency limit and the effective resume latency constraint for
  561. the given CPU as the upper limit for the exit latency of the idle states that
  562. they are allowed to select for that CPU. They should never select any idle
  563. states with exit latency beyond that limit.
  564. Idle States Control Via Kernel Command Line
  565. ===========================================
  566. In addition to the ``sysfs`` interface allowing individual idle states to be
  567. `disabled for individual CPUs <idle-states-representation_>`_, there are kernel
  568. command line parameters affecting CPU idle time management.
  569. The ``cpuidle.off=1`` kernel command line option can be used to disable the
  570. CPU idle time management entirely. It does not prevent the idle loop from
  571. running on idle CPUs, but it prevents the CPU idle time governors and drivers
  572. from being invoked. If it is added to the kernel command line, the idle loop
  573. will ask the hardware to enter idle states on idle CPUs via the CPU architecture
  574. support code that is expected to provide a default mechanism for this purpose.
  575. That default mechanism usually is the least common denominator for all of the
  576. processors implementing the architecture (i.e. CPU instruction set) in question,
  577. however, so it is rather crude and not very energy-efficient. For this reason,
  578. it is not recommended for production use.
  579. The ``cpuidle.governor=`` kernel command line switch allows the ``CPUIdle``
  580. governor to use to be specified. It has to be appended with a string matching
  581. the name of an available governor (e.g. ``cpuidle.governor=menu``) and that
  582. governor will be used instead of the default one. It is possible to force
  583. the ``menu`` governor to be used on the systems that use the ``ladder`` governor
  584. by default this way, for example.
  585. The other kernel command line parameters controlling CPU idle time management
  586. described below are only relevant for the *x86* architecture and some of
  587. them affect Intel processors only.
  588. The *x86* architecture support code recognizes three kernel command line
  589. options related to CPU idle time management: ``idle=poll``, ``idle=halt``,
  590. and ``idle=nomwait``. The first two of them disable the ``acpi_idle`` and
  591. ``intel_idle`` drivers altogether, which effectively causes the entire
  592. ``CPUIdle`` subsystem to be disabled and makes the idle loop invoke the
  593. architecture support code to deal with idle CPUs. How it does that depends on
  594. which of the two parameters is added to the kernel command line. In the
  595. ``idle=halt`` case, the architecture support code will use the ``HLT``
  596. instruction of the CPUs (which, as a rule, suspends the execution of the program
  597. and causes the hardware to attempt to enter the shallowest available idle state)
  598. for this purpose, and if ``idle=poll`` is used, idle CPUs will execute a
  599. more or less "lightweight" sequence of instructions in a tight loop. [Note
  600. that using ``idle=poll`` is somewhat drastic in many cases, as preventing idle
  601. CPUs from saving almost any energy at all may not be the only effect of it.
  602. For example, on Intel hardware it effectively prevents CPUs from using
  603. P-states (see |cpufreq|) that require any number of CPUs in a package to be
  604. idle, so it very well may hurt single-thread computations performance as well as
  605. energy-efficiency. Thus using it for performance reasons may not be a good idea
  606. at all.]
  607. The ``idle=nomwait`` option disables the ``intel_idle`` driver and causes
  608. ``acpi_idle`` to be used (as long as all of the information needed by it is
  609. there in the system's ACPI tables), but it is not allowed to use the
  610. ``MWAIT`` instruction of the CPUs to ask the hardware to enter idle states.
  611. In addition to the architecture-level kernel command line options affecting CPU
  612. idle time management, there are parameters affecting individual ``CPUIdle``
  613. drivers that can be passed to them via the kernel command line. Specifically,
  614. the ``intel_idle.max_cstate=<n>`` and ``processor.max_cstate=<n>`` parameters,
  615. where ``<n>`` is an idle state index also used in the name of the given
  616. state's directory in ``sysfs`` (see
  617. `Representation of Idle States <idle-states-representation_>`_), causes the
  618. ``intel_idle`` and ``acpi_idle`` drivers, respectively, to discard all of the
  619. idle states deeper than idle state ``<n>``. In that case, they will never ask
  620. for any of those idle states or expose them to the governor. [The behavior of
  621. the two drivers is different for ``<n>`` equal to ``0``. Adding
  622. ``intel_idle.max_cstate=0`` to the kernel command line disables the
  623. ``intel_idle`` driver and allows ``acpi_idle`` to be used, whereas
  624. ``processor.max_cstate=0`` is equivalent to ``processor.max_cstate=1``.
  625. Also, the ``acpi_idle`` driver is part of the ``processor`` kernel module that
  626. can be loaded separately and ``max_cstate=<n>`` can be passed to it as a module
  627. parameter when it is loaded.]