ux500_msp_dai.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) ST-Ericsson SA 2012
  4. *
  5. * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
  6. * Roger Nilsson <roger.xr.nilsson@stericsson.com>
  7. * for ST-Ericsson.
  8. *
  9. * License terms:
  10. */
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/bitops.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/clk.h>
  16. #include <linux/of.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <linux/mfd/dbx500-prcmu.h>
  19. #include <linux/platform_data/asoc-ux500-msp.h>
  20. #include <sound/soc.h>
  21. #include <sound/soc-dai.h>
  22. #include <sound/dmaengine_pcm.h>
  23. #include "ux500_msp_i2s.h"
  24. #include "ux500_msp_dai.h"
  25. #include "ux500_pcm.h"
  26. static int setup_pcm_multichan(struct snd_soc_dai *dai,
  27. struct ux500_msp_config *msp_config)
  28. {
  29. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  30. struct msp_multichannel_config *multi =
  31. &msp_config->multichannel_config;
  32. if (drvdata->slots > 1) {
  33. msp_config->multichannel_configured = 1;
  34. multi->tx_multichannel_enable = true;
  35. multi->rx_multichannel_enable = true;
  36. multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
  37. multi->tx_channel_0_enable = drvdata->tx_mask;
  38. multi->tx_channel_1_enable = 0;
  39. multi->tx_channel_2_enable = 0;
  40. multi->tx_channel_3_enable = 0;
  41. multi->rx_channel_0_enable = drvdata->rx_mask;
  42. multi->rx_channel_1_enable = 0;
  43. multi->rx_channel_2_enable = 0;
  44. multi->rx_channel_3_enable = 0;
  45. dev_dbg(dai->dev,
  46. "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
  47. __func__, drvdata->slots, multi->tx_channel_0_enable,
  48. multi->rx_channel_0_enable);
  49. }
  50. return 0;
  51. }
  52. static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
  53. struct msp_protdesc *prot_desc)
  54. {
  55. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  56. switch (drvdata->slots) {
  57. case 1:
  58. switch (rate) {
  59. case 8000:
  60. prot_desc->frame_period =
  61. FRAME_PER_SINGLE_SLOT_8_KHZ;
  62. break;
  63. case 16000:
  64. prot_desc->frame_period =
  65. FRAME_PER_SINGLE_SLOT_16_KHZ;
  66. break;
  67. case 44100:
  68. prot_desc->frame_period =
  69. FRAME_PER_SINGLE_SLOT_44_1_KHZ;
  70. break;
  71. case 48000:
  72. prot_desc->frame_period =
  73. FRAME_PER_SINGLE_SLOT_48_KHZ;
  74. break;
  75. default:
  76. dev_err(dai->dev,
  77. "%s: Error: Unsupported sample-rate (freq = %d)!\n",
  78. __func__, rate);
  79. return -EINVAL;
  80. }
  81. break;
  82. case 2:
  83. prot_desc->frame_period = FRAME_PER_2_SLOTS;
  84. break;
  85. case 8:
  86. prot_desc->frame_period = FRAME_PER_8_SLOTS;
  87. break;
  88. case 16:
  89. prot_desc->frame_period = FRAME_PER_16_SLOTS;
  90. break;
  91. default:
  92. dev_err(dai->dev,
  93. "%s: Error: Unsupported slot-count (slots = %d)!\n",
  94. __func__, drvdata->slots);
  95. return -EINVAL;
  96. }
  97. prot_desc->clocks_per_frame =
  98. prot_desc->frame_period+1;
  99. dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
  100. __func__,
  101. prot_desc->clocks_per_frame);
  102. return 0;
  103. }
  104. static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
  105. struct msp_protdesc *prot_desc)
  106. {
  107. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  108. u32 frame_length = MSP_FRAME_LEN_1;
  109. prot_desc->frame_width = 0;
  110. switch (drvdata->slots) {
  111. case 1:
  112. frame_length = MSP_FRAME_LEN_1;
  113. break;
  114. case 2:
  115. frame_length = MSP_FRAME_LEN_2;
  116. break;
  117. case 8:
  118. frame_length = MSP_FRAME_LEN_8;
  119. break;
  120. case 16:
  121. frame_length = MSP_FRAME_LEN_16;
  122. break;
  123. default:
  124. dev_err(dai->dev,
  125. "%s: Error: Unsupported slot-count (slots = %d)!\n",
  126. __func__, drvdata->slots);
  127. return -EINVAL;
  128. }
  129. prot_desc->tx_frame_len_1 = frame_length;
  130. prot_desc->rx_frame_len_1 = frame_length;
  131. prot_desc->tx_frame_len_2 = frame_length;
  132. prot_desc->rx_frame_len_2 = frame_length;
  133. prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
  134. prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
  135. prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
  136. prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
  137. return setup_frameper(dai, rate, prot_desc);
  138. }
  139. static int setup_clocking(struct snd_soc_dai *dai,
  140. unsigned int fmt,
  141. struct ux500_msp_config *msp_config)
  142. {
  143. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  144. case SND_SOC_DAIFMT_NB_NF:
  145. break;
  146. case SND_SOC_DAIFMT_NB_IF:
  147. msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
  148. msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
  149. break;
  150. default:
  151. dev_err(dai->dev,
  152. "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
  153. __func__, fmt);
  154. return -EINVAL;
  155. }
  156. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  157. case SND_SOC_DAIFMT_CBM_CFM:
  158. dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
  159. msp_config->iodelay = 0x20;
  160. msp_config->rx_fsync_sel = 0;
  161. msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
  162. msp_config->tx_clk_sel = 0;
  163. msp_config->rx_clk_sel = 0;
  164. msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
  165. break;
  166. case SND_SOC_DAIFMT_CBS_CFS:
  167. dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
  168. msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
  169. msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
  170. msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
  171. msp_config->rx_fsync_sel = RX_SYNC_SRG;
  172. msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
  173. break;
  174. default:
  175. dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
  176. __func__, fmt);
  177. return -EINVAL;
  178. }
  179. return 0;
  180. }
  181. static int setup_pcm_protdesc(struct snd_soc_dai *dai,
  182. unsigned int fmt,
  183. struct msp_protdesc *prot_desc)
  184. {
  185. prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
  186. prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
  187. prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
  188. prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
  189. prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
  190. prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
  191. prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
  192. prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
  193. if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
  194. dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
  195. prot_desc->rx_clk_pol = MSP_RISING_EDGE;
  196. prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
  197. prot_desc->rx_data_delay = MSP_DELAY_1;
  198. prot_desc->tx_data_delay = MSP_DELAY_1;
  199. } else {
  200. dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
  201. prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
  202. prot_desc->tx_clk_pol = MSP_RISING_EDGE;
  203. prot_desc->rx_data_delay = MSP_DELAY_0;
  204. prot_desc->tx_data_delay = MSP_DELAY_0;
  205. }
  206. prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
  207. prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
  208. prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
  209. prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
  210. prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
  211. return 0;
  212. }
  213. static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
  214. {
  215. prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
  216. prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
  217. prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
  218. prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
  219. prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
  220. prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
  221. prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
  222. prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
  223. prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
  224. prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
  225. prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
  226. prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
  227. prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
  228. prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
  229. prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
  230. prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
  231. prot_desc->rx_clk_pol = MSP_RISING_EDGE;
  232. prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
  233. prot_desc->rx_data_delay = MSP_DELAY_0;
  234. prot_desc->tx_data_delay = MSP_DELAY_0;
  235. prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
  236. prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
  237. prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
  238. prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
  239. prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
  240. return 0;
  241. }
  242. static int setup_msp_config(struct snd_pcm_substream *substream,
  243. struct snd_soc_dai *dai,
  244. struct ux500_msp_config *msp_config)
  245. {
  246. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  247. struct msp_protdesc *prot_desc = &msp_config->protdesc;
  248. struct snd_pcm_runtime *runtime = substream->runtime;
  249. unsigned int fmt = drvdata->fmt;
  250. int ret;
  251. memset(msp_config, 0, sizeof(*msp_config));
  252. msp_config->f_inputclk = drvdata->master_clk;
  253. msp_config->tx_fifo_config = TX_FIFO_ENABLE;
  254. msp_config->rx_fifo_config = RX_FIFO_ENABLE;
  255. msp_config->def_elem_len = 1;
  256. msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  257. MSP_DIR_TX : MSP_DIR_RX;
  258. msp_config->data_size = MSP_DATA_BITS_32;
  259. msp_config->frame_freq = runtime->rate;
  260. dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
  261. __func__, msp_config->f_inputclk, msp_config->frame_freq);
  262. /* To avoid division by zero */
  263. prot_desc->clocks_per_frame = 1;
  264. dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
  265. runtime->rate, runtime->channels);
  266. switch (fmt &
  267. (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_MASTER_MASK)) {
  268. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
  269. dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
  270. msp_config->default_protdesc = 1;
  271. msp_config->protocol = MSP_I2S_PROTOCOL;
  272. break;
  273. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
  274. dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
  275. msp_config->data_size = MSP_DATA_BITS_16;
  276. msp_config->protocol = MSP_I2S_PROTOCOL;
  277. ret = setup_i2s_protdesc(prot_desc);
  278. if (ret < 0)
  279. return ret;
  280. break;
  281. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
  282. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
  283. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS:
  284. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM:
  285. dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
  286. msp_config->data_size = MSP_DATA_BITS_16;
  287. msp_config->protocol = MSP_PCM_PROTOCOL;
  288. ret = setup_pcm_protdesc(dai, fmt, prot_desc);
  289. if (ret < 0)
  290. return ret;
  291. ret = setup_pcm_multichan(dai, msp_config);
  292. if (ret < 0)
  293. return ret;
  294. ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
  295. if (ret < 0)
  296. return ret;
  297. break;
  298. default:
  299. dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
  300. __func__, fmt);
  301. return -EINVAL;
  302. }
  303. return setup_clocking(dai, fmt, msp_config);
  304. }
  305. static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
  306. struct snd_soc_dai *dai)
  307. {
  308. int ret = 0;
  309. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  310. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  311. snd_pcm_stream_str(substream));
  312. /* Enable regulator */
  313. ret = regulator_enable(drvdata->reg_vape);
  314. if (ret != 0) {
  315. dev_err(drvdata->msp->dev,
  316. "%s: Failed to enable regulator!\n", __func__);
  317. return ret;
  318. }
  319. /* Prepare and enable clocks */
  320. dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
  321. ret = clk_prepare_enable(drvdata->pclk);
  322. if (ret) {
  323. dev_err(drvdata->msp->dev,
  324. "%s: Failed to prepare/enable pclk!\n", __func__);
  325. goto err_pclk;
  326. }
  327. ret = clk_prepare_enable(drvdata->clk);
  328. if (ret) {
  329. dev_err(drvdata->msp->dev,
  330. "%s: Failed to prepare/enable clk!\n", __func__);
  331. goto err_clk;
  332. }
  333. return ret;
  334. err_clk:
  335. clk_disable_unprepare(drvdata->pclk);
  336. err_pclk:
  337. regulator_disable(drvdata->reg_vape);
  338. return ret;
  339. }
  340. static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
  341. struct snd_soc_dai *dai)
  342. {
  343. int ret;
  344. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  345. bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
  346. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  347. snd_pcm_stream_str(substream));
  348. if (drvdata->vape_opp_constraint == 1) {
  349. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  350. "ux500_msp_i2s", 50);
  351. drvdata->vape_opp_constraint = 0;
  352. }
  353. if (ux500_msp_i2s_close(drvdata->msp,
  354. is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
  355. dev_err(dai->dev,
  356. "%s: Error: MSP %d (%s): Unable to close i2s.\n",
  357. __func__, dai->id, snd_pcm_stream_str(substream));
  358. }
  359. /* Disable and unprepare clocks */
  360. clk_disable_unprepare(drvdata->clk);
  361. clk_disable_unprepare(drvdata->pclk);
  362. /* Disable regulator */
  363. ret = regulator_disable(drvdata->reg_vape);
  364. if (ret < 0)
  365. dev_err(dai->dev,
  366. "%s: ERROR: Failed to disable regulator (%d)!\n",
  367. __func__, ret);
  368. }
  369. static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
  370. struct snd_soc_dai *dai)
  371. {
  372. int ret = 0;
  373. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  374. struct snd_pcm_runtime *runtime = substream->runtime;
  375. struct ux500_msp_config msp_config;
  376. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
  377. dai->id, snd_pcm_stream_str(substream), runtime->rate);
  378. setup_msp_config(substream, dai, &msp_config);
  379. ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
  380. if (ret < 0) {
  381. dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
  382. __func__, ret);
  383. return ret;
  384. }
  385. /* Set OPP-level */
  386. if ((drvdata->fmt & SND_SOC_DAIFMT_MASTER_MASK) &&
  387. (drvdata->msp->f_bitclk > 19200000)) {
  388. /* If the bit-clock is higher than 19.2MHz, Vape should be
  389. * run in 100% OPP. Only when bit-clock is used (MSP master)
  390. */
  391. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  392. "ux500-msp-i2s", 100);
  393. drvdata->vape_opp_constraint = 1;
  394. } else {
  395. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  396. "ux500-msp-i2s", 50);
  397. drvdata->vape_opp_constraint = 0;
  398. }
  399. return ret;
  400. }
  401. static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
  402. struct snd_pcm_hw_params *params,
  403. struct snd_soc_dai *dai)
  404. {
  405. unsigned int mask, slots_active;
  406. struct snd_pcm_runtime *runtime = substream->runtime;
  407. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  408. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
  409. __func__, dai->id, snd_pcm_stream_str(substream));
  410. switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  411. case SND_SOC_DAIFMT_I2S:
  412. snd_pcm_hw_constraint_minmax(runtime,
  413. SNDRV_PCM_HW_PARAM_CHANNELS,
  414. 1, 2);
  415. break;
  416. case SND_SOC_DAIFMT_DSP_B:
  417. case SND_SOC_DAIFMT_DSP_A:
  418. mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  419. drvdata->tx_mask :
  420. drvdata->rx_mask;
  421. slots_active = hweight32(mask);
  422. dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
  423. snd_pcm_hw_constraint_single(runtime,
  424. SNDRV_PCM_HW_PARAM_CHANNELS,
  425. slots_active);
  426. break;
  427. default:
  428. dev_err(dai->dev,
  429. "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
  430. __func__, drvdata->fmt);
  431. return -EINVAL;
  432. }
  433. return 0;
  434. }
  435. static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
  436. unsigned int fmt)
  437. {
  438. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  439. dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
  440. switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
  441. SND_SOC_DAIFMT_MASTER_MASK)) {
  442. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
  443. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
  444. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS:
  445. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM:
  446. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
  447. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
  448. break;
  449. default:
  450. dev_err(dai->dev,
  451. "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
  452. __func__, drvdata->fmt);
  453. return -EINVAL;
  454. }
  455. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  456. case SND_SOC_DAIFMT_NB_NF:
  457. case SND_SOC_DAIFMT_NB_IF:
  458. case SND_SOC_DAIFMT_IB_IF:
  459. break;
  460. default:
  461. dev_err(dai->dev,
  462. "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
  463. __func__, drvdata->fmt);
  464. return -EINVAL;
  465. }
  466. drvdata->fmt = fmt;
  467. return 0;
  468. }
  469. static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
  470. unsigned int tx_mask,
  471. unsigned int rx_mask,
  472. int slots, int slot_width)
  473. {
  474. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  475. unsigned int cap;
  476. switch (slots) {
  477. case 1:
  478. cap = 0x01;
  479. break;
  480. case 2:
  481. cap = 0x03;
  482. break;
  483. case 8:
  484. cap = 0xFF;
  485. break;
  486. case 16:
  487. cap = 0xFFFF;
  488. break;
  489. default:
  490. dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
  491. __func__, slots);
  492. return -EINVAL;
  493. }
  494. drvdata->slots = slots;
  495. if (!(slot_width == 16)) {
  496. dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
  497. __func__, slot_width);
  498. return -EINVAL;
  499. }
  500. drvdata->slot_width = slot_width;
  501. drvdata->tx_mask = tx_mask & cap;
  502. drvdata->rx_mask = rx_mask & cap;
  503. return 0;
  504. }
  505. static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
  506. int clk_id, unsigned int freq, int dir)
  507. {
  508. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  509. dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
  510. __func__, dai->id, clk_id, freq);
  511. switch (clk_id) {
  512. case UX500_MSP_MASTER_CLOCK:
  513. drvdata->master_clk = freq;
  514. break;
  515. default:
  516. dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
  517. __func__, dai->id, clk_id);
  518. return -EINVAL;
  519. }
  520. return 0;
  521. }
  522. static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
  523. int cmd, struct snd_soc_dai *dai)
  524. {
  525. int ret = 0;
  526. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  527. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
  528. __func__, dai->id, snd_pcm_stream_str(substream),
  529. (int)drvdata->msp->id, cmd);
  530. ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
  531. return ret;
  532. }
  533. static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
  534. {
  535. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  536. struct snd_dmaengine_dai_dma_data *playback_dma_data;
  537. struct snd_dmaengine_dai_dma_data *capture_dma_data;
  538. playback_dma_data = devm_kzalloc(dai->dev,
  539. sizeof(*playback_dma_data),
  540. GFP_KERNEL);
  541. if (!playback_dma_data)
  542. return -ENOMEM;
  543. capture_dma_data = devm_kzalloc(dai->dev,
  544. sizeof(*capture_dma_data),
  545. GFP_KERNEL);
  546. if (!capture_dma_data)
  547. return -ENOMEM;
  548. playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
  549. capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
  550. playback_dma_data->maxburst = 4;
  551. capture_dma_data->maxburst = 4;
  552. snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
  553. return 0;
  554. }
  555. static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
  556. {
  557. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  558. struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
  559. int ret;
  560. if (!pdata) {
  561. ret = ux500_msp_dai_of_probe(dai);
  562. return ret;
  563. }
  564. drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
  565. drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
  566. snd_soc_dai_init_dma_data(dai,
  567. &drvdata->msp->playback_dma_data,
  568. &drvdata->msp->capture_dma_data);
  569. return 0;
  570. }
  571. static const struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
  572. {
  573. .set_sysclk = ux500_msp_dai_set_dai_sysclk,
  574. .set_fmt = ux500_msp_dai_set_dai_fmt,
  575. .set_tdm_slot = ux500_msp_dai_set_tdm_slot,
  576. .startup = ux500_msp_dai_startup,
  577. .shutdown = ux500_msp_dai_shutdown,
  578. .prepare = ux500_msp_dai_prepare,
  579. .trigger = ux500_msp_dai_trigger,
  580. .hw_params = ux500_msp_dai_hw_params,
  581. }
  582. };
  583. static struct snd_soc_dai_driver ux500_msp_dai_drv = {
  584. .probe = ux500_msp_dai_probe,
  585. .playback.channels_min = UX500_MSP_MIN_CHANNELS,
  586. .playback.channels_max = UX500_MSP_MAX_CHANNELS,
  587. .playback.rates = UX500_I2S_RATES,
  588. .playback.formats = UX500_I2S_FORMATS,
  589. .capture.channels_min = UX500_MSP_MIN_CHANNELS,
  590. .capture.channels_max = UX500_MSP_MAX_CHANNELS,
  591. .capture.rates = UX500_I2S_RATES,
  592. .capture.formats = UX500_I2S_FORMATS,
  593. .ops = ux500_msp_dai_ops,
  594. };
  595. static const struct snd_soc_component_driver ux500_msp_component = {
  596. .name = "ux500-msp",
  597. };
  598. static int ux500_msp_drv_probe(struct platform_device *pdev)
  599. {
  600. struct ux500_msp_i2s_drvdata *drvdata;
  601. struct msp_i2s_platform_data *pdata = pdev->dev.platform_data;
  602. struct device_node *np = pdev->dev.of_node;
  603. int ret = 0;
  604. if (!pdata && !np) {
  605. dev_err(&pdev->dev, "No platform data or Device Tree found\n");
  606. return -ENODEV;
  607. }
  608. drvdata = devm_kzalloc(&pdev->dev,
  609. sizeof(struct ux500_msp_i2s_drvdata),
  610. GFP_KERNEL);
  611. if (!drvdata)
  612. return -ENOMEM;
  613. drvdata->fmt = 0;
  614. drvdata->slots = 1;
  615. drvdata->tx_mask = 0x01;
  616. drvdata->rx_mask = 0x01;
  617. drvdata->slot_width = 16;
  618. drvdata->master_clk = MSP_INPUT_FREQ_APB;
  619. drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
  620. if (IS_ERR(drvdata->reg_vape)) {
  621. ret = (int)PTR_ERR(drvdata->reg_vape);
  622. dev_err(&pdev->dev,
  623. "%s: ERROR: Failed to get Vape supply (%d)!\n",
  624. __func__, ret);
  625. return ret;
  626. }
  627. prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
  628. drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
  629. if (IS_ERR(drvdata->pclk)) {
  630. ret = (int)PTR_ERR(drvdata->pclk);
  631. dev_err(&pdev->dev,
  632. "%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
  633. __func__, ret);
  634. return ret;
  635. }
  636. drvdata->clk = devm_clk_get(&pdev->dev, NULL);
  637. if (IS_ERR(drvdata->clk)) {
  638. ret = (int)PTR_ERR(drvdata->clk);
  639. dev_err(&pdev->dev,
  640. "%s: ERROR: devm_clk_get failed (%d)!\n",
  641. __func__, ret);
  642. return ret;
  643. }
  644. ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp,
  645. pdev->dev.platform_data);
  646. if (!drvdata->msp) {
  647. dev_err(&pdev->dev,
  648. "%s: ERROR: Failed to init MSP-struct (%d)!",
  649. __func__, ret);
  650. return ret;
  651. }
  652. dev_set_drvdata(&pdev->dev, drvdata);
  653. ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
  654. &ux500_msp_dai_drv, 1);
  655. if (ret < 0) {
  656. dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
  657. __func__, drvdata->msp->id);
  658. return ret;
  659. }
  660. ret = ux500_pcm_register_platform(pdev);
  661. if (ret < 0) {
  662. dev_err(&pdev->dev,
  663. "Error: %s: Failed to register PCM platform device!\n",
  664. __func__);
  665. goto err_reg_plat;
  666. }
  667. return 0;
  668. err_reg_plat:
  669. snd_soc_unregister_component(&pdev->dev);
  670. return ret;
  671. }
  672. static int ux500_msp_drv_remove(struct platform_device *pdev)
  673. {
  674. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
  675. ux500_pcm_unregister_platform(pdev);
  676. snd_soc_unregister_component(&pdev->dev);
  677. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
  678. ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
  679. return 0;
  680. }
  681. static const struct of_device_id ux500_msp_i2s_match[] = {
  682. { .compatible = "stericsson,ux500-msp-i2s", },
  683. {},
  684. };
  685. MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
  686. static struct platform_driver msp_i2s_driver = {
  687. .driver = {
  688. .name = "ux500-msp-i2s",
  689. .of_match_table = ux500_msp_i2s_match,
  690. },
  691. .probe = ux500_msp_drv_probe,
  692. .remove = ux500_msp_drv_remove,
  693. };
  694. module_platform_driver(msp_i2s_driver);
  695. MODULE_LICENSE("GPL v2");