omap-mcbsp-st.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * McBSP Sidetone support
  4. *
  5. * Copyright (C) 2004 Nokia Corporation
  6. * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
  7. *
  8. * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
  9. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/err.h>
  17. #include <linux/clk.h>
  18. #include <linux/delay.h>
  19. #include <linux/io.h>
  20. #include <linux/slab.h>
  21. #include <linux/pm_runtime.h>
  22. #include "omap-mcbsp.h"
  23. #include "omap-mcbsp-priv.h"
  24. /* OMAP3 sidetone control registers */
  25. #define OMAP_ST_REG_REV 0x00
  26. #define OMAP_ST_REG_SYSCONFIG 0x10
  27. #define OMAP_ST_REG_IRQSTATUS 0x18
  28. #define OMAP_ST_REG_IRQENABLE 0x1C
  29. #define OMAP_ST_REG_SGAINCR 0x24
  30. #define OMAP_ST_REG_SFIRCR 0x28
  31. #define OMAP_ST_REG_SSELCR 0x2C
  32. /********************** McBSP SSELCR bit definitions ***********************/
  33. #define SIDETONEEN BIT(10)
  34. /********************** McBSP Sidetone SYSCONFIG bit definitions ***********/
  35. #define ST_AUTOIDLE BIT(0)
  36. /********************** McBSP Sidetone SGAINCR bit definitions *************/
  37. #define ST_CH0GAIN(value) ((value) & 0xffff) /* Bits 0:15 */
  38. #define ST_CH1GAIN(value) (((value) & 0xffff) << 16) /* Bits 16:31 */
  39. /********************** McBSP Sidetone SFIRCR bit definitions **************/
  40. #define ST_FIRCOEFF(value) ((value) & 0xffff) /* Bits 0:15 */
  41. /********************** McBSP Sidetone SSELCR bit definitions **************/
  42. #define ST_SIDETONEEN BIT(0)
  43. #define ST_COEFFWREN BIT(1)
  44. #define ST_COEFFWRDONE BIT(2)
  45. struct omap_mcbsp_st_data {
  46. void __iomem *io_base_st;
  47. struct clk *mcbsp_iclk;
  48. bool running;
  49. bool enabled;
  50. s16 taps[128]; /* Sidetone filter coefficients */
  51. int nr_taps; /* Number of filter coefficients in use */
  52. s16 ch0gain;
  53. s16 ch1gain;
  54. };
  55. static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  56. {
  57. writel_relaxed(val, mcbsp->st_data->io_base_st + reg);
  58. }
  59. static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
  60. {
  61. return readl_relaxed(mcbsp->st_data->io_base_st + reg);
  62. }
  63. #define MCBSP_ST_READ(mcbsp, reg) omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
  64. #define MCBSP_ST_WRITE(mcbsp, reg, val) \
  65. omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
  66. static void omap_mcbsp_st_on(struct omap_mcbsp *mcbsp)
  67. {
  68. unsigned int w;
  69. if (mcbsp->pdata->force_ick_on)
  70. mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, true);
  71. /* Disable Sidetone clock auto-gating for normal operation */
  72. w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
  73. MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
  74. /* Enable McBSP Sidetone */
  75. w = MCBSP_READ(mcbsp, SSELCR);
  76. MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
  77. /* Enable Sidetone from Sidetone Core */
  78. w = MCBSP_ST_READ(mcbsp, SSELCR);
  79. MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
  80. }
  81. static void omap_mcbsp_st_off(struct omap_mcbsp *mcbsp)
  82. {
  83. unsigned int w;
  84. w = MCBSP_ST_READ(mcbsp, SSELCR);
  85. MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
  86. w = MCBSP_READ(mcbsp, SSELCR);
  87. MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
  88. /* Enable Sidetone clock auto-gating to reduce power consumption */
  89. w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
  90. MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE);
  91. if (mcbsp->pdata->force_ick_on)
  92. mcbsp->pdata->force_ick_on(mcbsp->st_data->mcbsp_iclk, false);
  93. }
  94. static void omap_mcbsp_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
  95. {
  96. u16 val, i;
  97. val = MCBSP_ST_READ(mcbsp, SSELCR);
  98. if (val & ST_COEFFWREN)
  99. MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
  100. MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
  101. for (i = 0; i < 128; i++)
  102. MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
  103. i = 0;
  104. val = MCBSP_ST_READ(mcbsp, SSELCR);
  105. while (!(val & ST_COEFFWRDONE) && (++i < 1000))
  106. val = MCBSP_ST_READ(mcbsp, SSELCR);
  107. MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
  108. if (i == 1000)
  109. dev_err(mcbsp->dev, "McBSP FIR load error!\n");
  110. }
  111. static void omap_mcbsp_st_chgain(struct omap_mcbsp *mcbsp)
  112. {
  113. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  114. MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) |
  115. ST_CH1GAIN(st_data->ch1gain));
  116. }
  117. static int omap_mcbsp_st_set_chgain(struct omap_mcbsp *mcbsp, int channel,
  118. s16 chgain)
  119. {
  120. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  121. int ret = 0;
  122. if (!st_data)
  123. return -ENOENT;
  124. spin_lock_irq(&mcbsp->lock);
  125. if (channel == 0)
  126. st_data->ch0gain = chgain;
  127. else if (channel == 1)
  128. st_data->ch1gain = chgain;
  129. else
  130. ret = -EINVAL;
  131. if (st_data->enabled)
  132. omap_mcbsp_st_chgain(mcbsp);
  133. spin_unlock_irq(&mcbsp->lock);
  134. return ret;
  135. }
  136. static int omap_mcbsp_st_get_chgain(struct omap_mcbsp *mcbsp, int channel,
  137. s16 *chgain)
  138. {
  139. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  140. int ret = 0;
  141. if (!st_data)
  142. return -ENOENT;
  143. spin_lock_irq(&mcbsp->lock);
  144. if (channel == 0)
  145. *chgain = st_data->ch0gain;
  146. else if (channel == 1)
  147. *chgain = st_data->ch1gain;
  148. else
  149. ret = -EINVAL;
  150. spin_unlock_irq(&mcbsp->lock);
  151. return ret;
  152. }
  153. static int omap_mcbsp_st_enable(struct omap_mcbsp *mcbsp)
  154. {
  155. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  156. if (!st_data)
  157. return -ENODEV;
  158. spin_lock_irq(&mcbsp->lock);
  159. st_data->enabled = 1;
  160. omap_mcbsp_st_start(mcbsp);
  161. spin_unlock_irq(&mcbsp->lock);
  162. return 0;
  163. }
  164. static int omap_mcbsp_st_disable(struct omap_mcbsp *mcbsp)
  165. {
  166. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  167. int ret = 0;
  168. if (!st_data)
  169. return -ENODEV;
  170. spin_lock_irq(&mcbsp->lock);
  171. omap_mcbsp_st_stop(mcbsp);
  172. st_data->enabled = 0;
  173. spin_unlock_irq(&mcbsp->lock);
  174. return ret;
  175. }
  176. static int omap_mcbsp_st_is_enabled(struct omap_mcbsp *mcbsp)
  177. {
  178. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  179. if (!st_data)
  180. return -ENODEV;
  181. return st_data->enabled;
  182. }
  183. static ssize_t st_taps_show(struct device *dev,
  184. struct device_attribute *attr, char *buf)
  185. {
  186. struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
  187. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  188. ssize_t status = 0;
  189. int i;
  190. spin_lock_irq(&mcbsp->lock);
  191. for (i = 0; i < st_data->nr_taps; i++)
  192. status += sprintf(&buf[status], (i ? ", %d" : "%d"),
  193. st_data->taps[i]);
  194. if (i)
  195. status += sprintf(&buf[status], "\n");
  196. spin_unlock_irq(&mcbsp->lock);
  197. return status;
  198. }
  199. static ssize_t st_taps_store(struct device *dev,
  200. struct device_attribute *attr,
  201. const char *buf, size_t size)
  202. {
  203. struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
  204. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  205. int val, tmp, status, i = 0;
  206. spin_lock_irq(&mcbsp->lock);
  207. memset(st_data->taps, 0, sizeof(st_data->taps));
  208. st_data->nr_taps = 0;
  209. do {
  210. status = sscanf(buf, "%d%n", &val, &tmp);
  211. if (status < 0 || status == 0) {
  212. size = -EINVAL;
  213. goto out;
  214. }
  215. if (val < -32768 || val > 32767) {
  216. size = -EINVAL;
  217. goto out;
  218. }
  219. st_data->taps[i++] = val;
  220. buf += tmp;
  221. if (*buf != ',')
  222. break;
  223. buf++;
  224. } while (1);
  225. st_data->nr_taps = i;
  226. out:
  227. spin_unlock_irq(&mcbsp->lock);
  228. return size;
  229. }
  230. static DEVICE_ATTR_RW(st_taps);
  231. static const struct attribute *sidetone_attrs[] = {
  232. &dev_attr_st_taps.attr,
  233. NULL,
  234. };
  235. static const struct attribute_group sidetone_attr_group = {
  236. .attrs = (struct attribute **)sidetone_attrs,
  237. };
  238. int omap_mcbsp_st_start(struct omap_mcbsp *mcbsp)
  239. {
  240. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  241. if (st_data->enabled && !st_data->running) {
  242. omap_mcbsp_st_fir_write(mcbsp, st_data->taps);
  243. omap_mcbsp_st_chgain(mcbsp);
  244. if (!mcbsp->free) {
  245. omap_mcbsp_st_on(mcbsp);
  246. st_data->running = 1;
  247. }
  248. }
  249. return 0;
  250. }
  251. int omap_mcbsp_st_stop(struct omap_mcbsp *mcbsp)
  252. {
  253. struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
  254. if (st_data->running) {
  255. if (!mcbsp->free) {
  256. omap_mcbsp_st_off(mcbsp);
  257. st_data->running = 0;
  258. }
  259. }
  260. return 0;
  261. }
  262. int omap_mcbsp_st_init(struct platform_device *pdev)
  263. {
  264. struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
  265. struct omap_mcbsp_st_data *st_data;
  266. struct resource *res;
  267. int ret;
  268. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
  269. if (!res)
  270. return 0;
  271. st_data = devm_kzalloc(mcbsp->dev, sizeof(*mcbsp->st_data), GFP_KERNEL);
  272. if (!st_data)
  273. return -ENOMEM;
  274. st_data->mcbsp_iclk = clk_get(mcbsp->dev, "ick");
  275. if (IS_ERR(st_data->mcbsp_iclk)) {
  276. dev_warn(mcbsp->dev,
  277. "Failed to get ick, sidetone might be broken\n");
  278. st_data->mcbsp_iclk = NULL;
  279. }
  280. st_data->io_base_st = devm_ioremap(mcbsp->dev, res->start,
  281. resource_size(res));
  282. if (!st_data->io_base_st)
  283. return -ENOMEM;
  284. ret = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group);
  285. if (ret)
  286. return ret;
  287. mcbsp->st_data = st_data;
  288. return 0;
  289. }
  290. void omap_mcbsp_st_cleanup(struct platform_device *pdev)
  291. {
  292. struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
  293. if (mcbsp->st_data) {
  294. sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
  295. clk_put(mcbsp->st_data->mcbsp_iclk);
  296. }
  297. }
  298. static int omap_mcbsp_st_info_volsw(struct snd_kcontrol *kcontrol,
  299. struct snd_ctl_elem_info *uinfo)
  300. {
  301. struct soc_mixer_control *mc =
  302. (struct soc_mixer_control *)kcontrol->private_value;
  303. int max = mc->max;
  304. int min = mc->min;
  305. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  306. uinfo->count = 1;
  307. uinfo->value.integer.min = min;
  308. uinfo->value.integer.max = max;
  309. return 0;
  310. }
  311. #define OMAP_MCBSP_ST_CHANNEL_VOLUME(channel) \
  312. static int \
  313. omap_mcbsp_set_st_ch##channel##_volume(struct snd_kcontrol *kc, \
  314. struct snd_ctl_elem_value *uc) \
  315. { \
  316. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \
  317. struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \
  318. struct soc_mixer_control *mc = \
  319. (struct soc_mixer_control *)kc->private_value; \
  320. int max = mc->max; \
  321. int min = mc->min; \
  322. int val = uc->value.integer.value[0]; \
  323. \
  324. if (val < min || val > max) \
  325. return -EINVAL; \
  326. \
  327. /* OMAP McBSP implementation uses index values 0..4 */ \
  328. return omap_mcbsp_st_set_chgain(mcbsp, channel, val); \
  329. } \
  330. \
  331. static int \
  332. omap_mcbsp_get_st_ch##channel##_volume(struct snd_kcontrol *kc, \
  333. struct snd_ctl_elem_value *uc) \
  334. { \
  335. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kc); \
  336. struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai); \
  337. s16 chgain; \
  338. \
  339. if (omap_mcbsp_st_get_chgain(mcbsp, channel, &chgain)) \
  340. return -EAGAIN; \
  341. \
  342. uc->value.integer.value[0] = chgain; \
  343. return 0; \
  344. }
  345. OMAP_MCBSP_ST_CHANNEL_VOLUME(0)
  346. OMAP_MCBSP_ST_CHANNEL_VOLUME(1)
  347. static int omap_mcbsp_st_put_mode(struct snd_kcontrol *kcontrol,
  348. struct snd_ctl_elem_value *ucontrol)
  349. {
  350. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  351. struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
  352. u8 value = ucontrol->value.integer.value[0];
  353. if (value == omap_mcbsp_st_is_enabled(mcbsp))
  354. return 0;
  355. if (value)
  356. omap_mcbsp_st_enable(mcbsp);
  357. else
  358. omap_mcbsp_st_disable(mcbsp);
  359. return 1;
  360. }
  361. static int omap_mcbsp_st_get_mode(struct snd_kcontrol *kcontrol,
  362. struct snd_ctl_elem_value *ucontrol)
  363. {
  364. struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
  365. struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
  366. ucontrol->value.integer.value[0] = omap_mcbsp_st_is_enabled(mcbsp);
  367. return 0;
  368. }
  369. #define OMAP_MCBSP_SOC_SINGLE_S16_EXT(xname, xmin, xmax, \
  370. xhandler_get, xhandler_put) \
  371. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  372. .info = omap_mcbsp_st_info_volsw, \
  373. .get = xhandler_get, .put = xhandler_put, \
  374. .private_value = (unsigned long)&(struct soc_mixer_control) \
  375. {.min = xmin, .max = xmax} }
  376. #define OMAP_MCBSP_ST_CONTROLS(port) \
  377. static const struct snd_kcontrol_new omap_mcbsp##port##_st_controls[] = { \
  378. SOC_SINGLE_EXT("McBSP" #port " Sidetone Switch", 1, 0, 1, 0, \
  379. omap_mcbsp_st_get_mode, omap_mcbsp_st_put_mode), \
  380. OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 0 Volume", \
  381. -32768, 32767, \
  382. omap_mcbsp_get_st_ch0_volume, \
  383. omap_mcbsp_set_st_ch0_volume), \
  384. OMAP_MCBSP_SOC_SINGLE_S16_EXT("McBSP" #port " Sidetone Channel 1 Volume", \
  385. -32768, 32767, \
  386. omap_mcbsp_get_st_ch1_volume, \
  387. omap_mcbsp_set_st_ch1_volume), \
  388. }
  389. OMAP_MCBSP_ST_CONTROLS(2);
  390. OMAP_MCBSP_ST_CONTROLS(3);
  391. int omap_mcbsp_st_add_controls(struct snd_soc_pcm_runtime *rtd, int port_id)
  392. {
  393. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  394. struct omap_mcbsp *mcbsp = snd_soc_dai_get_drvdata(cpu_dai);
  395. if (!mcbsp->st_data) {
  396. dev_warn(mcbsp->dev, "No sidetone data for port\n");
  397. return 0;
  398. }
  399. switch (port_id) {
  400. case 2: /* McBSP 2 */
  401. return snd_soc_add_dai_controls(cpu_dai,
  402. omap_mcbsp2_st_controls,
  403. ARRAY_SIZE(omap_mcbsp2_st_controls));
  404. case 3: /* McBSP 3 */
  405. return snd_soc_add_dai_controls(cpu_dai,
  406. omap_mcbsp3_st_controls,
  407. ARRAY_SIZE(omap_mcbsp3_st_controls));
  408. default:
  409. dev_err(mcbsp->dev, "Port %d not supported\n", port_id);
  410. break;
  411. }
  412. return -EINVAL;
  413. }
  414. EXPORT_SYMBOL_GPL(omap_mcbsp_st_add_controls);