omap-dmic.h 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * omap-dmic.h -- OMAP Digital Microphone Controller
  4. */
  5. #ifndef _OMAP_DMIC_H
  6. #define _OMAP_DMIC_H
  7. #define OMAP_DMIC_REVISION_REG 0x00
  8. #define OMAP_DMIC_SYSCONFIG_REG 0x10
  9. #define OMAP_DMIC_IRQSTATUS_RAW_REG 0x24
  10. #define OMAP_DMIC_IRQSTATUS_REG 0x28
  11. #define OMAP_DMIC_IRQENABLE_SET_REG 0x2C
  12. #define OMAP_DMIC_IRQENABLE_CLR_REG 0x30
  13. #define OMAP_DMIC_IRQWAKE_EN_REG 0x34
  14. #define OMAP_DMIC_DMAENABLE_SET_REG 0x38
  15. #define OMAP_DMIC_DMAENABLE_CLR_REG 0x3C
  16. #define OMAP_DMIC_DMAWAKEEN_REG 0x40
  17. #define OMAP_DMIC_CTRL_REG 0x44
  18. #define OMAP_DMIC_DATA_REG 0x48
  19. #define OMAP_DMIC_FIFO_CTRL_REG 0x4C
  20. #define OMAP_DMIC_FIFO_DMIC1R_DATA_REG 0x50
  21. #define OMAP_DMIC_FIFO_DMIC1L_DATA_REG 0x54
  22. #define OMAP_DMIC_FIFO_DMIC2R_DATA_REG 0x58
  23. #define OMAP_DMIC_FIFO_DMIC2L_DATA_REG 0x5C
  24. #define OMAP_DMIC_FIFO_DMIC3R_DATA_REG 0x60
  25. #define OMAP_DMIC_FIFO_DMIC3L_DATA_REG 0x64
  26. /* IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR bit fields */
  27. #define OMAP_DMIC_IRQ (1 << 0)
  28. #define OMAP_DMIC_IRQ_FULL (1 << 1)
  29. #define OMAP_DMIC_IRQ_ALMST_EMPTY (1 << 2)
  30. #define OMAP_DMIC_IRQ_EMPTY (1 << 3)
  31. #define OMAP_DMIC_IRQ_MASK 0x07
  32. /* DMIC_DMAENABLE bit fields */
  33. #define OMAP_DMIC_DMA_ENABLE 0x1
  34. /* DMIC_CTRL bit fields */
  35. #define OMAP_DMIC_UP1_ENABLE (1 << 0)
  36. #define OMAP_DMIC_UP2_ENABLE (1 << 1)
  37. #define OMAP_DMIC_UP3_ENABLE (1 << 2)
  38. #define OMAP_DMIC_UP_ENABLE_MASK 0x7
  39. #define OMAP_DMIC_FORMAT (1 << 3)
  40. #define OMAP_DMIC_POLAR1 (1 << 4)
  41. #define OMAP_DMIC_POLAR2 (1 << 5)
  42. #define OMAP_DMIC_POLAR3 (1 << 6)
  43. #define OMAP_DMIC_POLAR_MASK (0x7 << 4)
  44. #define OMAP_DMIC_CLK_DIV(x) (((x) & 0x7) << 7)
  45. #define OMAP_DMIC_CLK_DIV_MASK (0x7 << 7)
  46. #define OMAP_DMIC_RESET (1 << 10)
  47. #define OMAP_DMICOUTFORMAT_LJUST (0 << 3)
  48. #define OMAP_DMICOUTFORMAT_RJUST (1 << 3)
  49. /* DMIC_FIFO_CTRL bit fields */
  50. #define OMAP_DMIC_THRES_MAX 0xF
  51. enum omap_dmic_clk {
  52. OMAP_DMIC_SYSCLK_PAD_CLKS, /* PAD_CLKS */
  53. OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS, /* SLIMBUS_CLK */
  54. OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS, /* DMIC_SYNC_MUX_CLK */
  55. OMAP_DMIC_ABE_DMIC_CLK, /* abe_dmic_clk */
  56. };
  57. #endif