axg-tdmin.c 7.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright (c) 2018 BayLibre, SAS.
  4. // Author: Jerome Brunet <jbrunet@baylibre.com>
  5. #include <linux/module.h>
  6. #include <linux/of_platform.h>
  7. #include <linux/regmap.h>
  8. #include <sound/soc.h>
  9. #include <sound/soc-dai.h>
  10. #include "axg-tdm-formatter.h"
  11. #define TDMIN_CTRL 0x00
  12. #define TDMIN_CTRL_ENABLE BIT(31)
  13. #define TDMIN_CTRL_I2S_MODE BIT(30)
  14. #define TDMIN_CTRL_RST_OUT BIT(29)
  15. #define TDMIN_CTRL_RST_IN BIT(28)
  16. #define TDMIN_CTRL_WS_INV BIT(25)
  17. #define TDMIN_CTRL_SEL_SHIFT 20
  18. #define TDMIN_CTRL_IN_BIT_SKEW_MASK GENMASK(18, 16)
  19. #define TDMIN_CTRL_IN_BIT_SKEW(x) ((x) << 16)
  20. #define TDMIN_CTRL_LSB_FIRST BIT(5)
  21. #define TDMIN_CTRL_BITNUM_MASK GENMASK(4, 0)
  22. #define TDMIN_CTRL_BITNUM(x) ((x) << 0)
  23. #define TDMIN_SWAP 0x04
  24. #define TDMIN_MASK0 0x08
  25. #define TDMIN_MASK1 0x0c
  26. #define TDMIN_MASK2 0x10
  27. #define TDMIN_MASK3 0x14
  28. #define TDMIN_STAT 0x18
  29. #define TDMIN_MUTE_VAL 0x1c
  30. #define TDMIN_MUTE0 0x20
  31. #define TDMIN_MUTE1 0x24
  32. #define TDMIN_MUTE2 0x28
  33. #define TDMIN_MUTE3 0x2c
  34. static const struct regmap_config axg_tdmin_regmap_cfg = {
  35. .reg_bits = 32,
  36. .val_bits = 32,
  37. .reg_stride = 4,
  38. .max_register = TDMIN_MUTE3,
  39. };
  40. static const char * const axg_tdmin_sel_texts[] = {
  41. "IN 0", "IN 1", "IN 2", "IN 3", "IN 4", "IN 5", "IN 6", "IN 7",
  42. "IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15",
  43. };
  44. /* Change to special mux control to reset dapm */
  45. static SOC_ENUM_SINGLE_DECL(axg_tdmin_sel_enum, TDMIN_CTRL,
  46. TDMIN_CTRL_SEL_SHIFT, axg_tdmin_sel_texts);
  47. static const struct snd_kcontrol_new axg_tdmin_in_mux =
  48. SOC_DAPM_ENUM("Input Source", axg_tdmin_sel_enum);
  49. static struct snd_soc_dai *
  50. axg_tdmin_get_be(struct snd_soc_dapm_widget *w)
  51. {
  52. struct snd_soc_dapm_path *p = NULL;
  53. struct snd_soc_dai *be;
  54. snd_soc_dapm_widget_for_each_source_path(w, p) {
  55. if (!p->connect)
  56. continue;
  57. if (p->source->id == snd_soc_dapm_dai_out)
  58. return (struct snd_soc_dai *)p->source->priv;
  59. be = axg_tdmin_get_be(p->source);
  60. if (be)
  61. return be;
  62. }
  63. return NULL;
  64. }
  65. static struct axg_tdm_stream *
  66. axg_tdmin_get_tdm_stream(struct snd_soc_dapm_widget *w)
  67. {
  68. struct snd_soc_dai *be = axg_tdmin_get_be(w);
  69. if (!be)
  70. return NULL;
  71. return be->capture_dma_data;
  72. }
  73. static void axg_tdmin_enable(struct regmap *map)
  74. {
  75. /* Apply both reset */
  76. regmap_update_bits(map, TDMIN_CTRL,
  77. TDMIN_CTRL_RST_OUT | TDMIN_CTRL_RST_IN, 0);
  78. /* Clear out reset before in reset */
  79. regmap_update_bits(map, TDMIN_CTRL,
  80. TDMIN_CTRL_RST_OUT, TDMIN_CTRL_RST_OUT);
  81. regmap_update_bits(map, TDMIN_CTRL,
  82. TDMIN_CTRL_RST_IN, TDMIN_CTRL_RST_IN);
  83. /* Actually enable tdmin */
  84. regmap_update_bits(map, TDMIN_CTRL,
  85. TDMIN_CTRL_ENABLE, TDMIN_CTRL_ENABLE);
  86. }
  87. static void axg_tdmin_disable(struct regmap *map)
  88. {
  89. regmap_update_bits(map, TDMIN_CTRL, TDMIN_CTRL_ENABLE, 0);
  90. }
  91. static int axg_tdmin_prepare(struct regmap *map,
  92. const struct axg_tdm_formatter_hw *quirks,
  93. struct axg_tdm_stream *ts)
  94. {
  95. unsigned int val, skew = quirks->skew_offset;
  96. /* Set stream skew */
  97. switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  98. case SND_SOC_DAIFMT_I2S:
  99. case SND_SOC_DAIFMT_DSP_A:
  100. skew += 1;
  101. break;
  102. case SND_SOC_DAIFMT_LEFT_J:
  103. case SND_SOC_DAIFMT_DSP_B:
  104. break;
  105. default:
  106. pr_err("Unsupported format: %u\n",
  107. ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
  108. return -EINVAL;
  109. }
  110. val = TDMIN_CTRL_IN_BIT_SKEW(skew);
  111. /* Set stream format mode */
  112. switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  113. case SND_SOC_DAIFMT_I2S:
  114. case SND_SOC_DAIFMT_LEFT_J:
  115. case SND_SOC_DAIFMT_RIGHT_J:
  116. val |= TDMIN_CTRL_I2S_MODE;
  117. break;
  118. }
  119. /* If the sample clock is inverted, invert it back for the formatter */
  120. if (axg_tdm_lrclk_invert(ts->iface->fmt))
  121. val |= TDMIN_CTRL_WS_INV;
  122. /* Set the slot width */
  123. val |= TDMIN_CTRL_BITNUM(ts->iface->slot_width - 1);
  124. /*
  125. * The following also reset LSB_FIRST which result in the formatter
  126. * placing the first bit received at bit 31
  127. */
  128. regmap_update_bits(map, TDMIN_CTRL,
  129. (TDMIN_CTRL_IN_BIT_SKEW_MASK | TDMIN_CTRL_WS_INV |
  130. TDMIN_CTRL_I2S_MODE | TDMIN_CTRL_LSB_FIRST |
  131. TDMIN_CTRL_BITNUM_MASK), val);
  132. /* Set static swap mask configuration */
  133. regmap_write(map, TDMIN_SWAP, 0x76543210);
  134. return axg_tdm_formatter_set_channel_masks(map, ts, TDMIN_MASK0);
  135. }
  136. static const struct snd_soc_dapm_widget axg_tdmin_dapm_widgets[] = {
  137. SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
  138. SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
  139. SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
  140. SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
  141. SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
  142. SND_SOC_DAPM_AIF_IN("IN 5", NULL, 0, SND_SOC_NOPM, 0, 0),
  143. SND_SOC_DAPM_AIF_IN("IN 6", NULL, 0, SND_SOC_NOPM, 0, 0),
  144. SND_SOC_DAPM_AIF_IN("IN 7", NULL, 0, SND_SOC_NOPM, 0, 0),
  145. SND_SOC_DAPM_AIF_IN("IN 8", NULL, 0, SND_SOC_NOPM, 0, 0),
  146. SND_SOC_DAPM_AIF_IN("IN 9", NULL, 0, SND_SOC_NOPM, 0, 0),
  147. SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0),
  148. SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0),
  149. SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0),
  150. SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0),
  151. SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0),
  152. SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0),
  153. SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmin_in_mux),
  154. SND_SOC_DAPM_PGA_E("DEC", SND_SOC_NOPM, 0, 0, NULL, 0,
  155. axg_tdm_formatter_event,
  156. (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
  157. SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
  158. };
  159. static const struct snd_soc_dapm_route axg_tdmin_dapm_routes[] = {
  160. { "SRC SEL", "IN 0", "IN 0" },
  161. { "SRC SEL", "IN 1", "IN 1" },
  162. { "SRC SEL", "IN 2", "IN 2" },
  163. { "SRC SEL", "IN 3", "IN 3" },
  164. { "SRC SEL", "IN 4", "IN 4" },
  165. { "SRC SEL", "IN 5", "IN 5" },
  166. { "SRC SEL", "IN 6", "IN 6" },
  167. { "SRC SEL", "IN 7", "IN 7" },
  168. { "SRC SEL", "IN 8", "IN 8" },
  169. { "SRC SEL", "IN 9", "IN 9" },
  170. { "SRC SEL", "IN 10", "IN 10" },
  171. { "SRC SEL", "IN 11", "IN 11" },
  172. { "SRC SEL", "IN 12", "IN 12" },
  173. { "SRC SEL", "IN 13", "IN 13" },
  174. { "SRC SEL", "IN 14", "IN 14" },
  175. { "SRC SEL", "IN 15", "IN 15" },
  176. { "DEC", NULL, "SRC SEL" },
  177. { "OUT", NULL, "DEC" },
  178. };
  179. static const struct snd_soc_component_driver axg_tdmin_component_drv = {
  180. .dapm_widgets = axg_tdmin_dapm_widgets,
  181. .num_dapm_widgets = ARRAY_SIZE(axg_tdmin_dapm_widgets),
  182. .dapm_routes = axg_tdmin_dapm_routes,
  183. .num_dapm_routes = ARRAY_SIZE(axg_tdmin_dapm_routes),
  184. };
  185. static const struct axg_tdm_formatter_ops axg_tdmin_ops = {
  186. .get_stream = axg_tdmin_get_tdm_stream,
  187. .prepare = axg_tdmin_prepare,
  188. .enable = axg_tdmin_enable,
  189. .disable = axg_tdmin_disable,
  190. };
  191. static const struct axg_tdm_formatter_driver axg_tdmin_drv = {
  192. .component_drv = &axg_tdmin_component_drv,
  193. .regmap_cfg = &axg_tdmin_regmap_cfg,
  194. .ops = &axg_tdmin_ops,
  195. .quirks = &(const struct axg_tdm_formatter_hw) {
  196. .skew_offset = 3,
  197. },
  198. };
  199. static const struct of_device_id axg_tdmin_of_match[] = {
  200. {
  201. .compatible = "amlogic,axg-tdmin",
  202. .data = &axg_tdmin_drv,
  203. }, {
  204. .compatible = "amlogic,g12a-tdmin",
  205. .data = &axg_tdmin_drv,
  206. }, {
  207. .compatible = "amlogic,sm1-tdmin",
  208. .data = &axg_tdmin_drv,
  209. }, {}
  210. };
  211. MODULE_DEVICE_TABLE(of, axg_tdmin_of_match);
  212. static struct platform_driver axg_tdmin_pdrv = {
  213. .probe = axg_tdm_formatter_probe,
  214. .driver = {
  215. .name = "axg-tdmin",
  216. .of_match_table = axg_tdmin_of_match,
  217. },
  218. };
  219. module_platform_driver(axg_tdmin_pdrv);
  220. MODULE_DESCRIPTION("Amlogic AXG TDM input formatter driver");
  221. MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
  222. MODULE_LICENSE("GPL v2");