wm8990.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * wm8990.c -- WM8990 ALSA Soc Audio driver
  4. *
  5. * Copyright 2008 Wolfson Microelectronics PLC.
  6. * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/i2c.h>
  15. #include <linux/regmap.h>
  16. #include <linux/slab.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <sound/initval.h>
  22. #include <sound/tlv.h>
  23. #include <asm/div64.h>
  24. #include "wm8990.h"
  25. /* codec private data */
  26. struct wm8990_priv {
  27. struct regmap *regmap;
  28. unsigned int sysclk;
  29. unsigned int pcmclk;
  30. };
  31. #define wm8990_reset(c) snd_soc_component_write(c, WM8990_RESET, 0)
  32. static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0);
  33. static const DECLARE_TLV_DB_SCALE(out_mix_tlv, 0, -2100, 0);
  34. static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -7300, 600, 0);
  35. static const DECLARE_TLV_DB_SCALE(out_dac_tlv, -7163, 0, 0);
  36. static const DECLARE_TLV_DB_SCALE(in_adc_tlv, -7163, 1763, 0);
  37. static const DECLARE_TLV_DB_SCALE(out_sidetone_tlv, -3600, 0, 0);
  38. static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
  39. struct snd_ctl_elem_value *ucontrol)
  40. {
  41. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  42. struct soc_mixer_control *mc =
  43. (struct soc_mixer_control *)kcontrol->private_value;
  44. int reg = mc->reg;
  45. int ret;
  46. u16 val;
  47. ret = snd_soc_put_volsw(kcontrol, ucontrol);
  48. if (ret < 0)
  49. return ret;
  50. /* now hit the volume update bits (always bit 8) */
  51. val = snd_soc_component_read(component, reg);
  52. return snd_soc_component_write(component, reg, val | 0x0100);
  53. }
  54. #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\
  55. tlv_array) \
  56. SOC_SINGLE_EXT_TLV(xname, reg, shift, max, invert, \
  57. snd_soc_get_volsw, wm899x_outpga_put_volsw_vu, tlv_array)
  58. static const char *wm8990_digital_sidetone[] =
  59. {"None", "Left ADC", "Right ADC", "Reserved"};
  60. static SOC_ENUM_SINGLE_DECL(wm8990_left_digital_sidetone_enum,
  61. WM8990_DIGITAL_SIDE_TONE,
  62. WM8990_ADC_TO_DACL_SHIFT,
  63. wm8990_digital_sidetone);
  64. static SOC_ENUM_SINGLE_DECL(wm8990_right_digital_sidetone_enum,
  65. WM8990_DIGITAL_SIDE_TONE,
  66. WM8990_ADC_TO_DACR_SHIFT,
  67. wm8990_digital_sidetone);
  68. static const char *wm8990_adcmode[] =
  69. {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
  70. static SOC_ENUM_SINGLE_DECL(wm8990_right_adcmode_enum,
  71. WM8990_ADC_CTRL,
  72. WM8990_ADC_HPF_CUT_SHIFT,
  73. wm8990_adcmode);
  74. static const struct snd_kcontrol_new wm8990_snd_controls[] = {
  75. /* INMIXL */
  76. SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L12MNBST_BIT, 1, 0),
  77. SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_L34MNBST_BIT, 1, 0),
  78. /* INMIXR */
  79. SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R12MNBST_BIT, 1, 0),
  80. SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3, WM8990_R34MNBST_BIT, 1, 0),
  81. /* LOMIX */
  82. SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3,
  83. WM8990_LLI3LOVOL_SHIFT, WM8990_LLI3LOVOL_MASK, 1, out_mix_tlv),
  84. SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3,
  85. WM8990_LR12LOVOL_SHIFT, WM8990_LR12LOVOL_MASK, 1, out_mix_tlv),
  86. SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3,
  87. WM8990_LL12LOVOL_SHIFT, WM8990_LL12LOVOL_MASK, 1, out_mix_tlv),
  88. SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5,
  89. WM8990_LRI3LOVOL_SHIFT, WM8990_LRI3LOVOL_MASK, 1, out_mix_tlv),
  90. SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5,
  91. WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv),
  92. SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5,
  93. WM8990_LRBLOVOL_SHIFT, WM8990_LRBLOVOL_MASK, 1, out_mix_tlv),
  94. /* ROMIX */
  95. SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4,
  96. WM8990_RRI3ROVOL_SHIFT, WM8990_RRI3ROVOL_MASK, 1, out_mix_tlv),
  97. SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4,
  98. WM8990_RL12ROVOL_SHIFT, WM8990_RL12ROVOL_MASK, 1, out_mix_tlv),
  99. SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4,
  100. WM8990_RR12ROVOL_SHIFT, WM8990_RR12ROVOL_MASK, 1, out_mix_tlv),
  101. SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6,
  102. WM8990_RLI3ROVOL_SHIFT, WM8990_RLI3ROVOL_MASK, 1, out_mix_tlv),
  103. SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6,
  104. WM8990_RLBROVOL_SHIFT, WM8990_RLBROVOL_MASK, 1, out_mix_tlv),
  105. SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6,
  106. WM8990_RRBROVOL_SHIFT, WM8990_RRBROVOL_MASK, 1, out_mix_tlv),
  107. /* LOUT */
  108. SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME,
  109. WM8990_LOUTVOL_SHIFT, WM8990_LOUTVOL_MASK, 0, out_pga_tlv),
  110. SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME, WM8990_LOZC_BIT, 1, 0),
  111. /* ROUT */
  112. SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME,
  113. WM8990_ROUTVOL_SHIFT, WM8990_ROUTVOL_MASK, 0, out_pga_tlv),
  114. SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME, WM8990_ROZC_BIT, 1, 0),
  115. /* LOPGA */
  116. SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME,
  117. WM8990_LOPGAVOL_SHIFT, WM8990_LOPGAVOL_MASK, 0, out_pga_tlv),
  118. SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME,
  119. WM8990_LOPGAZC_BIT, 1, 0),
  120. /* ROPGA */
  121. SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME,
  122. WM8990_ROPGAVOL_SHIFT, WM8990_ROPGAVOL_MASK, 0, out_pga_tlv),
  123. SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME,
  124. WM8990_ROPGAZC_BIT, 1, 0),
  125. SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME,
  126. WM8990_LONMUTE_BIT, 1, 0),
  127. SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME,
  128. WM8990_LOPMUTE_BIT, 1, 0),
  129. SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME,
  130. WM8990_LOATTN_BIT, 1, 0),
  131. SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME,
  132. WM8990_RONMUTE_BIT, 1, 0),
  133. SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME,
  134. WM8990_ROPMUTE_BIT, 1, 0),
  135. SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME,
  136. WM8990_ROATTN_BIT, 1, 0),
  137. SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME,
  138. WM8990_OUT3MUTE_BIT, 1, 0),
  139. SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME,
  140. WM8990_OUT3ATTN_BIT, 1, 0),
  141. SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME,
  142. WM8990_OUT4MUTE_BIT, 1, 0),
  143. SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME,
  144. WM8990_OUT4ATTN_BIT, 1, 0),
  145. SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1,
  146. WM8990_CDMODE_BIT, 1, 0),
  147. SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME,
  148. WM8990_SPKATTN_SHIFT, WM8990_SPKATTN_MASK, 0),
  149. SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3,
  150. WM8990_DCGAIN_SHIFT, WM8990_DCGAIN_MASK, 0),
  151. SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3,
  152. WM8990_ACGAIN_SHIFT, WM8990_ACGAIN_MASK, 0),
  153. SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4,
  154. WM8990_SPKVOL_SHIFT, WM8990_SPKVOL_MASK, 0, out_pga_tlv),
  155. SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4,
  156. WM8990_SPKZC_SHIFT, WM8990_SPKZC_MASK, 0),
  157. SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
  158. WM8990_LEFT_DAC_DIGITAL_VOLUME,
  159. WM8990_DACL_VOL_SHIFT,
  160. WM8990_DACL_VOL_MASK,
  161. 0,
  162. out_dac_tlv),
  163. SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
  164. WM8990_RIGHT_DAC_DIGITAL_VOLUME,
  165. WM8990_DACR_VOL_SHIFT,
  166. WM8990_DACR_VOL_MASK,
  167. 0,
  168. out_dac_tlv),
  169. SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum),
  170. SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum),
  171. SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE,
  172. WM8990_ADCL_DAC_SVOL_SHIFT, WM8990_ADCL_DAC_SVOL_MASK, 0,
  173. out_sidetone_tlv),
  174. SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE,
  175. WM8990_ADCR_DAC_SVOL_SHIFT, WM8990_ADCR_DAC_SVOL_MASK, 0,
  176. out_sidetone_tlv),
  177. SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL,
  178. WM8990_ADC_HPF_ENA_BIT, 1, 0),
  179. SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum),
  180. SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
  181. WM8990_LEFT_ADC_DIGITAL_VOLUME,
  182. WM8990_ADCL_VOL_SHIFT,
  183. WM8990_ADCL_VOL_MASK,
  184. 0,
  185. in_adc_tlv),
  186. SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
  187. WM8990_RIGHT_ADC_DIGITAL_VOLUME,
  188. WM8990_ADCR_VOL_SHIFT,
  189. WM8990_ADCR_VOL_MASK,
  190. 0,
  191. in_adc_tlv),
  192. SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
  193. WM8990_LEFT_LINE_INPUT_1_2_VOLUME,
  194. WM8990_LIN12VOL_SHIFT,
  195. WM8990_LIN12VOL_MASK,
  196. 0,
  197. in_pga_tlv),
  198. SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME,
  199. WM8990_LI12ZC_BIT, 1, 0),
  200. SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME,
  201. WM8990_LI12MUTE_BIT, 1, 0),
  202. SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
  203. WM8990_LEFT_LINE_INPUT_3_4_VOLUME,
  204. WM8990_LIN34VOL_SHIFT,
  205. WM8990_LIN34VOL_MASK,
  206. 0,
  207. in_pga_tlv),
  208. SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME,
  209. WM8990_LI34ZC_BIT, 1, 0),
  210. SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME,
  211. WM8990_LI34MUTE_BIT, 1, 0),
  212. SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
  213. WM8990_RIGHT_LINE_INPUT_1_2_VOLUME,
  214. WM8990_RIN12VOL_SHIFT,
  215. WM8990_RIN12VOL_MASK,
  216. 0,
  217. in_pga_tlv),
  218. SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME,
  219. WM8990_RI12ZC_BIT, 1, 0),
  220. SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME,
  221. WM8990_RI12MUTE_BIT, 1, 0),
  222. SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
  223. WM8990_RIGHT_LINE_INPUT_3_4_VOLUME,
  224. WM8990_RIN34VOL_SHIFT,
  225. WM8990_RIN34VOL_MASK,
  226. 0,
  227. in_pga_tlv),
  228. SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME,
  229. WM8990_RI34ZC_BIT, 1, 0),
  230. SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME,
  231. WM8990_RI34MUTE_BIT, 1, 0),
  232. };
  233. /*
  234. * _DAPM_ Controls
  235. */
  236. static int outmixer_event(struct snd_soc_dapm_widget *w,
  237. struct snd_kcontrol *kcontrol, int event)
  238. {
  239. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  240. u32 reg_shift = kcontrol->private_value & 0xfff;
  241. int ret = 0;
  242. u16 reg;
  243. switch (reg_shift) {
  244. case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) :
  245. reg = snd_soc_component_read(component, WM8990_OUTPUT_MIXER1);
  246. if (reg & WM8990_LDLO) {
  247. printk(KERN_WARNING
  248. "Cannot set as Output Mixer 1 LDLO Set\n");
  249. ret = -1;
  250. }
  251. break;
  252. case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8):
  253. reg = snd_soc_component_read(component, WM8990_OUTPUT_MIXER2);
  254. if (reg & WM8990_RDRO) {
  255. printk(KERN_WARNING
  256. "Cannot set as Output Mixer 2 RDRO Set\n");
  257. ret = -1;
  258. }
  259. break;
  260. case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8):
  261. reg = snd_soc_component_read(component, WM8990_SPEAKER_MIXER);
  262. if (reg & WM8990_LDSPK) {
  263. printk(KERN_WARNING
  264. "Cannot set as Speaker Mixer LDSPK Set\n");
  265. ret = -1;
  266. }
  267. break;
  268. case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8):
  269. reg = snd_soc_component_read(component, WM8990_SPEAKER_MIXER);
  270. if (reg & WM8990_RDSPK) {
  271. printk(KERN_WARNING
  272. "Cannot set as Speaker Mixer RDSPK Set\n");
  273. ret = -1;
  274. }
  275. break;
  276. }
  277. return ret;
  278. }
  279. /* INMIX dB values */
  280. static const DECLARE_TLV_DB_SCALE(in_mix_tlv, -1200, 600, 0);
  281. /* Left In PGA Connections */
  282. static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls[] = {
  283. SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2, WM8990_LMN1_BIT, 1, 0),
  284. SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2, WM8990_LMP2_BIT, 1, 0),
  285. };
  286. static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls[] = {
  287. SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2, WM8990_LMN3_BIT, 1, 0),
  288. SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2, WM8990_LMP4_BIT, 1, 0),
  289. };
  290. /* Right In PGA Connections */
  291. static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls[] = {
  292. SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2, WM8990_RMN1_BIT, 1, 0),
  293. SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2, WM8990_RMP2_BIT, 1, 0),
  294. };
  295. static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls[] = {
  296. SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2, WM8990_RMN3_BIT, 1, 0),
  297. SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2, WM8990_RMP4_BIT, 1, 0),
  298. };
  299. /* INMIXL */
  300. static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls[] = {
  301. SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3,
  302. WM8990_LDBVOL_SHIFT, WM8990_LDBVOL_MASK, 0, in_mix_tlv),
  303. SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5, WM8990_LI2BVOL_SHIFT,
  304. 7, 0, in_mix_tlv),
  305. SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT,
  306. 1, 0),
  307. SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT,
  308. 1, 0),
  309. };
  310. /* INMIXR */
  311. static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls[] = {
  312. SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4,
  313. WM8990_RDBVOL_SHIFT, WM8990_RDBVOL_MASK, 0, in_mix_tlv),
  314. SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6, WM8990_RI2BVOL_SHIFT,
  315. 7, 0, in_mix_tlv),
  316. SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3, WM8990_L12MNB_BIT,
  317. 1, 0),
  318. SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3, WM8990_L34MNB_BIT,
  319. 1, 0),
  320. };
  321. /* AINLMUX */
  322. static const char *wm8990_ainlmux[] =
  323. {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
  324. static SOC_ENUM_SINGLE_DECL(wm8990_ainlmux_enum,
  325. WM8990_INPUT_MIXER1, WM8990_AINLMODE_SHIFT,
  326. wm8990_ainlmux);
  327. static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls =
  328. SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum);
  329. /* DIFFINL */
  330. /* AINRMUX */
  331. static const char *wm8990_ainrmux[] =
  332. {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
  333. static SOC_ENUM_SINGLE_DECL(wm8990_ainrmux_enum,
  334. WM8990_INPUT_MIXER1, WM8990_AINRMODE_SHIFT,
  335. wm8990_ainrmux);
  336. static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls =
  337. SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum);
  338. /* LOMIX */
  339. static const struct snd_kcontrol_new wm8990_dapm_lomix_controls[] = {
  340. SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1,
  341. WM8990_LRBLO_BIT, 1, 0),
  342. SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1,
  343. WM8990_LLBLO_BIT, 1, 0),
  344. SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1,
  345. WM8990_LRI3LO_BIT, 1, 0),
  346. SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1,
  347. WM8990_LLI3LO_BIT, 1, 0),
  348. SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1,
  349. WM8990_LR12LO_BIT, 1, 0),
  350. SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1,
  351. WM8990_LL12LO_BIT, 1, 0),
  352. SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1,
  353. WM8990_LDLO_BIT, 1, 0),
  354. };
  355. /* ROMIX */
  356. static const struct snd_kcontrol_new wm8990_dapm_romix_controls[] = {
  357. SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2,
  358. WM8990_RLBRO_BIT, 1, 0),
  359. SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2,
  360. WM8990_RRBRO_BIT, 1, 0),
  361. SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2,
  362. WM8990_RLI3RO_BIT, 1, 0),
  363. SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2,
  364. WM8990_RRI3RO_BIT, 1, 0),
  365. SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2,
  366. WM8990_RL12RO_BIT, 1, 0),
  367. SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2,
  368. WM8990_RR12RO_BIT, 1, 0),
  369. SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2,
  370. WM8990_RDRO_BIT, 1, 0),
  371. };
  372. /* LONMIX */
  373. static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls[] = {
  374. SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1,
  375. WM8990_LLOPGALON_BIT, 1, 0),
  376. SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1,
  377. WM8990_LROPGALON_BIT, 1, 0),
  378. SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1,
  379. WM8990_LOPLON_BIT, 1, 0),
  380. };
  381. /* LOPMIX */
  382. static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls[] = {
  383. SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1,
  384. WM8990_LR12LOP_BIT, 1, 0),
  385. SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1,
  386. WM8990_LL12LOP_BIT, 1, 0),
  387. SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1,
  388. WM8990_LLOPGALOP_BIT, 1, 0),
  389. };
  390. /* RONMIX */
  391. static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls[] = {
  392. SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2,
  393. WM8990_RROPGARON_BIT, 1, 0),
  394. SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2,
  395. WM8990_RLOPGARON_BIT, 1, 0),
  396. SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2,
  397. WM8990_ROPRON_BIT, 1, 0),
  398. };
  399. /* ROPMIX */
  400. static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls[] = {
  401. SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2,
  402. WM8990_RL12ROP_BIT, 1, 0),
  403. SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2,
  404. WM8990_RR12ROP_BIT, 1, 0),
  405. SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2,
  406. WM8990_RROPGAROP_BIT, 1, 0),
  407. };
  408. /* OUT3MIX */
  409. static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls[] = {
  410. SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER,
  411. WM8990_LI4O3_BIT, 1, 0),
  412. SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER,
  413. WM8990_LPGAO3_BIT, 1, 0),
  414. };
  415. /* OUT4MIX */
  416. static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls[] = {
  417. SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER,
  418. WM8990_RPGAO4_BIT, 1, 0),
  419. SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER,
  420. WM8990_RI4O4_BIT, 1, 0),
  421. };
  422. /* SPKMIX */
  423. static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls[] = {
  424. SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER,
  425. WM8990_LI2SPK_BIT, 1, 0),
  426. SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER,
  427. WM8990_LB2SPK_BIT, 1, 0),
  428. SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER,
  429. WM8990_LOPGASPK_BIT, 1, 0),
  430. SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER,
  431. WM8990_LDSPK_BIT, 1, 0),
  432. SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER,
  433. WM8990_RDSPK_BIT, 1, 0),
  434. SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER,
  435. WM8990_ROPGASPK_BIT, 1, 0),
  436. SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER,
  437. WM8990_RL12ROP_BIT, 1, 0),
  438. SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER,
  439. WM8990_RI2SPK_BIT, 1, 0),
  440. };
  441. static const struct snd_soc_dapm_widget wm8990_dapm_widgets[] = {
  442. /* Input Side */
  443. /* Input Lines */
  444. SND_SOC_DAPM_INPUT("LIN1"),
  445. SND_SOC_DAPM_INPUT("LIN2"),
  446. SND_SOC_DAPM_INPUT("LIN3"),
  447. SND_SOC_DAPM_INPUT("LIN4/RXN"),
  448. SND_SOC_DAPM_INPUT("RIN3"),
  449. SND_SOC_DAPM_INPUT("RIN4/RXP"),
  450. SND_SOC_DAPM_INPUT("RIN1"),
  451. SND_SOC_DAPM_INPUT("RIN2"),
  452. SND_SOC_DAPM_INPUT("Internal ADC Source"),
  453. SND_SOC_DAPM_SUPPLY("INL", WM8990_POWER_MANAGEMENT_2, WM8990_AINL_ENA_BIT, 0,
  454. NULL, 0),
  455. SND_SOC_DAPM_SUPPLY("INR", WM8990_POWER_MANAGEMENT_2, WM8990_AINR_ENA_BIT, 0,
  456. NULL, 0),
  457. /* DACs */
  458. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2,
  459. WM8990_ADCL_ENA_BIT, 0),
  460. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2,
  461. WM8990_ADCR_ENA_BIT, 0),
  462. /* Input PGAs */
  463. SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN12_ENA_BIT,
  464. 0, &wm8990_dapm_lin12_pga_controls[0],
  465. ARRAY_SIZE(wm8990_dapm_lin12_pga_controls)),
  466. SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_LIN34_ENA_BIT,
  467. 0, &wm8990_dapm_lin34_pga_controls[0],
  468. ARRAY_SIZE(wm8990_dapm_lin34_pga_controls)),
  469. SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN12_ENA_BIT,
  470. 0, &wm8990_dapm_rin12_pga_controls[0],
  471. ARRAY_SIZE(wm8990_dapm_rin12_pga_controls)),
  472. SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2, WM8990_RIN34_ENA_BIT,
  473. 0, &wm8990_dapm_rin34_pga_controls[0],
  474. ARRAY_SIZE(wm8990_dapm_rin34_pga_controls)),
  475. /* INMIXL */
  476. SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0,
  477. &wm8990_dapm_inmixl_controls[0],
  478. ARRAY_SIZE(wm8990_dapm_inmixl_controls)),
  479. /* AINLMUX */
  480. SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainlmux_controls),
  481. /* INMIXR */
  482. SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0,
  483. &wm8990_dapm_inmixr_controls[0],
  484. ARRAY_SIZE(wm8990_dapm_inmixr_controls)),
  485. /* AINRMUX */
  486. SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, &wm8990_dapm_ainrmux_controls),
  487. /* Output Side */
  488. /* DACs */
  489. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3,
  490. WM8990_DACL_ENA_BIT, 0),
  491. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3,
  492. WM8990_DACR_ENA_BIT, 0),
  493. /* LOMIX */
  494. SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOMIX_ENA_BIT,
  495. 0, &wm8990_dapm_lomix_controls[0],
  496. ARRAY_SIZE(wm8990_dapm_lomix_controls),
  497. outmixer_event, SND_SOC_DAPM_PRE_REG),
  498. /* LONMIX */
  499. SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LON_ENA_BIT, 0,
  500. &wm8990_dapm_lonmix_controls[0],
  501. ARRAY_SIZE(wm8990_dapm_lonmix_controls)),
  502. /* LOPMIX */
  503. SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_LOP_ENA_BIT, 0,
  504. &wm8990_dapm_lopmix_controls[0],
  505. ARRAY_SIZE(wm8990_dapm_lopmix_controls)),
  506. /* OUT3MIX */
  507. SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT3_ENA_BIT, 0,
  508. &wm8990_dapm_out3mix_controls[0],
  509. ARRAY_SIZE(wm8990_dapm_out3mix_controls)),
  510. /* SPKMIX */
  511. SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1, WM8990_SPK_ENA_BIT, 0,
  512. &wm8990_dapm_spkmix_controls[0],
  513. ARRAY_SIZE(wm8990_dapm_spkmix_controls), outmixer_event,
  514. SND_SOC_DAPM_PRE_REG),
  515. /* OUT4MIX */
  516. SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1, WM8990_OUT4_ENA_BIT, 0,
  517. &wm8990_dapm_out4mix_controls[0],
  518. ARRAY_SIZE(wm8990_dapm_out4mix_controls)),
  519. /* ROPMIX */
  520. SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROP_ENA_BIT, 0,
  521. &wm8990_dapm_ropmix_controls[0],
  522. ARRAY_SIZE(wm8990_dapm_ropmix_controls)),
  523. /* RONMIX */
  524. SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3, WM8990_RON_ENA_BIT, 0,
  525. &wm8990_dapm_ronmix_controls[0],
  526. ARRAY_SIZE(wm8990_dapm_ronmix_controls)),
  527. /* ROMIX */
  528. SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3, WM8990_ROMIX_ENA_BIT,
  529. 0, &wm8990_dapm_romix_controls[0],
  530. ARRAY_SIZE(wm8990_dapm_romix_controls),
  531. outmixer_event, SND_SOC_DAPM_PRE_REG),
  532. /* LOUT PGA */
  533. SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_LOUT_ENA_BIT, 0,
  534. NULL, 0),
  535. /* ROUT PGA */
  536. SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1, WM8990_ROUT_ENA_BIT, 0,
  537. NULL, 0),
  538. /* LOPGA */
  539. SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3, WM8990_LOPGA_ENA_BIT, 0,
  540. NULL, 0),
  541. /* ROPGA */
  542. SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3, WM8990_ROPGA_ENA_BIT, 0,
  543. NULL, 0),
  544. /* MICBIAS */
  545. SND_SOC_DAPM_SUPPLY("MICBIAS", WM8990_POWER_MANAGEMENT_1,
  546. WM8990_MICBIAS_ENA_BIT, 0, NULL, 0),
  547. SND_SOC_DAPM_OUTPUT("LON"),
  548. SND_SOC_DAPM_OUTPUT("LOP"),
  549. SND_SOC_DAPM_OUTPUT("OUT3"),
  550. SND_SOC_DAPM_OUTPUT("LOUT"),
  551. SND_SOC_DAPM_OUTPUT("SPKN"),
  552. SND_SOC_DAPM_OUTPUT("SPKP"),
  553. SND_SOC_DAPM_OUTPUT("ROUT"),
  554. SND_SOC_DAPM_OUTPUT("OUT4"),
  555. SND_SOC_DAPM_OUTPUT("ROP"),
  556. SND_SOC_DAPM_OUTPUT("RON"),
  557. SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
  558. };
  559. static const struct snd_soc_dapm_route wm8990_dapm_routes[] = {
  560. /* Make DACs turn on when playing even if not mixed into any outputs */
  561. {"Internal DAC Sink", NULL, "Left DAC"},
  562. {"Internal DAC Sink", NULL, "Right DAC"},
  563. /* Make ADCs turn on when recording even if not mixed from any inputs */
  564. {"Left ADC", NULL, "Internal ADC Source"},
  565. {"Right ADC", NULL, "Internal ADC Source"},
  566. {"AINLMUX", NULL, "INL"},
  567. {"INMIXL", NULL, "INL"},
  568. {"AINRMUX", NULL, "INR"},
  569. {"INMIXR", NULL, "INR"},
  570. /* Input Side */
  571. /* LIN12 PGA */
  572. {"LIN12 PGA", "LIN1 Switch", "LIN1"},
  573. {"LIN12 PGA", "LIN2 Switch", "LIN2"},
  574. /* LIN34 PGA */
  575. {"LIN34 PGA", "LIN3 Switch", "LIN3"},
  576. {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"},
  577. /* INMIXL */
  578. {"INMIXL", "Record Left Volume", "LOMIX"},
  579. {"INMIXL", "LIN2 Volume", "LIN2"},
  580. {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
  581. {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
  582. /* AINLMUX */
  583. {"AINLMUX", "INMIXL Mix", "INMIXL"},
  584. {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
  585. {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
  586. {"AINLMUX", "RXVOICE Mix", "LIN4/RXN"},
  587. {"AINLMUX", "RXVOICE Mix", "RIN4/RXP"},
  588. /* ADC */
  589. {"Left ADC", NULL, "AINLMUX"},
  590. /* RIN12 PGA */
  591. {"RIN12 PGA", "RIN1 Switch", "RIN1"},
  592. {"RIN12 PGA", "RIN2 Switch", "RIN2"},
  593. /* RIN34 PGA */
  594. {"RIN34 PGA", "RIN3 Switch", "RIN3"},
  595. {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"},
  596. /* INMIXL */
  597. {"INMIXR", "Record Right Volume", "ROMIX"},
  598. {"INMIXR", "RIN2 Volume", "RIN2"},
  599. {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
  600. {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
  601. /* AINRMUX */
  602. {"AINRMUX", "INMIXR Mix", "INMIXR"},
  603. {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
  604. {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
  605. {"AINRMUX", "RXVOICE Mix", "LIN4/RXN"},
  606. {"AINRMUX", "RXVOICE Mix", "RIN4/RXP"},
  607. /* ADC */
  608. {"Right ADC", NULL, "AINRMUX"},
  609. /* LOMIX */
  610. {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
  611. {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
  612. {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
  613. {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
  614. {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
  615. {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
  616. {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
  617. /* ROMIX */
  618. {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
  619. {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
  620. {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
  621. {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
  622. {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
  623. {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
  624. {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
  625. /* SPKMIX */
  626. {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
  627. {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
  628. {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
  629. {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
  630. {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
  631. {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
  632. {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
  633. {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"},
  634. /* LONMIX */
  635. {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
  636. {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
  637. {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
  638. /* LOPMIX */
  639. {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
  640. {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
  641. {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
  642. /* OUT3MIX */
  643. {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXN"},
  644. {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
  645. /* OUT4MIX */
  646. {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
  647. {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"},
  648. /* RONMIX */
  649. {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
  650. {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
  651. {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
  652. /* ROPMIX */
  653. {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
  654. {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
  655. {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
  656. /* Out Mixer PGAs */
  657. {"LOPGA", NULL, "LOMIX"},
  658. {"ROPGA", NULL, "ROMIX"},
  659. {"LOUT PGA", NULL, "LOMIX"},
  660. {"ROUT PGA", NULL, "ROMIX"},
  661. /* Output Pins */
  662. {"LON", NULL, "LONMIX"},
  663. {"LOP", NULL, "LOPMIX"},
  664. {"OUT3", NULL, "OUT3MIX"},
  665. {"LOUT", NULL, "LOUT PGA"},
  666. {"SPKN", NULL, "SPKMIX"},
  667. {"ROUT", NULL, "ROUT PGA"},
  668. {"OUT4", NULL, "OUT4MIX"},
  669. {"ROP", NULL, "ROPMIX"},
  670. {"RON", NULL, "RONMIX"},
  671. };
  672. /* PLL divisors */
  673. struct _pll_div {
  674. u32 div2;
  675. u32 n;
  676. u32 k;
  677. };
  678. /* The size in bits of the pll divide multiplied by 10
  679. * to allow rounding later */
  680. #define FIXED_PLL_SIZE ((1 << 16) * 10)
  681. static void pll_factors(struct _pll_div *pll_div, unsigned int target,
  682. unsigned int source)
  683. {
  684. u64 Kpart;
  685. unsigned int K, Ndiv, Nmod;
  686. Ndiv = target / source;
  687. if (Ndiv < 6) {
  688. source >>= 1;
  689. pll_div->div2 = 1;
  690. Ndiv = target / source;
  691. } else
  692. pll_div->div2 = 0;
  693. if ((Ndiv < 6) || (Ndiv > 12))
  694. printk(KERN_WARNING
  695. "WM8990 N value outwith recommended range! N = %u\n", Ndiv);
  696. pll_div->n = Ndiv;
  697. Nmod = target % source;
  698. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  699. do_div(Kpart, source);
  700. K = Kpart & 0xFFFFFFFF;
  701. /* Check if we need to round */
  702. if ((K % 10) >= 5)
  703. K += 5;
  704. /* Move down to proper range now rounding is done */
  705. K /= 10;
  706. pll_div->k = K;
  707. }
  708. static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  709. int source, unsigned int freq_in, unsigned int freq_out)
  710. {
  711. struct snd_soc_component *component = codec_dai->component;
  712. struct _pll_div pll_div;
  713. if (freq_in && freq_out) {
  714. pll_factors(&pll_div, freq_out * 4, freq_in);
  715. /* Turn on PLL */
  716. snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2,
  717. WM8990_PLL_ENA, WM8990_PLL_ENA);
  718. /* sysclk comes from PLL */
  719. snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
  720. WM8990_SYSCLK_SRC, WM8990_SYSCLK_SRC);
  721. /* set up N , fractional mode and pre-divisor if necessary */
  722. snd_soc_component_write(component, WM8990_PLL1, pll_div.n | WM8990_SDM |
  723. (pll_div.div2?WM8990_PRESCALE:0));
  724. snd_soc_component_write(component, WM8990_PLL2, (u8)(pll_div.k>>8));
  725. snd_soc_component_write(component, WM8990_PLL3, (u8)(pll_div.k & 0xFF));
  726. } else {
  727. /* Turn off PLL */
  728. snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2,
  729. WM8990_PLL_ENA, 0);
  730. }
  731. return 0;
  732. }
  733. /*
  734. * Clock after PLL and dividers
  735. */
  736. static int wm8990_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  737. int clk_id, unsigned int freq, int dir)
  738. {
  739. struct snd_soc_component *component = codec_dai->component;
  740. struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component);
  741. wm8990->sysclk = freq;
  742. return 0;
  743. }
  744. /*
  745. * Set's ADC and Voice DAC format.
  746. */
  747. static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai,
  748. unsigned int fmt)
  749. {
  750. struct snd_soc_component *component = codec_dai->component;
  751. u16 audio1, audio3;
  752. audio1 = snd_soc_component_read(component, WM8990_AUDIO_INTERFACE_1);
  753. audio3 = snd_soc_component_read(component, WM8990_AUDIO_INTERFACE_3);
  754. /* set master/slave audio interface */
  755. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  756. case SND_SOC_DAIFMT_CBS_CFS:
  757. audio3 &= ~WM8990_AIF_MSTR1;
  758. break;
  759. case SND_SOC_DAIFMT_CBM_CFM:
  760. audio3 |= WM8990_AIF_MSTR1;
  761. break;
  762. default:
  763. return -EINVAL;
  764. }
  765. audio1 &= ~WM8990_AIF_FMT_MASK;
  766. /* interface format */
  767. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  768. case SND_SOC_DAIFMT_I2S:
  769. audio1 |= WM8990_AIF_TMF_I2S;
  770. audio1 &= ~WM8990_AIF_LRCLK_INV;
  771. break;
  772. case SND_SOC_DAIFMT_RIGHT_J:
  773. audio1 |= WM8990_AIF_TMF_RIGHTJ;
  774. audio1 &= ~WM8990_AIF_LRCLK_INV;
  775. break;
  776. case SND_SOC_DAIFMT_LEFT_J:
  777. audio1 |= WM8990_AIF_TMF_LEFTJ;
  778. audio1 &= ~WM8990_AIF_LRCLK_INV;
  779. break;
  780. case SND_SOC_DAIFMT_DSP_A:
  781. audio1 |= WM8990_AIF_TMF_DSP;
  782. audio1 &= ~WM8990_AIF_LRCLK_INV;
  783. break;
  784. case SND_SOC_DAIFMT_DSP_B:
  785. audio1 |= WM8990_AIF_TMF_DSP | WM8990_AIF_LRCLK_INV;
  786. break;
  787. default:
  788. return -EINVAL;
  789. }
  790. snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1);
  791. snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_3, audio3);
  792. return 0;
  793. }
  794. static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  795. int div_id, int div)
  796. {
  797. struct snd_soc_component *component = codec_dai->component;
  798. switch (div_id) {
  799. case WM8990_MCLK_DIV:
  800. snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
  801. WM8990_MCLK_DIV_MASK, div);
  802. break;
  803. case WM8990_DACCLK_DIV:
  804. snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
  805. WM8990_DAC_CLKDIV_MASK, div);
  806. break;
  807. case WM8990_ADCCLK_DIV:
  808. snd_soc_component_update_bits(component, WM8990_CLOCKING_2,
  809. WM8990_ADC_CLKDIV_MASK, div);
  810. break;
  811. case WM8990_BCLK_DIV:
  812. snd_soc_component_update_bits(component, WM8990_CLOCKING_1,
  813. WM8990_BCLK_DIV_MASK, div);
  814. break;
  815. default:
  816. return -EINVAL;
  817. }
  818. return 0;
  819. }
  820. /*
  821. * Set PCM DAI bit size and sample rate.
  822. */
  823. static int wm8990_hw_params(struct snd_pcm_substream *substream,
  824. struct snd_pcm_hw_params *params,
  825. struct snd_soc_dai *dai)
  826. {
  827. struct snd_soc_component *component = dai->component;
  828. u16 audio1 = snd_soc_component_read(component, WM8990_AUDIO_INTERFACE_1);
  829. audio1 &= ~WM8990_AIF_WL_MASK;
  830. /* bit size */
  831. switch (params_width(params)) {
  832. case 16:
  833. break;
  834. case 20:
  835. audio1 |= WM8990_AIF_WL_20BITS;
  836. break;
  837. case 24:
  838. audio1 |= WM8990_AIF_WL_24BITS;
  839. break;
  840. case 32:
  841. audio1 |= WM8990_AIF_WL_32BITS;
  842. break;
  843. }
  844. snd_soc_component_write(component, WM8990_AUDIO_INTERFACE_1, audio1);
  845. return 0;
  846. }
  847. static int wm8990_mute(struct snd_soc_dai *dai, int mute, int direction)
  848. {
  849. struct snd_soc_component *component = dai->component;
  850. u16 val;
  851. val = snd_soc_component_read(component, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE;
  852. if (mute)
  853. snd_soc_component_write(component, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE);
  854. else
  855. snd_soc_component_write(component, WM8990_DAC_CTRL, val);
  856. return 0;
  857. }
  858. static int wm8990_set_bias_level(struct snd_soc_component *component,
  859. enum snd_soc_bias_level level)
  860. {
  861. struct wm8990_priv *wm8990 = snd_soc_component_get_drvdata(component);
  862. int ret;
  863. switch (level) {
  864. case SND_SOC_BIAS_ON:
  865. break;
  866. case SND_SOC_BIAS_PREPARE:
  867. /* VMID=2*50k */
  868. snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1,
  869. WM8990_VMID_MODE_MASK, 0x2);
  870. break;
  871. case SND_SOC_BIAS_STANDBY:
  872. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  873. ret = regcache_sync(wm8990->regmap);
  874. if (ret < 0) {
  875. dev_err(component->dev, "Failed to sync cache: %d\n", ret);
  876. return ret;
  877. }
  878. /* Enable all output discharge bits */
  879. snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
  880. WM8990_DIS_RLINE | WM8990_DIS_OUT3 |
  881. WM8990_DIS_OUT4 | WM8990_DIS_LOUT |
  882. WM8990_DIS_ROUT);
  883. /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
  884. snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
  885. WM8990_BUFDCOPEN | WM8990_POBCTRL |
  886. WM8990_VMIDTOG);
  887. /* Delay to allow output caps to discharge */
  888. msleep(300);
  889. /* Disable VMIDTOG */
  890. snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
  891. WM8990_BUFDCOPEN | WM8990_POBCTRL);
  892. /* disable all output discharge bits */
  893. snd_soc_component_write(component, WM8990_ANTIPOP1, 0);
  894. /* Enable outputs */
  895. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1b00);
  896. msleep(50);
  897. /* Enable VMID at 2x50k */
  898. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f02);
  899. msleep(100);
  900. /* Enable VREF */
  901. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03);
  902. msleep(600);
  903. /* Enable BUFIOEN */
  904. snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
  905. WM8990_BUFDCOPEN | WM8990_POBCTRL |
  906. WM8990_BUFIOEN);
  907. /* Disable outputs */
  908. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x3);
  909. /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
  910. snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_BUFIOEN);
  911. /* Enable workaround for ADC clocking issue. */
  912. snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0x2);
  913. snd_soc_component_write(component, WM8990_EXT_CTL1, 0xa003);
  914. snd_soc_component_write(component, WM8990_EXT_ACCESS_ENA, 0);
  915. }
  916. /* VMID=2*250k */
  917. snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_1,
  918. WM8990_VMID_MODE_MASK, 0x4);
  919. break;
  920. case SND_SOC_BIAS_OFF:
  921. /* Enable POBCTRL and SOFT_ST */
  922. snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
  923. WM8990_POBCTRL | WM8990_BUFIOEN);
  924. /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
  925. snd_soc_component_write(component, WM8990_ANTIPOP2, WM8990_SOFTST |
  926. WM8990_BUFDCOPEN | WM8990_POBCTRL |
  927. WM8990_BUFIOEN);
  928. /* mute DAC */
  929. snd_soc_component_update_bits(component, WM8990_DAC_CTRL,
  930. WM8990_DAC_MUTE, WM8990_DAC_MUTE);
  931. /* Enable any disabled outputs */
  932. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f03);
  933. /* Disable VMID */
  934. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x1f01);
  935. msleep(300);
  936. /* Enable all output discharge bits */
  937. snd_soc_component_write(component, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
  938. WM8990_DIS_RLINE | WM8990_DIS_OUT3 |
  939. WM8990_DIS_OUT4 | WM8990_DIS_LOUT |
  940. WM8990_DIS_ROUT);
  941. /* Disable VREF */
  942. snd_soc_component_write(component, WM8990_POWER_MANAGEMENT_1, 0x0);
  943. /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
  944. snd_soc_component_write(component, WM8990_ANTIPOP2, 0x0);
  945. regcache_mark_dirty(wm8990->regmap);
  946. break;
  947. }
  948. return 0;
  949. }
  950. #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  951. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
  952. SNDRV_PCM_RATE_48000)
  953. #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  954. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  955. /*
  956. * The WM8990 supports 2 different and mutually exclusive DAI
  957. * configurations.
  958. *
  959. * 1. ADC/DAC on Primary Interface
  960. * 2. ADC on Primary Interface/DAC on secondary
  961. */
  962. static const struct snd_soc_dai_ops wm8990_dai_ops = {
  963. .hw_params = wm8990_hw_params,
  964. .mute_stream = wm8990_mute,
  965. .set_fmt = wm8990_set_dai_fmt,
  966. .set_clkdiv = wm8990_set_dai_clkdiv,
  967. .set_pll = wm8990_set_dai_pll,
  968. .set_sysclk = wm8990_set_dai_sysclk,
  969. .no_capture_mute = 1,
  970. };
  971. static struct snd_soc_dai_driver wm8990_dai = {
  972. /* ADC/DAC on primary */
  973. .name = "wm8990-hifi",
  974. .playback = {
  975. .stream_name = "Playback",
  976. .channels_min = 1,
  977. .channels_max = 2,
  978. .rates = WM8990_RATES,
  979. .formats = WM8990_FORMATS,},
  980. .capture = {
  981. .stream_name = "Capture",
  982. .channels_min = 1,
  983. .channels_max = 2,
  984. .rates = WM8990_RATES,
  985. .formats = WM8990_FORMATS,},
  986. .ops = &wm8990_dai_ops,
  987. };
  988. /*
  989. * initialise the WM8990 driver
  990. * register the mixer and dsp interfaces with the kernel
  991. */
  992. static int wm8990_probe(struct snd_soc_component *component)
  993. {
  994. wm8990_reset(component);
  995. /* charge output caps */
  996. snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
  997. snd_soc_component_update_bits(component, WM8990_AUDIO_INTERFACE_4,
  998. WM8990_ALRCGPIO1, WM8990_ALRCGPIO1);
  999. snd_soc_component_update_bits(component, WM8990_GPIO1_GPIO2,
  1000. WM8990_GPIO1_SEL_MASK, 1);
  1001. snd_soc_component_update_bits(component, WM8990_POWER_MANAGEMENT_2,
  1002. WM8990_OPCLK_ENA, WM8990_OPCLK_ENA);
  1003. snd_soc_component_write(component, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8));
  1004. snd_soc_component_write(component, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8));
  1005. return 0;
  1006. }
  1007. static const struct snd_soc_component_driver soc_component_dev_wm8990 = {
  1008. .probe = wm8990_probe,
  1009. .set_bias_level = wm8990_set_bias_level,
  1010. .controls = wm8990_snd_controls,
  1011. .num_controls = ARRAY_SIZE(wm8990_snd_controls),
  1012. .dapm_widgets = wm8990_dapm_widgets,
  1013. .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets),
  1014. .dapm_routes = wm8990_dapm_routes,
  1015. .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes),
  1016. .suspend_bias_off = 1,
  1017. .idle_bias_on = 1,
  1018. .use_pmdown_time = 1,
  1019. .endianness = 1,
  1020. .non_legacy_dai_naming = 1,
  1021. };
  1022. static int wm8990_i2c_probe(struct i2c_client *i2c,
  1023. const struct i2c_device_id *id)
  1024. {
  1025. struct wm8990_priv *wm8990;
  1026. int ret;
  1027. wm8990 = devm_kzalloc(&i2c->dev, sizeof(struct wm8990_priv),
  1028. GFP_KERNEL);
  1029. if (wm8990 == NULL)
  1030. return -ENOMEM;
  1031. i2c_set_clientdata(i2c, wm8990);
  1032. ret = devm_snd_soc_register_component(&i2c->dev,
  1033. &soc_component_dev_wm8990, &wm8990_dai, 1);
  1034. return ret;
  1035. }
  1036. static const struct i2c_device_id wm8990_i2c_id[] = {
  1037. { "wm8990", 0 },
  1038. { }
  1039. };
  1040. MODULE_DEVICE_TABLE(i2c, wm8990_i2c_id);
  1041. static struct i2c_driver wm8990_i2c_driver = {
  1042. .driver = {
  1043. .name = "wm8990",
  1044. },
  1045. .probe = wm8990_i2c_probe,
  1046. .id_table = wm8990_i2c_id,
  1047. };
  1048. module_i2c_driver(wm8990_i2c_driver);
  1049. MODULE_DESCRIPTION("ASoC WM8990 driver");
  1050. MODULE_AUTHOR("Liam Girdwood");
  1051. MODULE_LICENSE("GPL");