wm8978.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * wm8978.h -- codec driver for WM8978
  4. *
  5. * Copyright 2009 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
  6. */
  7. #ifndef __WM8978_H__
  8. #define __WM8978_H__
  9. /*
  10. * Register values.
  11. */
  12. #define WM8978_RESET 0x00
  13. #define WM8978_POWER_MANAGEMENT_1 0x01
  14. #define WM8978_POWER_MANAGEMENT_2 0x02
  15. #define WM8978_POWER_MANAGEMENT_3 0x03
  16. #define WM8978_AUDIO_INTERFACE 0x04
  17. #define WM8978_COMPANDING_CONTROL 0x05
  18. #define WM8978_CLOCKING 0x06
  19. #define WM8978_ADDITIONAL_CONTROL 0x07
  20. #define WM8978_GPIO_CONTROL 0x08
  21. #define WM8978_JACK_DETECT_CONTROL_1 0x09
  22. #define WM8978_DAC_CONTROL 0x0A
  23. #define WM8978_LEFT_DAC_DIGITAL_VOLUME 0x0B
  24. #define WM8978_RIGHT_DAC_DIGITAL_VOLUME 0x0C
  25. #define WM8978_JACK_DETECT_CONTROL_2 0x0D
  26. #define WM8978_ADC_CONTROL 0x0E
  27. #define WM8978_LEFT_ADC_DIGITAL_VOLUME 0x0F
  28. #define WM8978_RIGHT_ADC_DIGITAL_VOLUME 0x10
  29. #define WM8978_EQ1 0x12
  30. #define WM8978_EQ2 0x13
  31. #define WM8978_EQ3 0x14
  32. #define WM8978_EQ4 0x15
  33. #define WM8978_EQ5 0x16
  34. #define WM8978_DAC_LIMITER_1 0x18
  35. #define WM8978_DAC_LIMITER_2 0x19
  36. #define WM8978_NOTCH_FILTER_1 0x1b
  37. #define WM8978_NOTCH_FILTER_2 0x1c
  38. #define WM8978_NOTCH_FILTER_3 0x1d
  39. #define WM8978_NOTCH_FILTER_4 0x1e
  40. #define WM8978_ALC_CONTROL_1 0x20
  41. #define WM8978_ALC_CONTROL_2 0x21
  42. #define WM8978_ALC_CONTROL_3 0x22
  43. #define WM8978_NOISE_GATE 0x23
  44. #define WM8978_PLL_N 0x24
  45. #define WM8978_PLL_K1 0x25
  46. #define WM8978_PLL_K2 0x26
  47. #define WM8978_PLL_K3 0x27
  48. #define WM8978_3D_CONTROL 0x29
  49. #define WM8978_BEEP_CONTROL 0x2b
  50. #define WM8978_INPUT_CONTROL 0x2c
  51. #define WM8978_LEFT_INP_PGA_CONTROL 0x2d
  52. #define WM8978_RIGHT_INP_PGA_CONTROL 0x2e
  53. #define WM8978_LEFT_ADC_BOOST_CONTROL 0x2f
  54. #define WM8978_RIGHT_ADC_BOOST_CONTROL 0x30
  55. #define WM8978_OUTPUT_CONTROL 0x31
  56. #define WM8978_LEFT_MIXER_CONTROL 0x32
  57. #define WM8978_RIGHT_MIXER_CONTROL 0x33
  58. #define WM8978_LOUT1_HP_CONTROL 0x34
  59. #define WM8978_ROUT1_HP_CONTROL 0x35
  60. #define WM8978_LOUT2_SPK_CONTROL 0x36
  61. #define WM8978_ROUT2_SPK_CONTROL 0x37
  62. #define WM8978_OUT3_MIXER_CONTROL 0x38
  63. #define WM8978_OUT4_MIXER_CONTROL 0x39
  64. #define WM8978_MAX_REGISTER 0x39
  65. #define WM8978_CACHEREGNUM 58
  66. /* Clock divider Id's */
  67. enum wm8978_clk_id {
  68. WM8978_OPCLKRATE,
  69. WM8978_BCLKDIV,
  70. };
  71. enum wm8978_sysclk_src {
  72. WM8978_MCLK = 0,
  73. WM8978_PLL,
  74. };
  75. #endif /* __WM8978_H__ */