wm8960.c 41 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8960.c -- WM8960 ALSA SoC Audio driver
  4. *
  5. * Copyright 2007-11 Wolfson Microelectronics, plc
  6. *
  7. * Author: Liam Girdwood
  8. */
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/clk.h>
  15. #include <linux/i2c.h>
  16. #include <linux/slab.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <sound/initval.h>
  22. #include <sound/tlv.h>
  23. #include <sound/wm8960.h>
  24. #include "wm8960.h"
  25. /* R25 - Power 1 */
  26. #define WM8960_VMID_MASK 0x180
  27. #define WM8960_VREF 0x40
  28. /* R26 - Power 2 */
  29. #define WM8960_PWR2_LOUT1 0x40
  30. #define WM8960_PWR2_ROUT1 0x20
  31. #define WM8960_PWR2_OUT3 0x02
  32. /* R28 - Anti-pop 1 */
  33. #define WM8960_POBCTRL 0x80
  34. #define WM8960_BUFDCOPEN 0x10
  35. #define WM8960_BUFIOEN 0x08
  36. #define WM8960_SOFT_ST 0x04
  37. #define WM8960_HPSTBY 0x01
  38. /* R29 - Anti-pop 2 */
  39. #define WM8960_DISOP 0x40
  40. #define WM8960_DRES_MASK 0x30
  41. static bool is_pll_freq_available(unsigned int source, unsigned int target);
  42. static int wm8960_set_pll(struct snd_soc_component *component,
  43. unsigned int freq_in, unsigned int freq_out);
  44. /*
  45. * wm8960 register cache
  46. * We can't read the WM8960 register space when we are
  47. * using 2 wire for device control, so we cache them instead.
  48. */
  49. static const struct reg_default wm8960_reg_defaults[] = {
  50. { 0x0, 0x00a7 },
  51. { 0x1, 0x00a7 },
  52. { 0x2, 0x0000 },
  53. { 0x3, 0x0000 },
  54. { 0x4, 0x0000 },
  55. { 0x5, 0x0008 },
  56. { 0x6, 0x0000 },
  57. { 0x7, 0x000a },
  58. { 0x8, 0x01c0 },
  59. { 0x9, 0x0000 },
  60. { 0xa, 0x00ff },
  61. { 0xb, 0x00ff },
  62. { 0x10, 0x0000 },
  63. { 0x11, 0x007b },
  64. { 0x12, 0x0100 },
  65. { 0x13, 0x0032 },
  66. { 0x14, 0x0000 },
  67. { 0x15, 0x00c3 },
  68. { 0x16, 0x00c3 },
  69. { 0x17, 0x01c0 },
  70. { 0x18, 0x0000 },
  71. { 0x19, 0x0000 },
  72. { 0x1a, 0x0000 },
  73. { 0x1b, 0x0000 },
  74. { 0x1c, 0x0000 },
  75. { 0x1d, 0x0000 },
  76. { 0x20, 0x0100 },
  77. { 0x21, 0x0100 },
  78. { 0x22, 0x0050 },
  79. { 0x25, 0x0050 },
  80. { 0x26, 0x0000 },
  81. { 0x27, 0x0000 },
  82. { 0x28, 0x0000 },
  83. { 0x29, 0x0000 },
  84. { 0x2a, 0x0040 },
  85. { 0x2b, 0x0000 },
  86. { 0x2c, 0x0000 },
  87. { 0x2d, 0x0050 },
  88. { 0x2e, 0x0050 },
  89. { 0x2f, 0x0000 },
  90. { 0x30, 0x0002 },
  91. { 0x31, 0x0037 },
  92. { 0x33, 0x0080 },
  93. { 0x34, 0x0008 },
  94. { 0x35, 0x0031 },
  95. { 0x36, 0x0026 },
  96. { 0x37, 0x00e9 },
  97. };
  98. static bool wm8960_volatile(struct device *dev, unsigned int reg)
  99. {
  100. switch (reg) {
  101. case WM8960_RESET:
  102. return true;
  103. default:
  104. return false;
  105. }
  106. }
  107. struct wm8960_priv {
  108. struct clk *mclk;
  109. struct regmap *regmap;
  110. int (*set_bias_level)(struct snd_soc_component *,
  111. enum snd_soc_bias_level level);
  112. struct snd_soc_dapm_widget *lout1;
  113. struct snd_soc_dapm_widget *rout1;
  114. struct snd_soc_dapm_widget *out3;
  115. bool deemph;
  116. int lrclk;
  117. int bclk;
  118. int sysclk;
  119. int clk_id;
  120. int freq_in;
  121. bool is_stream_in_use[2];
  122. struct wm8960_data pdata;
  123. };
  124. #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
  125. /* enumerated controls */
  126. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  127. "Right Inverted", "Stereo Inversion"};
  128. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  129. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  130. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  131. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  132. static const char *wm8960_adc_data_output_sel[] = {
  133. "Left Data = Left ADC; Right Data = Right ADC",
  134. "Left Data = Left ADC; Right Data = Left ADC",
  135. "Left Data = Right ADC; Right Data = Right ADC",
  136. "Left Data = Right ADC; Right Data = Left ADC",
  137. };
  138. static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
  139. static const struct soc_enum wm8960_enum[] = {
  140. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  141. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  142. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  143. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  144. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  145. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  146. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
  147. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
  148. };
  149. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  150. static int wm8960_set_deemph(struct snd_soc_component *component)
  151. {
  152. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  153. int val, i, best;
  154. /* If we're using deemphasis select the nearest available sample
  155. * rate.
  156. */
  157. if (wm8960->deemph) {
  158. best = 1;
  159. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  160. if (abs(deemph_settings[i] - wm8960->lrclk) <
  161. abs(deemph_settings[best] - wm8960->lrclk))
  162. best = i;
  163. }
  164. val = best << 1;
  165. } else {
  166. val = 0;
  167. }
  168. dev_dbg(component->dev, "Set deemphasis %d\n", val);
  169. return snd_soc_component_update_bits(component, WM8960_DACCTL1,
  170. 0x6, val);
  171. }
  172. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  173. struct snd_ctl_elem_value *ucontrol)
  174. {
  175. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  176. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  177. ucontrol->value.integer.value[0] = wm8960->deemph;
  178. return 0;
  179. }
  180. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  181. struct snd_ctl_elem_value *ucontrol)
  182. {
  183. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  184. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  185. unsigned int deemph = ucontrol->value.integer.value[0];
  186. if (deemph > 1)
  187. return -EINVAL;
  188. wm8960->deemph = deemph;
  189. return wm8960_set_deemph(component);
  190. }
  191. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  192. static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
  193. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  194. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  195. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  196. static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
  197. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
  198. 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
  199. 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
  200. );
  201. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  202. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  203. 0, 63, 0, inpga_tlv),
  204. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  205. 6, 1, 0),
  206. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  207. 7, 1, 1),
  208. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
  209. WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
  210. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
  211. WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
  212. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
  213. WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
  214. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
  215. WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
  216. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
  217. WM8960_RINPATH, 4, 3, 0, micboost_tlv),
  218. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
  219. WM8960_LINPATH, 4, 3, 0, micboost_tlv),
  220. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  221. 0, 255, 0, dac_tlv),
  222. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  223. 0, 127, 0, out_tlv),
  224. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  225. 7, 1, 0),
  226. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  227. 0, 127, 0, out_tlv),
  228. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  229. 7, 1, 0),
  230. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  231. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  232. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  233. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  234. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  235. SOC_ENUM("DAC Polarity", wm8960_enum[1]),
  236. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  237. wm8960_get_deemph, wm8960_put_deemph),
  238. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  239. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  240. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  241. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  242. SOC_ENUM("ALC Function", wm8960_enum[4]),
  243. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  244. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  245. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  246. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  247. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  248. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  249. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  250. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  251. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  252. SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
  253. 0, 255, 0, adc_tlv),
  254. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  255. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  256. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  257. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  258. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  259. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  260. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  261. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  262. SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
  263. SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
  264. };
  265. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  266. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  267. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  268. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  269. };
  270. static const struct snd_kcontrol_new wm8960_lin[] = {
  271. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  272. };
  273. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  274. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  275. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  276. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  277. };
  278. static const struct snd_kcontrol_new wm8960_rin[] = {
  279. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  280. };
  281. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  282. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  283. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  284. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  285. };
  286. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  287. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  288. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  289. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  290. };
  291. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  292. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  293. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  294. };
  295. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  296. SND_SOC_DAPM_INPUT("LINPUT1"),
  297. SND_SOC_DAPM_INPUT("RINPUT1"),
  298. SND_SOC_DAPM_INPUT("LINPUT2"),
  299. SND_SOC_DAPM_INPUT("RINPUT2"),
  300. SND_SOC_DAPM_INPUT("LINPUT3"),
  301. SND_SOC_DAPM_INPUT("RINPUT3"),
  302. SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
  303. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  304. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  305. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  306. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  307. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  308. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  309. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  310. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  311. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
  312. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
  313. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  314. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  315. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  316. &wm8960_loutput_mixer[0],
  317. ARRAY_SIZE(wm8960_loutput_mixer)),
  318. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  319. &wm8960_routput_mixer[0],
  320. ARRAY_SIZE(wm8960_routput_mixer)),
  321. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  322. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  323. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  324. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  325. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  326. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  327. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  328. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  329. SND_SOC_DAPM_OUTPUT("HP_L"),
  330. SND_SOC_DAPM_OUTPUT("HP_R"),
  331. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  332. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  333. SND_SOC_DAPM_OUTPUT("OUT3"),
  334. };
  335. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  336. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  337. &wm8960_mono_out[0],
  338. ARRAY_SIZE(wm8960_mono_out)),
  339. };
  340. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  341. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  342. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  343. };
  344. static const struct snd_soc_dapm_route audio_paths[] = {
  345. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  346. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  347. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  348. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
  349. { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
  350. { "Left Input Mixer", NULL, "LINPUT2" },
  351. { "Left Input Mixer", NULL, "LINPUT3" },
  352. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  353. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  354. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  355. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
  356. { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
  357. { "Right Input Mixer", NULL, "RINPUT2" },
  358. { "Right Input Mixer", NULL, "RINPUT3" },
  359. { "Left ADC", NULL, "Left Input Mixer" },
  360. { "Right ADC", NULL, "Right Input Mixer" },
  361. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  362. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
  363. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  364. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  365. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
  366. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  367. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  368. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  369. { "HP_L", NULL, "LOUT1 PGA" },
  370. { "HP_R", NULL, "ROUT1 PGA" },
  371. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  372. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  373. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  374. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  375. { "SPK_LN", NULL, "Left Speaker Output" },
  376. { "SPK_LP", NULL, "Left Speaker Output" },
  377. { "SPK_RN", NULL, "Right Speaker Output" },
  378. { "SPK_RP", NULL, "Right Speaker Output" },
  379. };
  380. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  381. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  382. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  383. { "OUT3", NULL, "Mono Output Mixer", }
  384. };
  385. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  386. { "HP_L", NULL, "OUT3 VMID" },
  387. { "HP_R", NULL, "OUT3 VMID" },
  388. { "OUT3 VMID", NULL, "Left Output Mixer" },
  389. { "OUT3 VMID", NULL, "Right Output Mixer" },
  390. };
  391. static int wm8960_add_widgets(struct snd_soc_component *component)
  392. {
  393. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  394. struct wm8960_data *pdata = &wm8960->pdata;
  395. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  396. struct snd_soc_dapm_widget *w;
  397. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  398. ARRAY_SIZE(wm8960_dapm_widgets));
  399. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  400. /* In capless mode OUT3 is used to provide VMID for the
  401. * headphone outputs, otherwise it is used as a mono mixer.
  402. */
  403. if (pdata && pdata->capless) {
  404. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  405. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  406. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  407. ARRAY_SIZE(audio_paths_capless));
  408. } else {
  409. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  410. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  411. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  412. ARRAY_SIZE(audio_paths_out3));
  413. }
  414. /* We need to power up the headphone output stage out of
  415. * sequence for capless mode. To save scanning the widget
  416. * list each time to find the desired power state do so now
  417. * and save the result.
  418. */
  419. list_for_each_entry(w, &component->card->widgets, list) {
  420. if (w->dapm != dapm)
  421. continue;
  422. if (strcmp(w->name, "LOUT1 PGA") == 0)
  423. wm8960->lout1 = w;
  424. if (strcmp(w->name, "ROUT1 PGA") == 0)
  425. wm8960->rout1 = w;
  426. if (strcmp(w->name, "OUT3 VMID") == 0)
  427. wm8960->out3 = w;
  428. }
  429. return 0;
  430. }
  431. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  432. unsigned int fmt)
  433. {
  434. struct snd_soc_component *component = codec_dai->component;
  435. u16 iface = 0;
  436. /* set master/slave audio interface */
  437. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  438. case SND_SOC_DAIFMT_CBM_CFM:
  439. iface |= 0x0040;
  440. break;
  441. case SND_SOC_DAIFMT_CBS_CFS:
  442. break;
  443. default:
  444. return -EINVAL;
  445. }
  446. /* interface format */
  447. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  448. case SND_SOC_DAIFMT_I2S:
  449. iface |= 0x0002;
  450. break;
  451. case SND_SOC_DAIFMT_RIGHT_J:
  452. break;
  453. case SND_SOC_DAIFMT_LEFT_J:
  454. iface |= 0x0001;
  455. break;
  456. case SND_SOC_DAIFMT_DSP_A:
  457. iface |= 0x0003;
  458. break;
  459. case SND_SOC_DAIFMT_DSP_B:
  460. iface |= 0x0013;
  461. break;
  462. default:
  463. return -EINVAL;
  464. }
  465. /* clock inversion */
  466. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  467. case SND_SOC_DAIFMT_NB_NF:
  468. break;
  469. case SND_SOC_DAIFMT_IB_IF:
  470. iface |= 0x0090;
  471. break;
  472. case SND_SOC_DAIFMT_IB_NF:
  473. iface |= 0x0080;
  474. break;
  475. case SND_SOC_DAIFMT_NB_IF:
  476. iface |= 0x0010;
  477. break;
  478. default:
  479. return -EINVAL;
  480. }
  481. /* set iface */
  482. snd_soc_component_write(component, WM8960_IFACE1, iface);
  483. return 0;
  484. }
  485. static struct {
  486. int rate;
  487. unsigned int val;
  488. } alc_rates[] = {
  489. { 48000, 0 },
  490. { 44100, 0 },
  491. { 32000, 1 },
  492. { 22050, 2 },
  493. { 24000, 2 },
  494. { 16000, 3 },
  495. { 11025, 4 },
  496. { 12000, 4 },
  497. { 8000, 5 },
  498. };
  499. /* -1 for reserved value */
  500. static const int sysclk_divs[] = { 1, -1, 2, -1 };
  501. /* Multiply 256 for internal 256 div */
  502. static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
  503. /* Multiply 10 to eliminate decimials */
  504. static const int bclk_divs[] = {
  505. 10, 15, 20, 30, 40, 55, 60, 80, 110,
  506. 120, 160, 220, 240, 320, 320, 320
  507. };
  508. /**
  509. * wm8960_configure_sysclk - checks if there is a sysclk frequency available
  510. * The sysclk must be chosen such that:
  511. * - sysclk = MCLK / sysclk_divs
  512. * - lrclk = sysclk / dac_divs
  513. * - 10 * bclk = sysclk / bclk_divs
  514. *
  515. * @wm8960: codec private data
  516. * @mclk: MCLK used to derive sysclk
  517. * @sysclk_idx: sysclk_divs index for found sysclk
  518. * @dac_idx: dac_divs index for found lrclk
  519. * @bclk_idx: bclk_divs index for found bclk
  520. *
  521. * Returns:
  522. * -1, in case no sysclk frequency available found
  523. * >=0, in case we could derive bclk and lrclk from sysclk using
  524. * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
  525. */
  526. static
  527. int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
  528. int *sysclk_idx, int *dac_idx, int *bclk_idx)
  529. {
  530. int sysclk, bclk, lrclk;
  531. int i, j, k;
  532. int diff;
  533. /* marker for no match */
  534. *bclk_idx = -1;
  535. bclk = wm8960->bclk;
  536. lrclk = wm8960->lrclk;
  537. /* check if the sysclk frequency is available. */
  538. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  539. if (sysclk_divs[i] == -1)
  540. continue;
  541. sysclk = mclk / sysclk_divs[i];
  542. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  543. if (sysclk != dac_divs[j] * lrclk)
  544. continue;
  545. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  546. diff = sysclk - bclk * bclk_divs[k] / 10;
  547. if (diff == 0) {
  548. *sysclk_idx = i;
  549. *dac_idx = j;
  550. *bclk_idx = k;
  551. break;
  552. }
  553. }
  554. if (k != ARRAY_SIZE(bclk_divs))
  555. break;
  556. }
  557. if (j != ARRAY_SIZE(dac_divs))
  558. break;
  559. }
  560. return *bclk_idx;
  561. }
  562. /**
  563. * wm8960_configure_pll - checks if there is a PLL out frequency available
  564. * The PLL out frequency must be chosen such that:
  565. * - sysclk = lrclk * dac_divs
  566. * - freq_out = sysclk * sysclk_divs
  567. * - 10 * sysclk = bclk * bclk_divs
  568. *
  569. * If we cannot find an exact match for (sysclk, lrclk, bclk)
  570. * triplet, we relax the bclk such that bclk is chosen as the
  571. * closest available frequency greater than expected bclk.
  572. *
  573. * @component: component structure
  574. * @freq_in: input frequency used to derive freq out via PLL
  575. * @sysclk_idx: sysclk_divs index for found sysclk
  576. * @dac_idx: dac_divs index for found lrclk
  577. * @bclk_idx: bclk_divs index for found bclk
  578. *
  579. * Returns:
  580. * < 0, in case no PLL frequency out available was found
  581. * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
  582. * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
  583. */
  584. static
  585. int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
  586. int *sysclk_idx, int *dac_idx, int *bclk_idx)
  587. {
  588. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  589. int sysclk, bclk, lrclk, freq_out;
  590. int diff, closest, best_freq_out;
  591. int i, j, k;
  592. bclk = wm8960->bclk;
  593. lrclk = wm8960->lrclk;
  594. closest = freq_in;
  595. best_freq_out = -EINVAL;
  596. *sysclk_idx = *dac_idx = *bclk_idx = -1;
  597. /*
  598. * From Datasheet, the PLL performs best when f2 is between
  599. * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
  600. * or 12.288MHz, then sysclkdiv = 2 is the best choice.
  601. * So search sysclk_divs from 2 to 1 other than from 1 to 2.
  602. */
  603. for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
  604. if (sysclk_divs[i] == -1)
  605. continue;
  606. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  607. sysclk = lrclk * dac_divs[j];
  608. freq_out = sysclk * sysclk_divs[i];
  609. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  610. if (!is_pll_freq_available(freq_in, freq_out))
  611. continue;
  612. diff = sysclk - bclk * bclk_divs[k] / 10;
  613. if (diff == 0) {
  614. *sysclk_idx = i;
  615. *dac_idx = j;
  616. *bclk_idx = k;
  617. return freq_out;
  618. }
  619. if (diff > 0 && closest > diff) {
  620. *sysclk_idx = i;
  621. *dac_idx = j;
  622. *bclk_idx = k;
  623. closest = diff;
  624. best_freq_out = freq_out;
  625. }
  626. }
  627. }
  628. }
  629. return best_freq_out;
  630. }
  631. static int wm8960_configure_clocking(struct snd_soc_component *component)
  632. {
  633. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  634. int freq_out, freq_in;
  635. u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1);
  636. int i, j, k;
  637. int ret;
  638. /*
  639. * For Slave mode clocking should still be configured,
  640. * so this if statement should be removed, but some platform
  641. * may not work if the sysclk is not configured, to avoid such
  642. * compatible issue, just add '!wm8960->sysclk' condition in
  643. * this if statement.
  644. */
  645. if (!(iface1 & (1 << 6)) && !wm8960->sysclk) {
  646. dev_warn(component->dev,
  647. "slave mode, but proceeding with no clock configuration\n");
  648. return 0;
  649. }
  650. if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
  651. dev_err(component->dev, "No MCLK configured\n");
  652. return -EINVAL;
  653. }
  654. freq_in = wm8960->freq_in;
  655. /*
  656. * If it's sysclk auto mode, check if the MCLK can provide sysclk or
  657. * not. If MCLK can provide sysclk, using MCLK to provide sysclk
  658. * directly. Otherwise, auto select a available pll out frequency
  659. * and set PLL.
  660. */
  661. if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
  662. /* disable the PLL and using MCLK to provide sysclk */
  663. wm8960_set_pll(component, 0, 0);
  664. freq_out = freq_in;
  665. } else if (wm8960->sysclk) {
  666. freq_out = wm8960->sysclk;
  667. } else {
  668. dev_err(component->dev, "No SYSCLK configured\n");
  669. return -EINVAL;
  670. }
  671. if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
  672. ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
  673. if (ret >= 0) {
  674. goto configure_clock;
  675. } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
  676. dev_err(component->dev, "failed to configure clock\n");
  677. return -EINVAL;
  678. }
  679. }
  680. freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
  681. if (freq_out < 0) {
  682. dev_err(component->dev, "failed to configure clock via PLL\n");
  683. return freq_out;
  684. }
  685. wm8960_set_pll(component, freq_in, freq_out);
  686. configure_clock:
  687. /* configure sysclk clock */
  688. snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
  689. /* configure frame clock */
  690. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
  691. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
  692. /* configure bit clock */
  693. snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
  694. return 0;
  695. }
  696. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  697. struct snd_pcm_hw_params *params,
  698. struct snd_soc_dai *dai)
  699. {
  700. struct snd_soc_component *component = dai->component;
  701. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  702. u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3;
  703. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  704. int i;
  705. wm8960->bclk = snd_soc_params_to_bclk(params);
  706. if (params_channels(params) == 1)
  707. wm8960->bclk *= 2;
  708. /* bit size */
  709. switch (params_width(params)) {
  710. case 16:
  711. break;
  712. case 20:
  713. iface |= 0x0004;
  714. break;
  715. case 24:
  716. iface |= 0x0008;
  717. break;
  718. case 32:
  719. /* right justify mode does not support 32 word length */
  720. if ((iface & 0x3) != 0) {
  721. iface |= 0x000c;
  722. break;
  723. }
  724. fallthrough;
  725. default:
  726. dev_err(component->dev, "unsupported width %d\n",
  727. params_width(params));
  728. return -EINVAL;
  729. }
  730. wm8960->lrclk = params_rate(params);
  731. /* Update filters for the new rate */
  732. if (tx) {
  733. wm8960_set_deemph(component);
  734. } else {
  735. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  736. if (alc_rates[i].rate == params_rate(params))
  737. snd_soc_component_update_bits(component,
  738. WM8960_ADDCTL3, 0x7,
  739. alc_rates[i].val);
  740. }
  741. /* set iface */
  742. snd_soc_component_write(component, WM8960_IFACE1, iface);
  743. wm8960->is_stream_in_use[tx] = true;
  744. if (!wm8960->is_stream_in_use[!tx])
  745. return wm8960_configure_clocking(component);
  746. return 0;
  747. }
  748. static int wm8960_hw_free(struct snd_pcm_substream *substream,
  749. struct snd_soc_dai *dai)
  750. {
  751. struct snd_soc_component *component = dai->component;
  752. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  753. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  754. wm8960->is_stream_in_use[tx] = false;
  755. return 0;
  756. }
  757. static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
  758. {
  759. struct snd_soc_component *component = dai->component;
  760. if (mute)
  761. snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
  762. else
  763. snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
  764. return 0;
  765. }
  766. static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
  767. enum snd_soc_bias_level level)
  768. {
  769. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  770. u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
  771. int ret;
  772. switch (level) {
  773. case SND_SOC_BIAS_ON:
  774. break;
  775. case SND_SOC_BIAS_PREPARE:
  776. switch (snd_soc_component_get_bias_level(component)) {
  777. case SND_SOC_BIAS_STANDBY:
  778. if (!IS_ERR(wm8960->mclk)) {
  779. ret = clk_prepare_enable(wm8960->mclk);
  780. if (ret) {
  781. dev_err(component->dev,
  782. "Failed to enable MCLK: %d\n",
  783. ret);
  784. return ret;
  785. }
  786. }
  787. ret = wm8960_configure_clocking(component);
  788. if (ret)
  789. return ret;
  790. /* Set VMID to 2x50k */
  791. snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
  792. break;
  793. case SND_SOC_BIAS_ON:
  794. /*
  795. * If it's sysclk auto mode, and the pll is enabled,
  796. * disable the pll
  797. */
  798. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  799. wm8960_set_pll(component, 0, 0);
  800. if (!IS_ERR(wm8960->mclk))
  801. clk_disable_unprepare(wm8960->mclk);
  802. break;
  803. default:
  804. break;
  805. }
  806. break;
  807. case SND_SOC_BIAS_STANDBY:
  808. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  809. regcache_sync(wm8960->regmap);
  810. /* Enable anti-pop features */
  811. snd_soc_component_write(component, WM8960_APOP1,
  812. WM8960_POBCTRL | WM8960_SOFT_ST |
  813. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  814. /* Enable & ramp VMID at 2x50k */
  815. snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
  816. msleep(100);
  817. /* Enable VREF */
  818. snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
  819. WM8960_VREF);
  820. /* Disable anti-pop features */
  821. snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
  822. }
  823. /* Set VMID to 2x250k */
  824. snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
  825. break;
  826. case SND_SOC_BIAS_OFF:
  827. /* Enable anti-pop features */
  828. snd_soc_component_write(component, WM8960_APOP1,
  829. WM8960_POBCTRL | WM8960_SOFT_ST |
  830. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  831. /* Disable VMID and VREF, let them discharge */
  832. snd_soc_component_write(component, WM8960_POWER1, 0);
  833. msleep(600);
  834. break;
  835. }
  836. return 0;
  837. }
  838. static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
  839. enum snd_soc_bias_level level)
  840. {
  841. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  842. u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
  843. int reg, ret;
  844. switch (level) {
  845. case SND_SOC_BIAS_ON:
  846. break;
  847. case SND_SOC_BIAS_PREPARE:
  848. switch (snd_soc_component_get_bias_level(component)) {
  849. case SND_SOC_BIAS_STANDBY:
  850. /* Enable anti pop mode */
  851. snd_soc_component_update_bits(component, WM8960_APOP1,
  852. WM8960_POBCTRL | WM8960_SOFT_ST |
  853. WM8960_BUFDCOPEN,
  854. WM8960_POBCTRL | WM8960_SOFT_ST |
  855. WM8960_BUFDCOPEN);
  856. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  857. reg = 0;
  858. if (wm8960->lout1 && wm8960->lout1->power)
  859. reg |= WM8960_PWR2_LOUT1;
  860. if (wm8960->rout1 && wm8960->rout1->power)
  861. reg |= WM8960_PWR2_ROUT1;
  862. if (wm8960->out3 && wm8960->out3->power)
  863. reg |= WM8960_PWR2_OUT3;
  864. snd_soc_component_update_bits(component, WM8960_POWER2,
  865. WM8960_PWR2_LOUT1 |
  866. WM8960_PWR2_ROUT1 |
  867. WM8960_PWR2_OUT3, reg);
  868. /* Enable VMID at 2*50k */
  869. snd_soc_component_update_bits(component, WM8960_POWER1,
  870. WM8960_VMID_MASK, 0x80);
  871. /* Ramp */
  872. msleep(100);
  873. /* Enable VREF */
  874. snd_soc_component_update_bits(component, WM8960_POWER1,
  875. WM8960_VREF, WM8960_VREF);
  876. msleep(100);
  877. if (!IS_ERR(wm8960->mclk)) {
  878. ret = clk_prepare_enable(wm8960->mclk);
  879. if (ret) {
  880. dev_err(component->dev,
  881. "Failed to enable MCLK: %d\n",
  882. ret);
  883. return ret;
  884. }
  885. }
  886. ret = wm8960_configure_clocking(component);
  887. if (ret)
  888. return ret;
  889. break;
  890. case SND_SOC_BIAS_ON:
  891. /*
  892. * If it's sysclk auto mode, and the pll is enabled,
  893. * disable the pll
  894. */
  895. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  896. wm8960_set_pll(component, 0, 0);
  897. if (!IS_ERR(wm8960->mclk))
  898. clk_disable_unprepare(wm8960->mclk);
  899. /* Enable anti-pop mode */
  900. snd_soc_component_update_bits(component, WM8960_APOP1,
  901. WM8960_POBCTRL | WM8960_SOFT_ST |
  902. WM8960_BUFDCOPEN,
  903. WM8960_POBCTRL | WM8960_SOFT_ST |
  904. WM8960_BUFDCOPEN);
  905. /* Disable VMID and VREF */
  906. snd_soc_component_update_bits(component, WM8960_POWER1,
  907. WM8960_VREF | WM8960_VMID_MASK, 0);
  908. break;
  909. case SND_SOC_BIAS_OFF:
  910. regcache_sync(wm8960->regmap);
  911. break;
  912. default:
  913. break;
  914. }
  915. break;
  916. case SND_SOC_BIAS_STANDBY:
  917. switch (snd_soc_component_get_bias_level(component)) {
  918. case SND_SOC_BIAS_PREPARE:
  919. /* Disable HP discharge */
  920. snd_soc_component_update_bits(component, WM8960_APOP2,
  921. WM8960_DISOP | WM8960_DRES_MASK,
  922. 0);
  923. /* Disable anti-pop features */
  924. snd_soc_component_update_bits(component, WM8960_APOP1,
  925. WM8960_POBCTRL | WM8960_SOFT_ST |
  926. WM8960_BUFDCOPEN,
  927. WM8960_POBCTRL | WM8960_SOFT_ST |
  928. WM8960_BUFDCOPEN);
  929. break;
  930. default:
  931. break;
  932. }
  933. break;
  934. case SND_SOC_BIAS_OFF:
  935. break;
  936. }
  937. return 0;
  938. }
  939. /* PLL divisors */
  940. struct _pll_div {
  941. u32 pre_div:1;
  942. u32 n:4;
  943. u32 k:24;
  944. };
  945. static bool is_pll_freq_available(unsigned int source, unsigned int target)
  946. {
  947. unsigned int Ndiv;
  948. if (source == 0 || target == 0)
  949. return false;
  950. /* Scale up target to PLL operating frequency */
  951. target *= 4;
  952. Ndiv = target / source;
  953. if (Ndiv < 6) {
  954. source >>= 1;
  955. Ndiv = target / source;
  956. }
  957. if ((Ndiv < 6) || (Ndiv > 12))
  958. return false;
  959. return true;
  960. }
  961. /* The size in bits of the pll divide multiplied by 10
  962. * to allow rounding later */
  963. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  964. static int pll_factors(unsigned int source, unsigned int target,
  965. struct _pll_div *pll_div)
  966. {
  967. unsigned long long Kpart;
  968. unsigned int K, Ndiv, Nmod;
  969. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  970. /* Scale up target to PLL operating frequency */
  971. target *= 4;
  972. Ndiv = target / source;
  973. if (Ndiv < 6) {
  974. source >>= 1;
  975. pll_div->pre_div = 1;
  976. Ndiv = target / source;
  977. } else
  978. pll_div->pre_div = 0;
  979. if ((Ndiv < 6) || (Ndiv > 12)) {
  980. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  981. return -EINVAL;
  982. }
  983. pll_div->n = Ndiv;
  984. Nmod = target % source;
  985. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  986. do_div(Kpart, source);
  987. K = Kpart & 0xFFFFFFFF;
  988. /* Check if we need to round */
  989. if ((K % 10) >= 5)
  990. K += 5;
  991. /* Move down to proper range now rounding is done */
  992. K /= 10;
  993. pll_div->k = K;
  994. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  995. pll_div->n, pll_div->k, pll_div->pre_div);
  996. return 0;
  997. }
  998. static int wm8960_set_pll(struct snd_soc_component *component,
  999. unsigned int freq_in, unsigned int freq_out)
  1000. {
  1001. u16 reg;
  1002. static struct _pll_div pll_div;
  1003. int ret;
  1004. if (freq_in && freq_out) {
  1005. ret = pll_factors(freq_in, freq_out, &pll_div);
  1006. if (ret != 0)
  1007. return ret;
  1008. }
  1009. /* Disable the PLL: even if we are changing the frequency the
  1010. * PLL needs to be disabled while we do so. */
  1011. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
  1012. snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
  1013. if (!freq_in || !freq_out)
  1014. return 0;
  1015. reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f;
  1016. reg |= pll_div.pre_div << 4;
  1017. reg |= pll_div.n;
  1018. if (pll_div.k) {
  1019. reg |= 0x20;
  1020. snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
  1021. snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
  1022. snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
  1023. }
  1024. snd_soc_component_write(component, WM8960_PLL1, reg);
  1025. /* Turn it on */
  1026. snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
  1027. msleep(250);
  1028. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
  1029. return 0;
  1030. }
  1031. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  1032. int source, unsigned int freq_in, unsigned int freq_out)
  1033. {
  1034. struct snd_soc_component *component = codec_dai->component;
  1035. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1036. wm8960->freq_in = freq_in;
  1037. if (pll_id == WM8960_SYSCLK_AUTO)
  1038. return 0;
  1039. return wm8960_set_pll(component, freq_in, freq_out);
  1040. }
  1041. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  1042. int div_id, int div)
  1043. {
  1044. struct snd_soc_component *component = codec_dai->component;
  1045. u16 reg;
  1046. switch (div_id) {
  1047. case WM8960_SYSCLKDIV:
  1048. reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9;
  1049. snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
  1050. break;
  1051. case WM8960_DACDIV:
  1052. reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7;
  1053. snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
  1054. break;
  1055. case WM8960_OPCLKDIV:
  1056. reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f;
  1057. snd_soc_component_write(component, WM8960_PLL1, reg | div);
  1058. break;
  1059. case WM8960_DCLKDIV:
  1060. reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f;
  1061. snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
  1062. break;
  1063. case WM8960_TOCLKSEL:
  1064. reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd;
  1065. snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
  1066. break;
  1067. default:
  1068. return -EINVAL;
  1069. }
  1070. return 0;
  1071. }
  1072. static int wm8960_set_bias_level(struct snd_soc_component *component,
  1073. enum snd_soc_bias_level level)
  1074. {
  1075. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1076. return wm8960->set_bias_level(component, level);
  1077. }
  1078. static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  1079. unsigned int freq, int dir)
  1080. {
  1081. struct snd_soc_component *component = dai->component;
  1082. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1083. switch (clk_id) {
  1084. case WM8960_SYSCLK_MCLK:
  1085. snd_soc_component_update_bits(component, WM8960_CLOCK1,
  1086. 0x1, WM8960_SYSCLK_MCLK);
  1087. break;
  1088. case WM8960_SYSCLK_PLL:
  1089. snd_soc_component_update_bits(component, WM8960_CLOCK1,
  1090. 0x1, WM8960_SYSCLK_PLL);
  1091. break;
  1092. case WM8960_SYSCLK_AUTO:
  1093. break;
  1094. default:
  1095. return -EINVAL;
  1096. }
  1097. wm8960->sysclk = freq;
  1098. wm8960->clk_id = clk_id;
  1099. return 0;
  1100. }
  1101. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  1102. #define WM8960_FORMATS \
  1103. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1104. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1105. static const struct snd_soc_dai_ops wm8960_dai_ops = {
  1106. .hw_params = wm8960_hw_params,
  1107. .hw_free = wm8960_hw_free,
  1108. .mute_stream = wm8960_mute,
  1109. .set_fmt = wm8960_set_dai_fmt,
  1110. .set_clkdiv = wm8960_set_dai_clkdiv,
  1111. .set_pll = wm8960_set_dai_pll,
  1112. .set_sysclk = wm8960_set_dai_sysclk,
  1113. .no_capture_mute = 1,
  1114. };
  1115. static struct snd_soc_dai_driver wm8960_dai = {
  1116. .name = "wm8960-hifi",
  1117. .playback = {
  1118. .stream_name = "Playback",
  1119. .channels_min = 1,
  1120. .channels_max = 2,
  1121. .rates = WM8960_RATES,
  1122. .formats = WM8960_FORMATS,},
  1123. .capture = {
  1124. .stream_name = "Capture",
  1125. .channels_min = 1,
  1126. .channels_max = 2,
  1127. .rates = WM8960_RATES,
  1128. .formats = WM8960_FORMATS,},
  1129. .ops = &wm8960_dai_ops,
  1130. .symmetric_rates = 1,
  1131. };
  1132. static int wm8960_probe(struct snd_soc_component *component)
  1133. {
  1134. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1135. struct wm8960_data *pdata = &wm8960->pdata;
  1136. if (pdata->capless)
  1137. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  1138. else
  1139. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  1140. snd_soc_add_component_controls(component, wm8960_snd_controls,
  1141. ARRAY_SIZE(wm8960_snd_controls));
  1142. wm8960_add_widgets(component);
  1143. return 0;
  1144. }
  1145. static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
  1146. .probe = wm8960_probe,
  1147. .set_bias_level = wm8960_set_bias_level,
  1148. .suspend_bias_off = 1,
  1149. .idle_bias_on = 1,
  1150. .use_pmdown_time = 1,
  1151. .endianness = 1,
  1152. .non_legacy_dai_naming = 1,
  1153. };
  1154. static const struct regmap_config wm8960_regmap = {
  1155. .reg_bits = 7,
  1156. .val_bits = 9,
  1157. .max_register = WM8960_PLL4,
  1158. .reg_defaults = wm8960_reg_defaults,
  1159. .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
  1160. .cache_type = REGCACHE_RBTREE,
  1161. .volatile_reg = wm8960_volatile,
  1162. };
  1163. static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
  1164. struct wm8960_data *pdata)
  1165. {
  1166. const struct device_node *np = i2c->dev.of_node;
  1167. if (of_property_read_bool(np, "wlf,capless"))
  1168. pdata->capless = true;
  1169. if (of_property_read_bool(np, "wlf,shared-lrclk"))
  1170. pdata->shared_lrclk = true;
  1171. of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg,
  1172. ARRAY_SIZE(pdata->gpio_cfg));
  1173. of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg,
  1174. ARRAY_SIZE(pdata->hp_cfg));
  1175. }
  1176. static int wm8960_i2c_probe(struct i2c_client *i2c,
  1177. const struct i2c_device_id *id)
  1178. {
  1179. struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
  1180. struct wm8960_priv *wm8960;
  1181. int ret;
  1182. wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
  1183. GFP_KERNEL);
  1184. if (wm8960 == NULL)
  1185. return -ENOMEM;
  1186. wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
  1187. if (IS_ERR(wm8960->mclk)) {
  1188. if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
  1189. return -EPROBE_DEFER;
  1190. }
  1191. wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
  1192. if (IS_ERR(wm8960->regmap))
  1193. return PTR_ERR(wm8960->regmap);
  1194. if (pdata)
  1195. memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
  1196. else if (i2c->dev.of_node)
  1197. wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
  1198. ret = wm8960_reset(wm8960->regmap);
  1199. if (ret != 0) {
  1200. dev_err(&i2c->dev, "Failed to issue reset\n");
  1201. return ret;
  1202. }
  1203. if (wm8960->pdata.shared_lrclk) {
  1204. ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
  1205. 0x4, 0x4);
  1206. if (ret != 0) {
  1207. dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
  1208. ret);
  1209. return ret;
  1210. }
  1211. }
  1212. /* Latch the update bits */
  1213. regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
  1214. regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
  1215. regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
  1216. regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
  1217. regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
  1218. regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
  1219. regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
  1220. regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
  1221. regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
  1222. regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
  1223. /* ADCLRC pin configured as GPIO. */
  1224. regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6,
  1225. wm8960->pdata.gpio_cfg[0] << 6);
  1226. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4,
  1227. wm8960->pdata.gpio_cfg[1] << 4);
  1228. /* Enable headphone jack detect */
  1229. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2,
  1230. wm8960->pdata.hp_cfg[0] << 2);
  1231. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5,
  1232. wm8960->pdata.hp_cfg[1] << 5);
  1233. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3,
  1234. wm8960->pdata.hp_cfg[2]);
  1235. i2c_set_clientdata(i2c, wm8960);
  1236. ret = devm_snd_soc_register_component(&i2c->dev,
  1237. &soc_component_dev_wm8960, &wm8960_dai, 1);
  1238. return ret;
  1239. }
  1240. static int wm8960_i2c_remove(struct i2c_client *client)
  1241. {
  1242. return 0;
  1243. }
  1244. static const struct i2c_device_id wm8960_i2c_id[] = {
  1245. { "wm8960", 0 },
  1246. { }
  1247. };
  1248. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  1249. static const struct of_device_id wm8960_of_match[] = {
  1250. { .compatible = "wlf,wm8960", },
  1251. { }
  1252. };
  1253. MODULE_DEVICE_TABLE(of, wm8960_of_match);
  1254. static struct i2c_driver wm8960_i2c_driver = {
  1255. .driver = {
  1256. .name = "wm8960",
  1257. .of_match_table = wm8960_of_match,
  1258. },
  1259. .probe = wm8960_i2c_probe,
  1260. .remove = wm8960_i2c_remove,
  1261. .id_table = wm8960_i2c_id,
  1262. };
  1263. module_i2c_driver(wm8960_i2c_driver);
  1264. MODULE_DESCRIPTION("ASoC WM8960 driver");
  1265. MODULE_AUTHOR("Liam Girdwood");
  1266. MODULE_LICENSE("GPL");