wm8940.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8940.c -- WM8940 ALSA Soc Audio driver
  4. *
  5. * Author: Jonathan Cameron <jic23@cam.ac.uk>
  6. *
  7. * Based on wm8510.c
  8. * Copyright 2006 Wolfson Microelectronics PLC.
  9. * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  10. *
  11. * Not currently handled:
  12. * Notch filter control
  13. * AUXMode (inverting vs mixer)
  14. * No means to obtain current gain if alc enabled.
  15. * No use made of gpio
  16. * Fast VMID discharge for power down
  17. * Soft Start
  18. * DLR and ALR Swaps not enabled
  19. * Digital Sidetone not supported
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/kernel.h>
  24. #include <linux/init.h>
  25. #include <linux/delay.h>
  26. #include <linux/pm.h>
  27. #include <linux/i2c.h>
  28. #include <linux/regmap.h>
  29. #include <linux/slab.h>
  30. #include <sound/core.h>
  31. #include <sound/pcm.h>
  32. #include <sound/pcm_params.h>
  33. #include <sound/soc.h>
  34. #include <sound/initval.h>
  35. #include <sound/tlv.h>
  36. #include "wm8940.h"
  37. struct wm8940_priv {
  38. unsigned int sysclk;
  39. struct regmap *regmap;
  40. };
  41. static bool wm8940_volatile_register(struct device *dev, unsigned int reg)
  42. {
  43. switch (reg) {
  44. case WM8940_SOFTRESET:
  45. return true;
  46. default:
  47. return false;
  48. }
  49. }
  50. static bool wm8940_readable_register(struct device *dev, unsigned int reg)
  51. {
  52. switch (reg) {
  53. case WM8940_SOFTRESET:
  54. case WM8940_POWER1:
  55. case WM8940_POWER2:
  56. case WM8940_POWER3:
  57. case WM8940_IFACE:
  58. case WM8940_COMPANDINGCTL:
  59. case WM8940_CLOCK:
  60. case WM8940_ADDCNTRL:
  61. case WM8940_GPIO:
  62. case WM8940_CTLINT:
  63. case WM8940_DAC:
  64. case WM8940_DACVOL:
  65. case WM8940_ADC:
  66. case WM8940_ADCVOL:
  67. case WM8940_NOTCH1:
  68. case WM8940_NOTCH2:
  69. case WM8940_NOTCH3:
  70. case WM8940_NOTCH4:
  71. case WM8940_NOTCH5:
  72. case WM8940_NOTCH6:
  73. case WM8940_NOTCH7:
  74. case WM8940_NOTCH8:
  75. case WM8940_DACLIM1:
  76. case WM8940_DACLIM2:
  77. case WM8940_ALC1:
  78. case WM8940_ALC2:
  79. case WM8940_ALC3:
  80. case WM8940_NOISEGATE:
  81. case WM8940_PLLN:
  82. case WM8940_PLLK1:
  83. case WM8940_PLLK2:
  84. case WM8940_PLLK3:
  85. case WM8940_ALC4:
  86. case WM8940_INPUTCTL:
  87. case WM8940_PGAGAIN:
  88. case WM8940_ADCBOOST:
  89. case WM8940_OUTPUTCTL:
  90. case WM8940_SPKMIX:
  91. case WM8940_SPKVOL:
  92. case WM8940_MONOMIX:
  93. return true;
  94. default:
  95. return false;
  96. }
  97. }
  98. static const struct reg_default wm8940_reg_defaults[] = {
  99. { 0x1, 0x0000 }, /* Power 1 */
  100. { 0x2, 0x0000 }, /* Power 2 */
  101. { 0x3, 0x0000 }, /* Power 3 */
  102. { 0x4, 0x0010 }, /* Interface Control */
  103. { 0x5, 0x0000 }, /* Companding Control */
  104. { 0x6, 0x0140 }, /* Clock Control */
  105. { 0x7, 0x0000 }, /* Additional Controls */
  106. { 0x8, 0x0000 }, /* GPIO Control */
  107. { 0x9, 0x0002 }, /* Auto Increment Control */
  108. { 0xa, 0x0000 }, /* DAC Control */
  109. { 0xb, 0x00FF }, /* DAC Volume */
  110. { 0xe, 0x0100 }, /* ADC Control */
  111. { 0xf, 0x00FF }, /* ADC Volume */
  112. { 0x10, 0x0000 }, /* Notch Filter 1 Control 1 */
  113. { 0x11, 0x0000 }, /* Notch Filter 1 Control 2 */
  114. { 0x12, 0x0000 }, /* Notch Filter 2 Control 1 */
  115. { 0x13, 0x0000 }, /* Notch Filter 2 Control 2 */
  116. { 0x14, 0x0000 }, /* Notch Filter 3 Control 1 */
  117. { 0x15, 0x0000 }, /* Notch Filter 3 Control 2 */
  118. { 0x16, 0x0000 }, /* Notch Filter 4 Control 1 */
  119. { 0x17, 0x0000 }, /* Notch Filter 4 Control 2 */
  120. { 0x18, 0x0032 }, /* DAC Limit Control 1 */
  121. { 0x19, 0x0000 }, /* DAC Limit Control 2 */
  122. { 0x20, 0x0038 }, /* ALC Control 1 */
  123. { 0x21, 0x000B }, /* ALC Control 2 */
  124. { 0x22, 0x0032 }, /* ALC Control 3 */
  125. { 0x23, 0x0000 }, /* Noise Gate */
  126. { 0x24, 0x0041 }, /* PLLN */
  127. { 0x25, 0x000C }, /* PLLK1 */
  128. { 0x26, 0x0093 }, /* PLLK2 */
  129. { 0x27, 0x00E9 }, /* PLLK3 */
  130. { 0x2a, 0x0030 }, /* ALC Control 4 */
  131. { 0x2c, 0x0002 }, /* Input Control */
  132. { 0x2d, 0x0050 }, /* PGA Gain */
  133. { 0x2f, 0x0002 }, /* ADC Boost Control */
  134. { 0x31, 0x0002 }, /* Output Control */
  135. { 0x32, 0x0000 }, /* Speaker Mixer Control */
  136. { 0x36, 0x0079 }, /* Speaker Volume */
  137. { 0x38, 0x0000 }, /* Mono Mixer Control */
  138. };
  139. static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
  140. static SOC_ENUM_SINGLE_DECL(wm8940_adc_companding_enum,
  141. WM8940_COMPANDINGCTL, 1, wm8940_companding);
  142. static SOC_ENUM_SINGLE_DECL(wm8940_dac_companding_enum,
  143. WM8940_COMPANDINGCTL, 3, wm8940_companding);
  144. static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
  145. static SOC_ENUM_SINGLE_DECL(wm8940_alc_mode_enum,
  146. WM8940_ALC3, 8, wm8940_alc_mode_text);
  147. static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
  148. static SOC_ENUM_SINGLE_DECL(wm8940_mic_bias_level_enum,
  149. WM8940_INPUTCTL, 8, wm8940_mic_bias_level_text);
  150. static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
  151. static SOC_ENUM_SINGLE_DECL(wm8940_filter_mode_enum,
  152. WM8940_ADC, 7, wm8940_filter_mode_text);
  153. static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
  154. static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
  155. static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
  156. static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
  157. static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
  158. static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
  159. static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
  160. static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
  161. static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
  162. static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
  163. static const struct snd_kcontrol_new wm8940_snd_controls[] = {
  164. SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
  165. 6, 1, 0),
  166. SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
  167. SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
  168. SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
  169. SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
  170. SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
  171. 3, 7, 1, wm8940_alc_max_tlv),
  172. SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
  173. 0, 7, 0, wm8940_alc_min_tlv),
  174. SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
  175. 0, 14, 0, wm8940_alc_tar_tlv),
  176. SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
  177. SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
  178. SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
  179. SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
  180. SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
  181. 3, 1, 0),
  182. SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
  183. 0, 7, 0),
  184. SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
  185. SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
  186. SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
  187. SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
  188. 4, 9, 1, wm8940_lim_thresh_tlv),
  189. SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
  190. 0, 12, 0, wm8940_lim_boost_tlv),
  191. SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
  192. SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
  193. 0, 63, 0, wm8940_pga_vol_tlv),
  194. SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
  195. 0, 255, 0, wm8940_adc_tlv),
  196. SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
  197. 0, 255, 0, wm8940_adc_tlv),
  198. SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
  199. SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
  200. 8, 1, 0, wm8940_capture_boost_vol_tlv),
  201. SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
  202. 0, 63, 0, wm8940_spk_vol_tlv),
  203. SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
  204. SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
  205. 8, 1, 1, wm8940_att_tlv),
  206. SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
  207. SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
  208. SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
  209. 7, 1, 1, wm8940_att_tlv),
  210. SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
  211. SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
  212. SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
  213. SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
  214. SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
  215. SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
  216. SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
  217. };
  218. static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
  219. SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
  220. SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
  221. SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
  222. };
  223. static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
  224. SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
  225. SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
  226. SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
  227. };
  228. static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
  229. static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
  230. SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
  231. SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
  232. 0, 7, 0, wm8940_boost_vol_tlv),
  233. SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
  234. 4, 7, 0, wm8940_boost_vol_tlv),
  235. };
  236. static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
  237. SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
  238. SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
  239. SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
  240. };
  241. static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
  242. SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
  243. &wm8940_speaker_mixer_controls[0],
  244. ARRAY_SIZE(wm8940_speaker_mixer_controls)),
  245. SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
  246. &wm8940_mono_mixer_controls[0],
  247. ARRAY_SIZE(wm8940_mono_mixer_controls)),
  248. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
  249. SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
  250. SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
  251. SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
  252. SND_SOC_DAPM_OUTPUT("MONOOUT"),
  253. SND_SOC_DAPM_OUTPUT("SPKOUTP"),
  254. SND_SOC_DAPM_OUTPUT("SPKOUTN"),
  255. SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
  256. SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
  257. SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
  258. &wm8940_micpga_controls[0],
  259. ARRAY_SIZE(wm8940_micpga_controls)),
  260. SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
  261. &wm8940_input_boost_controls[0],
  262. ARRAY_SIZE(wm8940_input_boost_controls)),
  263. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
  264. SND_SOC_DAPM_INPUT("MICN"),
  265. SND_SOC_DAPM_INPUT("MICP"),
  266. SND_SOC_DAPM_INPUT("AUX"),
  267. };
  268. static const struct snd_soc_dapm_route wm8940_dapm_routes[] = {
  269. /* Mono output mixer */
  270. {"Mono Mixer", "PCM Playback Switch", "DAC"},
  271. {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
  272. {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
  273. /* Speaker output mixer */
  274. {"Speaker Mixer", "PCM Playback Switch", "DAC"},
  275. {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
  276. {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
  277. /* Outputs */
  278. {"Mono Out", NULL, "Mono Mixer"},
  279. {"MONOOUT", NULL, "Mono Out"},
  280. {"SpkN Out", NULL, "Speaker Mixer"},
  281. {"SpkP Out", NULL, "Speaker Mixer"},
  282. {"SPKOUTN", NULL, "SpkN Out"},
  283. {"SPKOUTP", NULL, "SpkP Out"},
  284. /* Microphone PGA */
  285. {"Mic PGA", "MICN Switch", "MICN"},
  286. {"Mic PGA", "MICP Switch", "MICP"},
  287. {"Mic PGA", "AUX Switch", "AUX"},
  288. /* Boost Mixer */
  289. {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
  290. {"Boost Mixer", "Mic Volume", "MICP"},
  291. {"Boost Mixer", "Aux Volume", "Aux Input"},
  292. {"ADC", NULL, "Boost Mixer"},
  293. };
  294. #define wm8940_reset(c) snd_soc_component_write(c, WM8940_SOFTRESET, 0);
  295. static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
  296. unsigned int fmt)
  297. {
  298. struct snd_soc_component *component = codec_dai->component;
  299. u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFE67;
  300. u16 clk = snd_soc_component_read(component, WM8940_CLOCK) & 0x1fe;
  301. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  302. case SND_SOC_DAIFMT_CBM_CFM:
  303. clk |= 1;
  304. break;
  305. case SND_SOC_DAIFMT_CBS_CFS:
  306. break;
  307. default:
  308. return -EINVAL;
  309. }
  310. snd_soc_component_write(component, WM8940_CLOCK, clk);
  311. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  312. case SND_SOC_DAIFMT_I2S:
  313. iface |= (2 << 3);
  314. break;
  315. case SND_SOC_DAIFMT_LEFT_J:
  316. iface |= (1 << 3);
  317. break;
  318. case SND_SOC_DAIFMT_RIGHT_J:
  319. break;
  320. case SND_SOC_DAIFMT_DSP_A:
  321. iface |= (3 << 3);
  322. break;
  323. case SND_SOC_DAIFMT_DSP_B:
  324. iface |= (3 << 3) | (1 << 7);
  325. break;
  326. }
  327. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  328. case SND_SOC_DAIFMT_NB_NF:
  329. break;
  330. case SND_SOC_DAIFMT_NB_IF:
  331. iface |= (1 << 7);
  332. break;
  333. case SND_SOC_DAIFMT_IB_NF:
  334. iface |= (1 << 8);
  335. break;
  336. case SND_SOC_DAIFMT_IB_IF:
  337. iface |= (1 << 8) | (1 << 7);
  338. break;
  339. }
  340. snd_soc_component_write(component, WM8940_IFACE, iface);
  341. return 0;
  342. }
  343. static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
  344. struct snd_pcm_hw_params *params,
  345. struct snd_soc_dai *dai)
  346. {
  347. struct snd_soc_component *component = dai->component;
  348. u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFD9F;
  349. u16 addcntrl = snd_soc_component_read(component, WM8940_ADDCNTRL) & 0xFFF1;
  350. u16 companding = snd_soc_component_read(component,
  351. WM8940_COMPANDINGCTL) & 0xFFDF;
  352. int ret;
  353. /* LoutR control */
  354. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
  355. && params_channels(params) == 2)
  356. iface |= (1 << 9);
  357. switch (params_rate(params)) {
  358. case 8000:
  359. addcntrl |= (0x5 << 1);
  360. break;
  361. case 11025:
  362. addcntrl |= (0x4 << 1);
  363. break;
  364. case 16000:
  365. addcntrl |= (0x3 << 1);
  366. break;
  367. case 22050:
  368. addcntrl |= (0x2 << 1);
  369. break;
  370. case 32000:
  371. addcntrl |= (0x1 << 1);
  372. break;
  373. case 44100:
  374. case 48000:
  375. break;
  376. }
  377. ret = snd_soc_component_write(component, WM8940_ADDCNTRL, addcntrl);
  378. if (ret)
  379. goto error_ret;
  380. switch (params_width(params)) {
  381. case 8:
  382. companding = companding | (1 << 5);
  383. break;
  384. case 16:
  385. break;
  386. case 20:
  387. iface |= (1 << 5);
  388. break;
  389. case 24:
  390. iface |= (2 << 5);
  391. break;
  392. case 32:
  393. iface |= (3 << 5);
  394. break;
  395. }
  396. ret = snd_soc_component_write(component, WM8940_COMPANDINGCTL, companding);
  397. if (ret)
  398. goto error_ret;
  399. ret = snd_soc_component_write(component, WM8940_IFACE, iface);
  400. error_ret:
  401. return ret;
  402. }
  403. static int wm8940_mute(struct snd_soc_dai *dai, int mute, int direction)
  404. {
  405. struct snd_soc_component *component = dai->component;
  406. u16 mute_reg = snd_soc_component_read(component, WM8940_DAC) & 0xffbf;
  407. if (mute)
  408. mute_reg |= 0x40;
  409. return snd_soc_component_write(component, WM8940_DAC, mute_reg);
  410. }
  411. static int wm8940_set_bias_level(struct snd_soc_component *component,
  412. enum snd_soc_bias_level level)
  413. {
  414. struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component);
  415. u16 val;
  416. u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0;
  417. int ret = 0;
  418. switch (level) {
  419. case SND_SOC_BIAS_ON:
  420. /* ensure bufioen and biasen */
  421. pwr_reg |= (1 << 2) | (1 << 3);
  422. /* Enable thermal shutdown */
  423. val = snd_soc_component_read(component, WM8940_OUTPUTCTL);
  424. ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, val | 0x2);
  425. if (ret)
  426. break;
  427. /* set vmid to 75k */
  428. ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1);
  429. break;
  430. case SND_SOC_BIAS_PREPARE:
  431. /* ensure bufioen and biasen */
  432. pwr_reg |= (1 << 2) | (1 << 3);
  433. ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1);
  434. break;
  435. case SND_SOC_BIAS_STANDBY:
  436. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  437. ret = regcache_sync(wm8940->regmap);
  438. if (ret < 0) {
  439. dev_err(component->dev, "Failed to sync cache: %d\n", ret);
  440. return ret;
  441. }
  442. }
  443. /* ensure bufioen and biasen */
  444. pwr_reg |= (1 << 2) | (1 << 3);
  445. /* set vmid to 300k for standby */
  446. ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2);
  447. break;
  448. case SND_SOC_BIAS_OFF:
  449. ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg);
  450. break;
  451. }
  452. return ret;
  453. }
  454. struct pll_ {
  455. unsigned int pre_scale:2;
  456. unsigned int n:4;
  457. unsigned int k;
  458. };
  459. static struct pll_ pll_div;
  460. /* The size in bits of the pll divide multiplied by 10
  461. * to allow rounding later */
  462. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  463. static void pll_factors(unsigned int target, unsigned int source)
  464. {
  465. unsigned long long Kpart;
  466. unsigned int K, Ndiv, Nmod;
  467. /* The left shift ist to avoid accuracy loss when right shifting */
  468. Ndiv = target / source;
  469. if (Ndiv > 12) {
  470. source <<= 1;
  471. /* Multiply by 2 */
  472. pll_div.pre_scale = 0;
  473. Ndiv = target / source;
  474. } else if (Ndiv < 3) {
  475. source >>= 2;
  476. /* Divide by 4 */
  477. pll_div.pre_scale = 3;
  478. Ndiv = target / source;
  479. } else if (Ndiv < 6) {
  480. source >>= 1;
  481. /* divide by 2 */
  482. pll_div.pre_scale = 2;
  483. Ndiv = target / source;
  484. } else
  485. pll_div.pre_scale = 1;
  486. if ((Ndiv < 6) || (Ndiv > 12))
  487. printk(KERN_WARNING
  488. "WM8940 N value %d outwith recommended range!d\n",
  489. Ndiv);
  490. pll_div.n = Ndiv;
  491. Nmod = target % source;
  492. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  493. do_div(Kpart, source);
  494. K = Kpart & 0xFFFFFFFF;
  495. /* Check if we need to round */
  496. if ((K % 10) >= 5)
  497. K += 5;
  498. /* Move down to proper range now rounding is done */
  499. K /= 10;
  500. pll_div.k = K;
  501. }
  502. /* Untested at the moment */
  503. static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  504. int source, unsigned int freq_in, unsigned int freq_out)
  505. {
  506. struct snd_soc_component *component = codec_dai->component;
  507. u16 reg;
  508. /* Turn off PLL */
  509. reg = snd_soc_component_read(component, WM8940_POWER1);
  510. snd_soc_component_write(component, WM8940_POWER1, reg & 0x1df);
  511. if (freq_in == 0 || freq_out == 0) {
  512. /* Clock CODEC directly from MCLK */
  513. reg = snd_soc_component_read(component, WM8940_CLOCK);
  514. snd_soc_component_write(component, WM8940_CLOCK, reg & 0x0ff);
  515. /* Pll power down */
  516. snd_soc_component_write(component, WM8940_PLLN, (1 << 7));
  517. return 0;
  518. }
  519. /* Pll is followed by a frequency divide by 4 */
  520. pll_factors(freq_out*4, freq_in);
  521. if (pll_div.k)
  522. snd_soc_component_write(component, WM8940_PLLN,
  523. (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
  524. else /* No factional component */
  525. snd_soc_component_write(component, WM8940_PLLN,
  526. (pll_div.pre_scale << 4) | pll_div.n);
  527. snd_soc_component_write(component, WM8940_PLLK1, pll_div.k >> 18);
  528. snd_soc_component_write(component, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
  529. snd_soc_component_write(component, WM8940_PLLK3, pll_div.k & 0x1ff);
  530. /* Enable the PLL */
  531. reg = snd_soc_component_read(component, WM8940_POWER1);
  532. snd_soc_component_write(component, WM8940_POWER1, reg | 0x020);
  533. /* Run CODEC from PLL instead of MCLK */
  534. reg = snd_soc_component_read(component, WM8940_CLOCK);
  535. snd_soc_component_write(component, WM8940_CLOCK, reg | 0x100);
  536. return 0;
  537. }
  538. static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  539. int clk_id, unsigned int freq, int dir)
  540. {
  541. struct snd_soc_component *component = codec_dai->component;
  542. struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component);
  543. switch (freq) {
  544. case 11289600:
  545. case 12000000:
  546. case 12288000:
  547. case 16934400:
  548. case 18432000:
  549. wm8940->sysclk = freq;
  550. return 0;
  551. }
  552. return -EINVAL;
  553. }
  554. static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  555. int div_id, int div)
  556. {
  557. struct snd_soc_component *component = codec_dai->component;
  558. u16 reg;
  559. int ret = 0;
  560. switch (div_id) {
  561. case WM8940_BCLKDIV:
  562. reg = snd_soc_component_read(component, WM8940_CLOCK) & 0xFFE3;
  563. ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 2));
  564. break;
  565. case WM8940_MCLKDIV:
  566. reg = snd_soc_component_read(component, WM8940_CLOCK) & 0xFF1F;
  567. ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 5));
  568. break;
  569. case WM8940_OPCLKDIV:
  570. reg = snd_soc_component_read(component, WM8940_GPIO) & 0xFFCF;
  571. ret = snd_soc_component_write(component, WM8940_GPIO, reg | (div << 4));
  572. break;
  573. }
  574. return ret;
  575. }
  576. #define WM8940_RATES SNDRV_PCM_RATE_8000_48000
  577. #define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  578. SNDRV_PCM_FMTBIT_S16_LE | \
  579. SNDRV_PCM_FMTBIT_S20_3LE | \
  580. SNDRV_PCM_FMTBIT_S24_LE | \
  581. SNDRV_PCM_FMTBIT_S32_LE)
  582. static const struct snd_soc_dai_ops wm8940_dai_ops = {
  583. .hw_params = wm8940_i2s_hw_params,
  584. .set_sysclk = wm8940_set_dai_sysclk,
  585. .mute_stream = wm8940_mute,
  586. .set_fmt = wm8940_set_dai_fmt,
  587. .set_clkdiv = wm8940_set_dai_clkdiv,
  588. .set_pll = wm8940_set_dai_pll,
  589. .no_capture_mute = 1,
  590. };
  591. static struct snd_soc_dai_driver wm8940_dai = {
  592. .name = "wm8940-hifi",
  593. .playback = {
  594. .stream_name = "Playback",
  595. .channels_min = 1,
  596. .channels_max = 2,
  597. .rates = WM8940_RATES,
  598. .formats = WM8940_FORMATS,
  599. },
  600. .capture = {
  601. .stream_name = "Capture",
  602. .channels_min = 1,
  603. .channels_max = 2,
  604. .rates = WM8940_RATES,
  605. .formats = WM8940_FORMATS,
  606. },
  607. .ops = &wm8940_dai_ops,
  608. .symmetric_rates = 1,
  609. };
  610. static int wm8940_probe(struct snd_soc_component *component)
  611. {
  612. struct wm8940_setup_data *pdata = component->dev->platform_data;
  613. int ret;
  614. u16 reg;
  615. ret = wm8940_reset(component);
  616. if (ret < 0) {
  617. dev_err(component->dev, "Failed to issue reset\n");
  618. return ret;
  619. }
  620. snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
  621. ret = snd_soc_component_write(component, WM8940_POWER1, 0x180);
  622. if (ret < 0)
  623. return ret;
  624. if (!pdata)
  625. dev_warn(component->dev, "No platform data supplied\n");
  626. else {
  627. reg = snd_soc_component_read(component, WM8940_OUTPUTCTL);
  628. ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, reg | pdata->vroi);
  629. if (ret < 0)
  630. return ret;
  631. }
  632. return ret;
  633. }
  634. static const struct snd_soc_component_driver soc_component_dev_wm8940 = {
  635. .probe = wm8940_probe,
  636. .set_bias_level = wm8940_set_bias_level,
  637. .controls = wm8940_snd_controls,
  638. .num_controls = ARRAY_SIZE(wm8940_snd_controls),
  639. .dapm_widgets = wm8940_dapm_widgets,
  640. .num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets),
  641. .dapm_routes = wm8940_dapm_routes,
  642. .num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes),
  643. .suspend_bias_off = 1,
  644. .idle_bias_on = 1,
  645. .use_pmdown_time = 1,
  646. .endianness = 1,
  647. .non_legacy_dai_naming = 1,
  648. };
  649. static const struct regmap_config wm8940_regmap = {
  650. .reg_bits = 8,
  651. .val_bits = 16,
  652. .max_register = WM8940_MONOMIX,
  653. .reg_defaults = wm8940_reg_defaults,
  654. .num_reg_defaults = ARRAY_SIZE(wm8940_reg_defaults),
  655. .cache_type = REGCACHE_RBTREE,
  656. .readable_reg = wm8940_readable_register,
  657. .volatile_reg = wm8940_volatile_register,
  658. };
  659. static int wm8940_i2c_probe(struct i2c_client *i2c,
  660. const struct i2c_device_id *id)
  661. {
  662. struct wm8940_priv *wm8940;
  663. int ret;
  664. wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv),
  665. GFP_KERNEL);
  666. if (wm8940 == NULL)
  667. return -ENOMEM;
  668. wm8940->regmap = devm_regmap_init_i2c(i2c, &wm8940_regmap);
  669. if (IS_ERR(wm8940->regmap))
  670. return PTR_ERR(wm8940->regmap);
  671. i2c_set_clientdata(i2c, wm8940);
  672. ret = devm_snd_soc_register_component(&i2c->dev,
  673. &soc_component_dev_wm8940, &wm8940_dai, 1);
  674. return ret;
  675. }
  676. static const struct i2c_device_id wm8940_i2c_id[] = {
  677. { "wm8940", 0 },
  678. { }
  679. };
  680. MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
  681. static struct i2c_driver wm8940_i2c_driver = {
  682. .driver = {
  683. .name = "wm8940",
  684. },
  685. .probe = wm8940_i2c_probe,
  686. .id_table = wm8940_i2c_id,
  687. };
  688. module_i2c_driver(wm8940_i2c_driver);
  689. MODULE_DESCRIPTION("ASoC WM8940 driver");
  690. MODULE_AUTHOR("Jonathan Cameron");
  691. MODULE_LICENSE("GPL");