wm8750.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8750.c -- WM8750 ALSA SoC audio driver
  4. *
  5. * Copyright 2005 Openedhand Ltd.
  6. *
  7. * Author: Richard Purdie <richard@openedhand.com>
  8. *
  9. * Based on WM8753.c
  10. */
  11. #include <linux/module.h>
  12. #include <linux/moduleparam.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <linux/i2c.h>
  17. #include <linux/regmap.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/slab.h>
  20. #include <linux/of_device.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/initval.h>
  26. #include "wm8750.h"
  27. /*
  28. * wm8750 register cache
  29. * We can't read the WM8750 register space when we
  30. * are using 2 wire for device control, so we cache them instead.
  31. */
  32. static const struct reg_default wm8750_reg_defaults[] = {
  33. { 0, 0x0097 },
  34. { 1, 0x0097 },
  35. { 2, 0x0079 },
  36. { 3, 0x0079 },
  37. { 4, 0x0000 },
  38. { 5, 0x0008 },
  39. { 6, 0x0000 },
  40. { 7, 0x000a },
  41. { 8, 0x0000 },
  42. { 9, 0x0000 },
  43. { 10, 0x00ff },
  44. { 11, 0x00ff },
  45. { 12, 0x000f },
  46. { 13, 0x000f },
  47. { 14, 0x0000 },
  48. { 15, 0x0000 },
  49. { 16, 0x0000 },
  50. { 17, 0x007b },
  51. { 18, 0x0000 },
  52. { 19, 0x0032 },
  53. { 20, 0x0000 },
  54. { 21, 0x00c3 },
  55. { 22, 0x00c3 },
  56. { 23, 0x00c0 },
  57. { 24, 0x0000 },
  58. { 25, 0x0000 },
  59. { 26, 0x0000 },
  60. { 27, 0x0000 },
  61. { 28, 0x0000 },
  62. { 29, 0x0000 },
  63. { 30, 0x0000 },
  64. { 31, 0x0000 },
  65. { 32, 0x0000 },
  66. { 33, 0x0000 },
  67. { 34, 0x0050 },
  68. { 35, 0x0050 },
  69. { 36, 0x0050 },
  70. { 37, 0x0050 },
  71. { 38, 0x0050 },
  72. { 39, 0x0050 },
  73. { 40, 0x0079 },
  74. { 41, 0x0079 },
  75. { 42, 0x0079 },
  76. };
  77. /* codec private data */
  78. struct wm8750_priv {
  79. unsigned int sysclk;
  80. };
  81. #define wm8750_reset(c) snd_soc_component_write(c, WM8750_RESET, 0)
  82. /*
  83. * WM8750 Controls
  84. */
  85. static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  86. static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  87. static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  88. static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  89. static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  90. static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  91. static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  92. static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  93. "Mute ADC Output"};
  94. static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
  95. "Differential"};
  96. static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
  97. "Differential"};
  98. static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
  99. "ROUT1"};
  100. static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
  101. static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
  102. "L + R Invert"};
  103. static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  104. static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
  105. "Mono (Right)", "Digital Mono"};
  106. static const struct soc_enum wm8750_enum[] = {
  107. SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
  108. SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
  109. SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
  110. SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
  111. SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
  112. SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
  113. SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
  114. SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
  115. SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
  116. SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
  117. SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
  118. SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
  119. SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
  120. SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
  121. SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
  122. SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
  123. SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
  124. };
  125. static const struct snd_kcontrol_new wm8750_snd_controls[] = {
  126. SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
  127. SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
  128. SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
  129. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
  130. WM8750_ROUT1V, 7, 1, 0),
  131. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
  132. WM8750_ROUT2V, 7, 1, 0),
  133. SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
  134. SOC_ENUM("Capture Polarity", wm8750_enum[14]),
  135. SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
  136. SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
  137. SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
  138. SOC_ENUM("Bass Boost", wm8750_enum[0]),
  139. SOC_ENUM("Bass Filter", wm8750_enum[1]),
  140. SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
  141. SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
  142. SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
  143. SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
  144. SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
  145. SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
  146. SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
  147. SOC_ENUM("3D Mode", wm8750_enum[5]),
  148. SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
  149. SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
  150. SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
  151. SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
  152. SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
  153. SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
  154. SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
  155. SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
  156. SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
  157. SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
  158. SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
  159. SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
  160. SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
  161. SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
  162. SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
  163. /* Unimplemented */
  164. /* ADCDAC Bit 0 - ADCHPD */
  165. /* ADCDAC Bit 4 - HPOR */
  166. /* ADCTL1 Bit 2,3 - DATSEL */
  167. /* ADCTL1 Bit 4,5 - DMONOMIX */
  168. /* ADCTL1 Bit 6,7 - VSEL */
  169. /* ADCTL2 Bit 2 - LRCM */
  170. /* ADCTL2 Bit 3 - TRI */
  171. /* ADCTL3 Bit 5 - HPFLREN */
  172. /* ADCTL3 Bit 6 - VROI */
  173. /* ADCTL3 Bit 7,8 - ADCLRM */
  174. /* ADCIN Bit 4 - LDCM */
  175. /* ADCIN Bit 5 - RDCM */
  176. SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
  177. SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
  178. WM8750_LOUTM2, 4, 7, 1),
  179. SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
  180. WM8750_ROUTM2, 4, 7, 1),
  181. SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
  182. WM8750_MOUTM2, 4, 7, 1),
  183. SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
  184. SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
  185. 0, 127, 0),
  186. SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
  187. 0, 127, 0),
  188. SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
  189. };
  190. /*
  191. * DAPM Controls
  192. */
  193. /* Left Mixer */
  194. static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
  195. SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
  196. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
  197. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
  198. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
  199. };
  200. /* Right Mixer */
  201. static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
  202. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
  203. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
  204. SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
  205. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
  206. };
  207. /* Mono Mixer */
  208. static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
  209. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
  210. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
  211. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
  212. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
  213. };
  214. /* Left Line Mux */
  215. static const struct snd_kcontrol_new wm8750_left_line_controls =
  216. SOC_DAPM_ENUM("Route", wm8750_enum[8]);
  217. /* Right Line Mux */
  218. static const struct snd_kcontrol_new wm8750_right_line_controls =
  219. SOC_DAPM_ENUM("Route", wm8750_enum[9]);
  220. /* Left PGA Mux */
  221. static const struct snd_kcontrol_new wm8750_left_pga_controls =
  222. SOC_DAPM_ENUM("Route", wm8750_enum[10]);
  223. /* Right PGA Mux */
  224. static const struct snd_kcontrol_new wm8750_right_pga_controls =
  225. SOC_DAPM_ENUM("Route", wm8750_enum[11]);
  226. /* Out 3 Mux */
  227. static const struct snd_kcontrol_new wm8750_out3_controls =
  228. SOC_DAPM_ENUM("Route", wm8750_enum[12]);
  229. /* Differential Mux */
  230. static const struct snd_kcontrol_new wm8750_diffmux_controls =
  231. SOC_DAPM_ENUM("Route", wm8750_enum[13]);
  232. /* Mono ADC Mux */
  233. static const struct snd_kcontrol_new wm8750_monomux_controls =
  234. SOC_DAPM_ENUM("Route", wm8750_enum[16]);
  235. static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
  236. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  237. &wm8750_left_mixer_controls[0],
  238. ARRAY_SIZE(wm8750_left_mixer_controls)),
  239. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  240. &wm8750_right_mixer_controls[0],
  241. ARRAY_SIZE(wm8750_right_mixer_controls)),
  242. SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
  243. &wm8750_mono_mixer_controls[0],
  244. ARRAY_SIZE(wm8750_mono_mixer_controls)),
  245. SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
  246. SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
  247. SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
  248. SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
  249. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
  250. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
  251. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
  252. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
  253. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
  254. SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
  255. &wm8750_left_pga_controls),
  256. SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
  257. &wm8750_right_pga_controls),
  258. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  259. &wm8750_left_line_controls),
  260. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  261. &wm8750_right_line_controls),
  262. SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
  263. SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
  264. SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
  265. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  266. &wm8750_diffmux_controls),
  267. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  268. &wm8750_monomux_controls),
  269. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  270. &wm8750_monomux_controls),
  271. SND_SOC_DAPM_OUTPUT("LOUT1"),
  272. SND_SOC_DAPM_OUTPUT("ROUT1"),
  273. SND_SOC_DAPM_OUTPUT("LOUT2"),
  274. SND_SOC_DAPM_OUTPUT("ROUT2"),
  275. SND_SOC_DAPM_OUTPUT("MONO1"),
  276. SND_SOC_DAPM_OUTPUT("OUT3"),
  277. SND_SOC_DAPM_VMID("VREF"),
  278. SND_SOC_DAPM_INPUT("LINPUT1"),
  279. SND_SOC_DAPM_INPUT("LINPUT2"),
  280. SND_SOC_DAPM_INPUT("LINPUT3"),
  281. SND_SOC_DAPM_INPUT("RINPUT1"),
  282. SND_SOC_DAPM_INPUT("RINPUT2"),
  283. SND_SOC_DAPM_INPUT("RINPUT3"),
  284. };
  285. static const struct snd_soc_dapm_route wm8750_dapm_routes[] = {
  286. /* left mixer */
  287. {"Left Mixer", "Playback Switch", "Left DAC"},
  288. {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
  289. {"Left Mixer", "Right Playback Switch", "Right DAC"},
  290. {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
  291. /* right mixer */
  292. {"Right Mixer", "Left Playback Switch", "Left DAC"},
  293. {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
  294. {"Right Mixer", "Playback Switch", "Right DAC"},
  295. {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
  296. /* left out 1 */
  297. {"Left Out 1", NULL, "Left Mixer"},
  298. {"LOUT1", NULL, "Left Out 1"},
  299. /* left out 2 */
  300. {"Left Out 2", NULL, "Left Mixer"},
  301. {"LOUT2", NULL, "Left Out 2"},
  302. /* right out 1 */
  303. {"Right Out 1", NULL, "Right Mixer"},
  304. {"ROUT1", NULL, "Right Out 1"},
  305. /* right out 2 */
  306. {"Right Out 2", NULL, "Right Mixer"},
  307. {"ROUT2", NULL, "Right Out 2"},
  308. /* mono mixer */
  309. {"Mono Mixer", "Left Playback Switch", "Left DAC"},
  310. {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
  311. {"Mono Mixer", "Right Playback Switch", "Right DAC"},
  312. {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
  313. /* mono out */
  314. {"Mono Out 1", NULL, "Mono Mixer"},
  315. {"MONO1", NULL, "Mono Out 1"},
  316. /* out 3 */
  317. {"Out3 Mux", "VREF", "VREF"},
  318. {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
  319. {"Out3 Mux", "ROUT1", "Right Mixer"},
  320. {"Out3 Mux", "MonoOut", "MONO1"},
  321. {"Out 3", NULL, "Out3 Mux"},
  322. {"OUT3", NULL, "Out 3"},
  323. /* Left Line Mux */
  324. {"Left Line Mux", "Line 1", "LINPUT1"},
  325. {"Left Line Mux", "Line 2", "LINPUT2"},
  326. {"Left Line Mux", "Line 3", "LINPUT3"},
  327. {"Left Line Mux", "PGA", "Left PGA Mux"},
  328. {"Left Line Mux", "Differential", "Differential Mux"},
  329. /* Right Line Mux */
  330. {"Right Line Mux", "Line 1", "RINPUT1"},
  331. {"Right Line Mux", "Line 2", "RINPUT2"},
  332. {"Right Line Mux", "Line 3", "RINPUT3"},
  333. {"Right Line Mux", "PGA", "Right PGA Mux"},
  334. {"Right Line Mux", "Differential", "Differential Mux"},
  335. /* Left PGA Mux */
  336. {"Left PGA Mux", "Line 1", "LINPUT1"},
  337. {"Left PGA Mux", "Line 2", "LINPUT2"},
  338. {"Left PGA Mux", "Line 3", "LINPUT3"},
  339. {"Left PGA Mux", "Differential", "Differential Mux"},
  340. /* Right PGA Mux */
  341. {"Right PGA Mux", "Line 1", "RINPUT1"},
  342. {"Right PGA Mux", "Line 2", "RINPUT2"},
  343. {"Right PGA Mux", "Line 3", "RINPUT3"},
  344. {"Right PGA Mux", "Differential", "Differential Mux"},
  345. /* Differential Mux */
  346. {"Differential Mux", "Line 1", "LINPUT1"},
  347. {"Differential Mux", "Line 1", "RINPUT1"},
  348. {"Differential Mux", "Line 2", "LINPUT2"},
  349. {"Differential Mux", "Line 2", "RINPUT2"},
  350. /* Left ADC Mux */
  351. {"Left ADC Mux", "Stereo", "Left PGA Mux"},
  352. {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
  353. {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
  354. /* Right ADC Mux */
  355. {"Right ADC Mux", "Stereo", "Right PGA Mux"},
  356. {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
  357. {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
  358. /* ADC */
  359. {"Left ADC", NULL, "Left ADC Mux"},
  360. {"Right ADC", NULL, "Right ADC Mux"},
  361. };
  362. struct _coeff_div {
  363. u32 mclk;
  364. u32 rate;
  365. u16 fs;
  366. u8 sr:5;
  367. u8 usb:1;
  368. };
  369. /* codec hifi mclk clock divider coefficients */
  370. static const struct _coeff_div coeff_div[] = {
  371. /* 8k */
  372. {12288000, 8000, 1536, 0x6, 0x0},
  373. {11289600, 8000, 1408, 0x16, 0x0},
  374. {18432000, 8000, 2304, 0x7, 0x0},
  375. {16934400, 8000, 2112, 0x17, 0x0},
  376. {12000000, 8000, 1500, 0x6, 0x1},
  377. /* 11.025k */
  378. {11289600, 11025, 1024, 0x18, 0x0},
  379. {16934400, 11025, 1536, 0x19, 0x0},
  380. {12000000, 11025, 1088, 0x19, 0x1},
  381. /* 16k */
  382. {12288000, 16000, 768, 0xa, 0x0},
  383. {18432000, 16000, 1152, 0xb, 0x0},
  384. {12000000, 16000, 750, 0xa, 0x1},
  385. /* 22.05k */
  386. {11289600, 22050, 512, 0x1a, 0x0},
  387. {16934400, 22050, 768, 0x1b, 0x0},
  388. {12000000, 22050, 544, 0x1b, 0x1},
  389. /* 32k */
  390. {12288000, 32000, 384, 0xc, 0x0},
  391. {18432000, 32000, 576, 0xd, 0x0},
  392. {12000000, 32000, 375, 0xa, 0x1},
  393. /* 44.1k */
  394. {11289600, 44100, 256, 0x10, 0x0},
  395. {16934400, 44100, 384, 0x11, 0x0},
  396. {12000000, 44100, 272, 0x11, 0x1},
  397. /* 48k */
  398. {12288000, 48000, 256, 0x0, 0x0},
  399. {18432000, 48000, 384, 0x1, 0x0},
  400. {12000000, 48000, 250, 0x0, 0x1},
  401. /* 88.2k */
  402. {11289600, 88200, 128, 0x1e, 0x0},
  403. {16934400, 88200, 192, 0x1f, 0x0},
  404. {12000000, 88200, 136, 0x1f, 0x1},
  405. /* 96k */
  406. {12288000, 96000, 128, 0xe, 0x0},
  407. {18432000, 96000, 192, 0xf, 0x0},
  408. {12000000, 96000, 125, 0xe, 0x1},
  409. };
  410. static inline int get_coeff(int mclk, int rate)
  411. {
  412. int i;
  413. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  414. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  415. return i;
  416. }
  417. printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
  418. mclk, rate);
  419. return -EINVAL;
  420. }
  421. static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  422. int clk_id, unsigned int freq, int dir)
  423. {
  424. struct snd_soc_component *component = codec_dai->component;
  425. struct wm8750_priv *wm8750 = snd_soc_component_get_drvdata(component);
  426. switch (freq) {
  427. case 11289600:
  428. case 12000000:
  429. case 12288000:
  430. case 16934400:
  431. case 18432000:
  432. wm8750->sysclk = freq;
  433. return 0;
  434. }
  435. return -EINVAL;
  436. }
  437. static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
  438. unsigned int fmt)
  439. {
  440. struct snd_soc_component *component = codec_dai->component;
  441. u16 iface = 0;
  442. /* set master/slave audio interface */
  443. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  444. case SND_SOC_DAIFMT_CBM_CFM:
  445. iface = 0x0040;
  446. break;
  447. case SND_SOC_DAIFMT_CBS_CFS:
  448. break;
  449. default:
  450. return -EINVAL;
  451. }
  452. /* interface format */
  453. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  454. case SND_SOC_DAIFMT_I2S:
  455. iface |= 0x0002;
  456. break;
  457. case SND_SOC_DAIFMT_RIGHT_J:
  458. break;
  459. case SND_SOC_DAIFMT_LEFT_J:
  460. iface |= 0x0001;
  461. break;
  462. case SND_SOC_DAIFMT_DSP_A:
  463. iface |= 0x0003;
  464. break;
  465. case SND_SOC_DAIFMT_DSP_B:
  466. iface |= 0x0013;
  467. break;
  468. default:
  469. return -EINVAL;
  470. }
  471. /* clock inversion */
  472. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  473. case SND_SOC_DAIFMT_NB_NF:
  474. break;
  475. case SND_SOC_DAIFMT_IB_IF:
  476. iface |= 0x0090;
  477. break;
  478. case SND_SOC_DAIFMT_IB_NF:
  479. iface |= 0x0080;
  480. break;
  481. case SND_SOC_DAIFMT_NB_IF:
  482. iface |= 0x0010;
  483. break;
  484. default:
  485. return -EINVAL;
  486. }
  487. snd_soc_component_write(component, WM8750_IFACE, iface);
  488. return 0;
  489. }
  490. static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
  491. struct snd_pcm_hw_params *params,
  492. struct snd_soc_dai *dai)
  493. {
  494. struct snd_soc_component *component = dai->component;
  495. struct wm8750_priv *wm8750 = snd_soc_component_get_drvdata(component);
  496. u16 iface = snd_soc_component_read(component, WM8750_IFACE) & 0x1f3;
  497. u16 srate = snd_soc_component_read(component, WM8750_SRATE) & 0x1c0;
  498. int coeff = get_coeff(wm8750->sysclk, params_rate(params));
  499. /* bit size */
  500. switch (params_width(params)) {
  501. case 16:
  502. break;
  503. case 20:
  504. iface |= 0x0004;
  505. break;
  506. case 24:
  507. iface |= 0x0008;
  508. break;
  509. case 32:
  510. iface |= 0x000c;
  511. break;
  512. }
  513. /* set iface & srate */
  514. snd_soc_component_write(component, WM8750_IFACE, iface);
  515. if (coeff >= 0)
  516. snd_soc_component_write(component, WM8750_SRATE, srate |
  517. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  518. return 0;
  519. }
  520. static int wm8750_mute(struct snd_soc_dai *dai, int mute, int direction)
  521. {
  522. struct snd_soc_component *component = dai->component;
  523. u16 mute_reg = snd_soc_component_read(component, WM8750_ADCDAC) & 0xfff7;
  524. if (mute)
  525. snd_soc_component_write(component, WM8750_ADCDAC, mute_reg | 0x8);
  526. else
  527. snd_soc_component_write(component, WM8750_ADCDAC, mute_reg);
  528. return 0;
  529. }
  530. static int wm8750_set_bias_level(struct snd_soc_component *component,
  531. enum snd_soc_bias_level level)
  532. {
  533. u16 pwr_reg = snd_soc_component_read(component, WM8750_PWR1) & 0xfe3e;
  534. switch (level) {
  535. case SND_SOC_BIAS_ON:
  536. /* set vmid to 50k and unmute dac */
  537. snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x00c0);
  538. break;
  539. case SND_SOC_BIAS_PREPARE:
  540. break;
  541. case SND_SOC_BIAS_STANDBY:
  542. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  543. snd_soc_component_cache_sync(component);
  544. /* Set VMID to 5k */
  545. snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x01c1);
  546. /* ...and ramp */
  547. msleep(1000);
  548. }
  549. /* mute dac and set vmid to 500k, enable VREF */
  550. snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x0141);
  551. break;
  552. case SND_SOC_BIAS_OFF:
  553. snd_soc_component_write(component, WM8750_PWR1, 0x0001);
  554. break;
  555. }
  556. return 0;
  557. }
  558. #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  559. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
  560. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  561. #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  562. SNDRV_PCM_FMTBIT_S24_LE)
  563. static const struct snd_soc_dai_ops wm8750_dai_ops = {
  564. .hw_params = wm8750_pcm_hw_params,
  565. .mute_stream = wm8750_mute,
  566. .set_fmt = wm8750_set_dai_fmt,
  567. .set_sysclk = wm8750_set_dai_sysclk,
  568. .no_capture_mute = 1,
  569. };
  570. static struct snd_soc_dai_driver wm8750_dai = {
  571. .name = "wm8750-hifi",
  572. .playback = {
  573. .stream_name = "Playback",
  574. .channels_min = 1,
  575. .channels_max = 2,
  576. .rates = WM8750_RATES,
  577. .formats = WM8750_FORMATS,},
  578. .capture = {
  579. .stream_name = "Capture",
  580. .channels_min = 1,
  581. .channels_max = 2,
  582. .rates = WM8750_RATES,
  583. .formats = WM8750_FORMATS,},
  584. .ops = &wm8750_dai_ops,
  585. };
  586. static int wm8750_probe(struct snd_soc_component *component)
  587. {
  588. int ret;
  589. ret = wm8750_reset(component);
  590. if (ret < 0) {
  591. printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
  592. return ret;
  593. }
  594. /* set the update bits */
  595. snd_soc_component_update_bits(component, WM8750_LDAC, 0x0100, 0x0100);
  596. snd_soc_component_update_bits(component, WM8750_RDAC, 0x0100, 0x0100);
  597. snd_soc_component_update_bits(component, WM8750_LOUT1V, 0x0100, 0x0100);
  598. snd_soc_component_update_bits(component, WM8750_ROUT1V, 0x0100, 0x0100);
  599. snd_soc_component_update_bits(component, WM8750_LOUT2V, 0x0100, 0x0100);
  600. snd_soc_component_update_bits(component, WM8750_ROUT2V, 0x0100, 0x0100);
  601. snd_soc_component_update_bits(component, WM8750_LINVOL, 0x0100, 0x0100);
  602. snd_soc_component_update_bits(component, WM8750_RINVOL, 0x0100, 0x0100);
  603. return ret;
  604. }
  605. static const struct snd_soc_component_driver soc_component_dev_wm8750 = {
  606. .probe = wm8750_probe,
  607. .set_bias_level = wm8750_set_bias_level,
  608. .controls = wm8750_snd_controls,
  609. .num_controls = ARRAY_SIZE(wm8750_snd_controls),
  610. .dapm_widgets = wm8750_dapm_widgets,
  611. .num_dapm_widgets = ARRAY_SIZE(wm8750_dapm_widgets),
  612. .dapm_routes = wm8750_dapm_routes,
  613. .num_dapm_routes = ARRAY_SIZE(wm8750_dapm_routes),
  614. .suspend_bias_off = 1,
  615. .idle_bias_on = 1,
  616. .use_pmdown_time = 1,
  617. .endianness = 1,
  618. .non_legacy_dai_naming = 1,
  619. };
  620. static const struct of_device_id wm8750_of_match[] = {
  621. { .compatible = "wlf,wm8750", },
  622. { .compatible = "wlf,wm8987", },
  623. { }
  624. };
  625. MODULE_DEVICE_TABLE(of, wm8750_of_match);
  626. static const struct regmap_config wm8750_regmap = {
  627. .reg_bits = 7,
  628. .val_bits = 9,
  629. .max_register = WM8750_MOUTV,
  630. .reg_defaults = wm8750_reg_defaults,
  631. .num_reg_defaults = ARRAY_SIZE(wm8750_reg_defaults),
  632. .cache_type = REGCACHE_RBTREE,
  633. };
  634. #if defined(CONFIG_SPI_MASTER)
  635. static int wm8750_spi_probe(struct spi_device *spi)
  636. {
  637. struct wm8750_priv *wm8750;
  638. struct regmap *regmap;
  639. int ret;
  640. wm8750 = devm_kzalloc(&spi->dev, sizeof(struct wm8750_priv),
  641. GFP_KERNEL);
  642. if (wm8750 == NULL)
  643. return -ENOMEM;
  644. regmap = devm_regmap_init_spi(spi, &wm8750_regmap);
  645. if (IS_ERR(regmap))
  646. return PTR_ERR(regmap);
  647. spi_set_drvdata(spi, wm8750);
  648. ret = devm_snd_soc_register_component(&spi->dev,
  649. &soc_component_dev_wm8750, &wm8750_dai, 1);
  650. return ret;
  651. }
  652. static const struct spi_device_id wm8750_spi_ids[] = {
  653. { "wm8750", 0 },
  654. { "wm8987", 0 },
  655. { },
  656. };
  657. MODULE_DEVICE_TABLE(spi, wm8750_spi_ids);
  658. static struct spi_driver wm8750_spi_driver = {
  659. .driver = {
  660. .name = "wm8750",
  661. .of_match_table = wm8750_of_match,
  662. },
  663. .id_table = wm8750_spi_ids,
  664. .probe = wm8750_spi_probe,
  665. };
  666. #endif /* CONFIG_SPI_MASTER */
  667. #if IS_ENABLED(CONFIG_I2C)
  668. static int wm8750_i2c_probe(struct i2c_client *i2c,
  669. const struct i2c_device_id *id)
  670. {
  671. struct wm8750_priv *wm8750;
  672. struct regmap *regmap;
  673. int ret;
  674. wm8750 = devm_kzalloc(&i2c->dev, sizeof(struct wm8750_priv),
  675. GFP_KERNEL);
  676. if (wm8750 == NULL)
  677. return -ENOMEM;
  678. i2c_set_clientdata(i2c, wm8750);
  679. regmap = devm_regmap_init_i2c(i2c, &wm8750_regmap);
  680. if (IS_ERR(regmap))
  681. return PTR_ERR(regmap);
  682. ret = devm_snd_soc_register_component(&i2c->dev,
  683. &soc_component_dev_wm8750, &wm8750_dai, 1);
  684. return ret;
  685. }
  686. static const struct i2c_device_id wm8750_i2c_id[] = {
  687. { "wm8750", 0 },
  688. { "wm8987", 0 },
  689. { }
  690. };
  691. MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
  692. static struct i2c_driver wm8750_i2c_driver = {
  693. .driver = {
  694. .name = "wm8750",
  695. .of_match_table = wm8750_of_match,
  696. },
  697. .probe = wm8750_i2c_probe,
  698. .id_table = wm8750_i2c_id,
  699. };
  700. #endif
  701. static int __init wm8750_modinit(void)
  702. {
  703. int ret = 0;
  704. #if IS_ENABLED(CONFIG_I2C)
  705. ret = i2c_add_driver(&wm8750_i2c_driver);
  706. if (ret != 0) {
  707. printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n",
  708. ret);
  709. }
  710. #endif
  711. #if defined(CONFIG_SPI_MASTER)
  712. ret = spi_register_driver(&wm8750_spi_driver);
  713. if (ret != 0) {
  714. printk(KERN_ERR "Failed to register wm8750 SPI driver: %d\n",
  715. ret);
  716. }
  717. #endif
  718. return ret;
  719. }
  720. module_init(wm8750_modinit);
  721. static void __exit wm8750_exit(void)
  722. {
  723. #if IS_ENABLED(CONFIG_I2C)
  724. i2c_del_driver(&wm8750_i2c_driver);
  725. #endif
  726. #if defined(CONFIG_SPI_MASTER)
  727. spi_unregister_driver(&wm8750_spi_driver);
  728. #endif
  729. }
  730. module_exit(wm8750_exit);
  731. MODULE_DESCRIPTION("ASoC WM8750 driver");
  732. MODULE_AUTHOR("Liam Girdwood");
  733. MODULE_LICENSE("GPL");