wm8737.h 17 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. #ifndef _WM8737_H
  3. #define _WM8737_H
  4. /*
  5. * wm8737.c -- WM8523 ALSA SoC Audio driver
  6. *
  7. * Copyright 2010 Wolfson Microelectronics plc
  8. *
  9. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  10. */
  11. /*
  12. * Register values.
  13. */
  14. #define WM8737_LEFT_PGA_VOLUME 0x00
  15. #define WM8737_RIGHT_PGA_VOLUME 0x01
  16. #define WM8737_AUDIO_PATH_L 0x02
  17. #define WM8737_AUDIO_PATH_R 0x03
  18. #define WM8737_3D_ENHANCE 0x04
  19. #define WM8737_ADC_CONTROL 0x05
  20. #define WM8737_POWER_MANAGEMENT 0x06
  21. #define WM8737_AUDIO_FORMAT 0x07
  22. #define WM8737_CLOCKING 0x08
  23. #define WM8737_MIC_PREAMP_CONTROL 0x09
  24. #define WM8737_MISC_BIAS_CONTROL 0x0A
  25. #define WM8737_NOISE_GATE 0x0B
  26. #define WM8737_ALC1 0x0C
  27. #define WM8737_ALC2 0x0D
  28. #define WM8737_ALC3 0x0E
  29. #define WM8737_RESET 0x0F
  30. #define WM8737_REGISTER_COUNT 16
  31. #define WM8737_MAX_REGISTER 0x0F
  32. /*
  33. * Field Definitions.
  34. */
  35. /*
  36. * R0 (0x00) - Left PGA volume
  37. */
  38. #define WM8737_LVU 0x0100 /* LVU */
  39. #define WM8737_LVU_MASK 0x0100 /* LVU */
  40. #define WM8737_LVU_SHIFT 8 /* LVU */
  41. #define WM8737_LVU_WIDTH 1 /* LVU */
  42. #define WM8737_LINVOL_MASK 0x00FF /* LINVOL - [7:0] */
  43. #define WM8737_LINVOL_SHIFT 0 /* LINVOL - [7:0] */
  44. #define WM8737_LINVOL_WIDTH 8 /* LINVOL - [7:0] */
  45. /*
  46. * R1 (0x01) - Right PGA volume
  47. */
  48. #define WM8737_RVU 0x0100 /* RVU */
  49. #define WM8737_RVU_MASK 0x0100 /* RVU */
  50. #define WM8737_RVU_SHIFT 8 /* RVU */
  51. #define WM8737_RVU_WIDTH 1 /* RVU */
  52. #define WM8737_RINVOL_MASK 0x00FF /* RINVOL - [7:0] */
  53. #define WM8737_RINVOL_SHIFT 0 /* RINVOL - [7:0] */
  54. #define WM8737_RINVOL_WIDTH 8 /* RINVOL - [7:0] */
  55. /*
  56. * R2 (0x02) - AUDIO path L
  57. */
  58. #define WM8737_LINSEL_MASK 0x0180 /* LINSEL - [8:7] */
  59. #define WM8737_LINSEL_SHIFT 7 /* LINSEL - [8:7] */
  60. #define WM8737_LINSEL_WIDTH 2 /* LINSEL - [8:7] */
  61. #define WM8737_LMICBOOST_MASK 0x0060 /* LMICBOOST - [6:5] */
  62. #define WM8737_LMICBOOST_SHIFT 5 /* LMICBOOST - [6:5] */
  63. #define WM8737_LMICBOOST_WIDTH 2 /* LMICBOOST - [6:5] */
  64. #define WM8737_LMBE 0x0010 /* LMBE */
  65. #define WM8737_LMBE_MASK 0x0010 /* LMBE */
  66. #define WM8737_LMBE_SHIFT 4 /* LMBE */
  67. #define WM8737_LMBE_WIDTH 1 /* LMBE */
  68. #define WM8737_LMZC 0x0008 /* LMZC */
  69. #define WM8737_LMZC_MASK 0x0008 /* LMZC */
  70. #define WM8737_LMZC_SHIFT 3 /* LMZC */
  71. #define WM8737_LMZC_WIDTH 1 /* LMZC */
  72. #define WM8737_LPZC 0x0004 /* LPZC */
  73. #define WM8737_LPZC_MASK 0x0004 /* LPZC */
  74. #define WM8737_LPZC_SHIFT 2 /* LPZC */
  75. #define WM8737_LPZC_WIDTH 1 /* LPZC */
  76. #define WM8737_LZCTO_MASK 0x0003 /* LZCTO - [1:0] */
  77. #define WM8737_LZCTO_SHIFT 0 /* LZCTO - [1:0] */
  78. #define WM8737_LZCTO_WIDTH 2 /* LZCTO - [1:0] */
  79. /*
  80. * R3 (0x03) - AUDIO path R
  81. */
  82. #define WM8737_RINSEL_MASK 0x0180 /* RINSEL - [8:7] */
  83. #define WM8737_RINSEL_SHIFT 7 /* RINSEL - [8:7] */
  84. #define WM8737_RINSEL_WIDTH 2 /* RINSEL - [8:7] */
  85. #define WM8737_RMICBOOST_MASK 0x0060 /* RMICBOOST - [6:5] */
  86. #define WM8737_RMICBOOST_SHIFT 5 /* RMICBOOST - [6:5] */
  87. #define WM8737_RMICBOOST_WIDTH 2 /* RMICBOOST - [6:5] */
  88. #define WM8737_RMBE 0x0010 /* RMBE */
  89. #define WM8737_RMBE_MASK 0x0010 /* RMBE */
  90. #define WM8737_RMBE_SHIFT 4 /* RMBE */
  91. #define WM8737_RMBE_WIDTH 1 /* RMBE */
  92. #define WM8737_RMZC 0x0008 /* RMZC */
  93. #define WM8737_RMZC_MASK 0x0008 /* RMZC */
  94. #define WM8737_RMZC_SHIFT 3 /* RMZC */
  95. #define WM8737_RMZC_WIDTH 1 /* RMZC */
  96. #define WM8737_RPZC 0x0004 /* RPZC */
  97. #define WM8737_RPZC_MASK 0x0004 /* RPZC */
  98. #define WM8737_RPZC_SHIFT 2 /* RPZC */
  99. #define WM8737_RPZC_WIDTH 1 /* RPZC */
  100. #define WM8737_RZCTO_MASK 0x0003 /* RZCTO - [1:0] */
  101. #define WM8737_RZCTO_SHIFT 0 /* RZCTO - [1:0] */
  102. #define WM8737_RZCTO_WIDTH 2 /* RZCTO - [1:0] */
  103. /*
  104. * R4 (0x04) - 3D Enhance
  105. */
  106. #define WM8737_DIV2 0x0080 /* DIV2 */
  107. #define WM8737_DIV2_MASK 0x0080 /* DIV2 */
  108. #define WM8737_DIV2_SHIFT 7 /* DIV2 */
  109. #define WM8737_DIV2_WIDTH 1 /* DIV2 */
  110. #define WM8737_3DLC 0x0040 /* 3DLC */
  111. #define WM8737_3DLC_MASK 0x0040 /* 3DLC */
  112. #define WM8737_3DLC_SHIFT 6 /* 3DLC */
  113. #define WM8737_3DLC_WIDTH 1 /* 3DLC */
  114. #define WM8737_3DUC 0x0020 /* 3DUC */
  115. #define WM8737_3DUC_MASK 0x0020 /* 3DUC */
  116. #define WM8737_3DUC_SHIFT 5 /* 3DUC */
  117. #define WM8737_3DUC_WIDTH 1 /* 3DUC */
  118. #define WM8737_3DDEPTH_MASK 0x001E /* 3DDEPTH - [4:1] */
  119. #define WM8737_3DDEPTH_SHIFT 1 /* 3DDEPTH - [4:1] */
  120. #define WM8737_3DDEPTH_WIDTH 4 /* 3DDEPTH - [4:1] */
  121. #define WM8737_3DE 0x0001 /* 3DE */
  122. #define WM8737_3DE_MASK 0x0001 /* 3DE */
  123. #define WM8737_3DE_SHIFT 0 /* 3DE */
  124. #define WM8737_3DE_WIDTH 1 /* 3DE */
  125. /*
  126. * R5 (0x05) - ADC Control
  127. */
  128. #define WM8737_MONOMIX_MASK 0x0180 /* MONOMIX - [8:7] */
  129. #define WM8737_MONOMIX_SHIFT 7 /* MONOMIX - [8:7] */
  130. #define WM8737_MONOMIX_WIDTH 2 /* MONOMIX - [8:7] */
  131. #define WM8737_POLARITY_MASK 0x0060 /* POLARITY - [6:5] */
  132. #define WM8737_POLARITY_SHIFT 5 /* POLARITY - [6:5] */
  133. #define WM8737_POLARITY_WIDTH 2 /* POLARITY - [6:5] */
  134. #define WM8737_HPOR 0x0010 /* HPOR */
  135. #define WM8737_HPOR_MASK 0x0010 /* HPOR */
  136. #define WM8737_HPOR_SHIFT 4 /* HPOR */
  137. #define WM8737_HPOR_WIDTH 1 /* HPOR */
  138. #define WM8737_LP 0x0004 /* LP */
  139. #define WM8737_LP_MASK 0x0004 /* LP */
  140. #define WM8737_LP_SHIFT 2 /* LP */
  141. #define WM8737_LP_WIDTH 1 /* LP */
  142. #define WM8737_MONOUT 0x0002 /* MONOUT */
  143. #define WM8737_MONOUT_MASK 0x0002 /* MONOUT */
  144. #define WM8737_MONOUT_SHIFT 1 /* MONOUT */
  145. #define WM8737_MONOUT_WIDTH 1 /* MONOUT */
  146. #define WM8737_ADCHPD 0x0001 /* ADCHPD */
  147. #define WM8737_ADCHPD_MASK 0x0001 /* ADCHPD */
  148. #define WM8737_ADCHPD_SHIFT 0 /* ADCHPD */
  149. #define WM8737_ADCHPD_WIDTH 1 /* ADCHPD */
  150. /*
  151. * R6 (0x06) - Power Management
  152. */
  153. #define WM8737_VMID 0x0100 /* VMID */
  154. #define WM8737_VMID_MASK 0x0100 /* VMID */
  155. #define WM8737_VMID_SHIFT 8 /* VMID */
  156. #define WM8737_VMID_WIDTH 1 /* VMID */
  157. #define WM8737_VREF 0x0080 /* VREF */
  158. #define WM8737_VREF_MASK 0x0080 /* VREF */
  159. #define WM8737_VREF_SHIFT 7 /* VREF */
  160. #define WM8737_VREF_WIDTH 1 /* VREF */
  161. #define WM8737_AI 0x0040 /* AI */
  162. #define WM8737_AI_MASK 0x0040 /* AI */
  163. #define WM8737_AI_SHIFT 6 /* AI */
  164. #define WM8737_AI_WIDTH 1 /* AI */
  165. #define WM8737_PGL 0x0020 /* PGL */
  166. #define WM8737_PGL_MASK 0x0020 /* PGL */
  167. #define WM8737_PGL_SHIFT 5 /* PGL */
  168. #define WM8737_PGL_WIDTH 1 /* PGL */
  169. #define WM8737_PGR 0x0010 /* PGR */
  170. #define WM8737_PGR_MASK 0x0010 /* PGR */
  171. #define WM8737_PGR_SHIFT 4 /* PGR */
  172. #define WM8737_PGR_WIDTH 1 /* PGR */
  173. #define WM8737_ADL 0x0008 /* ADL */
  174. #define WM8737_ADL_MASK 0x0008 /* ADL */
  175. #define WM8737_ADL_SHIFT 3 /* ADL */
  176. #define WM8737_ADL_WIDTH 1 /* ADL */
  177. #define WM8737_ADR 0x0004 /* ADR */
  178. #define WM8737_ADR_MASK 0x0004 /* ADR */
  179. #define WM8737_ADR_SHIFT 2 /* ADR */
  180. #define WM8737_ADR_WIDTH 1 /* ADR */
  181. #define WM8737_MICBIAS_MASK 0x0003 /* MICBIAS - [1:0] */
  182. #define WM8737_MICBIAS_SHIFT 0 /* MICBIAS - [1:0] */
  183. #define WM8737_MICBIAS_WIDTH 2 /* MICBIAS - [1:0] */
  184. /*
  185. * R7 (0x07) - Audio Format
  186. */
  187. #define WM8737_SDODIS 0x0080 /* SDODIS */
  188. #define WM8737_SDODIS_MASK 0x0080 /* SDODIS */
  189. #define WM8737_SDODIS_SHIFT 7 /* SDODIS */
  190. #define WM8737_SDODIS_WIDTH 1 /* SDODIS */
  191. #define WM8737_MS 0x0040 /* MS */
  192. #define WM8737_MS_MASK 0x0040 /* MS */
  193. #define WM8737_MS_SHIFT 6 /* MS */
  194. #define WM8737_MS_WIDTH 1 /* MS */
  195. #define WM8737_LRP 0x0010 /* LRP */
  196. #define WM8737_LRP_MASK 0x0010 /* LRP */
  197. #define WM8737_LRP_SHIFT 4 /* LRP */
  198. #define WM8737_LRP_WIDTH 1 /* LRP */
  199. #define WM8737_WL_MASK 0x000C /* WL - [3:2] */
  200. #define WM8737_WL_SHIFT 2 /* WL - [3:2] */
  201. #define WM8737_WL_WIDTH 2 /* WL - [3:2] */
  202. #define WM8737_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */
  203. #define WM8737_FORMAT_SHIFT 0 /* FORMAT - [1:0] */
  204. #define WM8737_FORMAT_WIDTH 2 /* FORMAT - [1:0] */
  205. /*
  206. * R8 (0x08) - Clocking
  207. */
  208. #define WM8737_AUTODETECT 0x0080 /* AUTODETECT */
  209. #define WM8737_AUTODETECT_MASK 0x0080 /* AUTODETECT */
  210. #define WM8737_AUTODETECT_SHIFT 7 /* AUTODETECT */
  211. #define WM8737_AUTODETECT_WIDTH 1 /* AUTODETECT */
  212. #define WM8737_CLKDIV2 0x0040 /* CLKDIV2 */
  213. #define WM8737_CLKDIV2_MASK 0x0040 /* CLKDIV2 */
  214. #define WM8737_CLKDIV2_SHIFT 6 /* CLKDIV2 */
  215. #define WM8737_CLKDIV2_WIDTH 1 /* CLKDIV2 */
  216. #define WM8737_SR_MASK 0x003E /* SR - [5:1] */
  217. #define WM8737_SR_SHIFT 1 /* SR - [5:1] */
  218. #define WM8737_SR_WIDTH 5 /* SR - [5:1] */
  219. #define WM8737_USB_MODE 0x0001 /* USB MODE */
  220. #define WM8737_USB_MODE_MASK 0x0001 /* USB MODE */
  221. #define WM8737_USB_MODE_SHIFT 0 /* USB MODE */
  222. #define WM8737_USB_MODE_WIDTH 1 /* USB MODE */
  223. /*
  224. * R9 (0x09) - MIC Preamp Control
  225. */
  226. #define WM8737_RBYPEN 0x0008 /* RBYPEN */
  227. #define WM8737_RBYPEN_MASK 0x0008 /* RBYPEN */
  228. #define WM8737_RBYPEN_SHIFT 3 /* RBYPEN */
  229. #define WM8737_RBYPEN_WIDTH 1 /* RBYPEN */
  230. #define WM8737_LBYPEN 0x0004 /* LBYPEN */
  231. #define WM8737_LBYPEN_MASK 0x0004 /* LBYPEN */
  232. #define WM8737_LBYPEN_SHIFT 2 /* LBYPEN */
  233. #define WM8737_LBYPEN_WIDTH 1 /* LBYPEN */
  234. #define WM8737_MBCTRL_MASK 0x0003 /* MBCTRL - [1:0] */
  235. #define WM8737_MBCTRL_SHIFT 0 /* MBCTRL - [1:0] */
  236. #define WM8737_MBCTRL_WIDTH 2 /* MBCTRL - [1:0] */
  237. /*
  238. * R10 (0x0A) - Misc Bias Control
  239. */
  240. #define WM8737_VMIDSEL_MASK 0x000C /* VMIDSEL - [3:2] */
  241. #define WM8737_VMIDSEL_SHIFT 2 /* VMIDSEL - [3:2] */
  242. #define WM8737_VMIDSEL_WIDTH 2 /* VMIDSEL - [3:2] */
  243. #define WM8737_LINPUT1_DC_BIAS_ENABLE 0x0002 /* LINPUT1 DC BIAS ENABLE */
  244. #define WM8737_LINPUT1_DC_BIAS_ENABLE_MASK 0x0002 /* LINPUT1 DC BIAS ENABLE */
  245. #define WM8737_LINPUT1_DC_BIAS_ENABLE_SHIFT 1 /* LINPUT1 DC BIAS ENABLE */
  246. #define WM8737_LINPUT1_DC_BIAS_ENABLE_WIDTH 1 /* LINPUT1 DC BIAS ENABLE */
  247. #define WM8737_RINPUT1_DC_BIAS_ENABLE 0x0001 /* RINPUT1 DC BIAS ENABLE */
  248. #define WM8737_RINPUT1_DC_BIAS_ENABLE_MASK 0x0001 /* RINPUT1 DC BIAS ENABLE */
  249. #define WM8737_RINPUT1_DC_BIAS_ENABLE_SHIFT 0 /* RINPUT1 DC BIAS ENABLE */
  250. #define WM8737_RINPUT1_DC_BIAS_ENABLE_WIDTH 1 /* RINPUT1 DC BIAS ENABLE */
  251. /*
  252. * R11 (0x0B) - Noise Gate
  253. */
  254. #define WM8737_NGTH_MASK 0x001C /* NGTH - [4:2] */
  255. #define WM8737_NGTH_SHIFT 2 /* NGTH - [4:2] */
  256. #define WM8737_NGTH_WIDTH 3 /* NGTH - [4:2] */
  257. #define WM8737_NGAT 0x0001 /* NGAT */
  258. #define WM8737_NGAT_MASK 0x0001 /* NGAT */
  259. #define WM8737_NGAT_SHIFT 0 /* NGAT */
  260. #define WM8737_NGAT_WIDTH 1 /* NGAT */
  261. /*
  262. * R12 (0x0C) - ALC1
  263. */
  264. #define WM8737_ALCSEL_MASK 0x0180 /* ALCSEL - [8:7] */
  265. #define WM8737_ALCSEL_SHIFT 7 /* ALCSEL - [8:7] */
  266. #define WM8737_ALCSEL_WIDTH 2 /* ALCSEL - [8:7] */
  267. #define WM8737_MAX_GAIN_MASK 0x0070 /* MAX GAIN - [6:4] */
  268. #define WM8737_MAX_GAIN_SHIFT 4 /* MAX GAIN - [6:4] */
  269. #define WM8737_MAX_GAIN_WIDTH 3 /* MAX GAIN - [6:4] */
  270. #define WM8737_ALCL_MASK 0x000F /* ALCL - [3:0] */
  271. #define WM8737_ALCL_SHIFT 0 /* ALCL - [3:0] */
  272. #define WM8737_ALCL_WIDTH 4 /* ALCL - [3:0] */
  273. /*
  274. * R13 (0x0D) - ALC2
  275. */
  276. #define WM8737_ALCZCE 0x0010 /* ALCZCE */
  277. #define WM8737_ALCZCE_MASK 0x0010 /* ALCZCE */
  278. #define WM8737_ALCZCE_SHIFT 4 /* ALCZCE */
  279. #define WM8737_ALCZCE_WIDTH 1 /* ALCZCE */
  280. #define WM8737_HLD_MASK 0x000F /* HLD - [3:0] */
  281. #define WM8737_HLD_SHIFT 0 /* HLD - [3:0] */
  282. #define WM8737_HLD_WIDTH 4 /* HLD - [3:0] */
  283. /*
  284. * R14 (0x0E) - ALC3
  285. */
  286. #define WM8737_DCY_MASK 0x00F0 /* DCY - [7:4] */
  287. #define WM8737_DCY_SHIFT 4 /* DCY - [7:4] */
  288. #define WM8737_DCY_WIDTH 4 /* DCY - [7:4] */
  289. #define WM8737_ATK_MASK 0x000F /* ATK - [3:0] */
  290. #define WM8737_ATK_SHIFT 0 /* ATK - [3:0] */
  291. #define WM8737_ATK_WIDTH 4 /* ATK - [3:0] */
  292. /*
  293. * R15 (0x0F) - Reset
  294. */
  295. #define WM8737_RESET_MASK 0x01FF /* RESET - [8:0] */
  296. #define WM8737_RESET_SHIFT 0 /* RESET - [8:0] */
  297. #define WM8737_RESET_WIDTH 9 /* RESET - [8:0] */
  298. #endif