wm8523.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8523.c -- WM8523 ALSA SoC Audio driver
  4. *
  5. * Copyright 2009 Wolfson Microelectronics plc
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/i2c.h>
  15. #include <linux/regmap.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/of_device.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <sound/initval.h>
  24. #include <sound/tlv.h>
  25. #include "wm8523.h"
  26. #define WM8523_NUM_SUPPLIES 2
  27. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  28. "AVDD",
  29. "LINEVDD",
  30. };
  31. #define WM8523_NUM_RATES 7
  32. /* codec private data */
  33. struct wm8523_priv {
  34. struct regmap *regmap;
  35. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  36. unsigned int sysclk;
  37. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  38. struct snd_pcm_hw_constraint_list rate_constraint;
  39. };
  40. static const struct reg_default wm8523_reg_defaults[] = {
  41. { 2, 0x0000 }, /* R2 - PSCTRL1 */
  42. { 3, 0x1812 }, /* R3 - AIF_CTRL1 */
  43. { 4, 0x0000 }, /* R4 - AIF_CTRL2 */
  44. { 5, 0x0001 }, /* R5 - DAC_CTRL3 */
  45. { 6, 0x0190 }, /* R6 - DAC_GAINL */
  46. { 7, 0x0190 }, /* R7 - DAC_GAINR */
  47. { 8, 0x0000 }, /* R8 - ZERO_DETECT */
  48. };
  49. static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
  50. {
  51. switch (reg) {
  52. case WM8523_DEVICE_ID:
  53. case WM8523_REVISION:
  54. return true;
  55. default:
  56. return false;
  57. }
  58. }
  59. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  60. static const char *wm8523_zd_count_text[] = {
  61. "1024",
  62. "2048",
  63. };
  64. static SOC_ENUM_SINGLE_DECL(wm8523_zc_count, WM8523_ZERO_DETECT, 0,
  65. wm8523_zd_count_text);
  66. static const struct snd_kcontrol_new wm8523_controls[] = {
  67. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  68. 0, 448, 0, dac_tlv),
  69. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  70. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  71. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  72. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  73. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  74. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  75. };
  76. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  77. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  78. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  79. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  80. };
  81. static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
  82. { "LINEVOUTL", NULL, "DAC" },
  83. { "LINEVOUTR", NULL, "DAC" },
  84. };
  85. static const struct {
  86. int value;
  87. int ratio;
  88. } lrclk_ratios[WM8523_NUM_RATES] = {
  89. { 1, 128 },
  90. { 2, 192 },
  91. { 3, 256 },
  92. { 4, 384 },
  93. { 5, 512 },
  94. { 6, 768 },
  95. { 7, 1152 },
  96. };
  97. static const struct {
  98. int value;
  99. int ratio;
  100. } bclk_ratios[] = {
  101. { 2, 32 },
  102. { 3, 64 },
  103. { 4, 128 },
  104. };
  105. static int wm8523_startup(struct snd_pcm_substream *substream,
  106. struct snd_soc_dai *dai)
  107. {
  108. struct snd_soc_component *component = dai->component;
  109. struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
  110. /* The set of sample rates that can be supported depends on the
  111. * MCLK supplied to the CODEC - enforce this.
  112. */
  113. if (!wm8523->sysclk) {
  114. dev_err(component->dev,
  115. "No MCLK configured, call set_sysclk() on init\n");
  116. return -EINVAL;
  117. }
  118. snd_pcm_hw_constraint_list(substream->runtime, 0,
  119. SNDRV_PCM_HW_PARAM_RATE,
  120. &wm8523->rate_constraint);
  121. return 0;
  122. }
  123. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  124. struct snd_pcm_hw_params *params,
  125. struct snd_soc_dai *dai)
  126. {
  127. struct snd_soc_component *component = dai->component;
  128. struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
  129. int i;
  130. u16 aifctrl1 = snd_soc_component_read(component, WM8523_AIF_CTRL1);
  131. u16 aifctrl2 = snd_soc_component_read(component, WM8523_AIF_CTRL2);
  132. /* Find a supported LRCLK ratio */
  133. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  134. if (wm8523->sysclk / params_rate(params) ==
  135. lrclk_ratios[i].ratio)
  136. break;
  137. }
  138. /* Should never happen, should be handled by constraints */
  139. if (i == ARRAY_SIZE(lrclk_ratios)) {
  140. dev_err(component->dev, "MCLK/fs ratio %d unsupported\n",
  141. wm8523->sysclk / params_rate(params));
  142. return -EINVAL;
  143. }
  144. aifctrl2 &= ~WM8523_SR_MASK;
  145. aifctrl2 |= lrclk_ratios[i].value;
  146. if (aifctrl1 & WM8523_AIF_MSTR) {
  147. /* Find a fs->bclk ratio */
  148. for (i = 0; i < ARRAY_SIZE(bclk_ratios); i++)
  149. if (params_width(params) * 2 <= bclk_ratios[i].ratio)
  150. break;
  151. if (i == ARRAY_SIZE(bclk_ratios)) {
  152. dev_err(component->dev,
  153. "No matching BCLK/fs ratio for word length %d\n",
  154. params_width(params));
  155. return -EINVAL;
  156. }
  157. aifctrl2 &= ~WM8523_BCLKDIV_MASK;
  158. aifctrl2 |= bclk_ratios[i].value << WM8523_BCLKDIV_SHIFT;
  159. }
  160. aifctrl1 &= ~WM8523_WL_MASK;
  161. switch (params_width(params)) {
  162. case 16:
  163. break;
  164. case 20:
  165. aifctrl1 |= 0x8;
  166. break;
  167. case 24:
  168. aifctrl1 |= 0x10;
  169. break;
  170. case 32:
  171. aifctrl1 |= 0x18;
  172. break;
  173. }
  174. snd_soc_component_write(component, WM8523_AIF_CTRL1, aifctrl1);
  175. snd_soc_component_write(component, WM8523_AIF_CTRL2, aifctrl2);
  176. return 0;
  177. }
  178. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  179. int clk_id, unsigned int freq, int dir)
  180. {
  181. struct snd_soc_component *component = codec_dai->component;
  182. struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
  183. unsigned int val;
  184. int i;
  185. wm8523->sysclk = freq;
  186. wm8523->rate_constraint.count = 0;
  187. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  188. val = freq / lrclk_ratios[i].ratio;
  189. /* Check that it's a standard rate since core can't
  190. * cope with others and having the odd rates confuses
  191. * constraint matching.
  192. */
  193. switch (val) {
  194. case 8000:
  195. case 11025:
  196. case 16000:
  197. case 22050:
  198. case 32000:
  199. case 44100:
  200. case 48000:
  201. case 64000:
  202. case 88200:
  203. case 96000:
  204. case 176400:
  205. case 192000:
  206. dev_dbg(component->dev, "Supported sample rate: %dHz\n",
  207. val);
  208. wm8523->rate_constraint_list[i] = val;
  209. wm8523->rate_constraint.count++;
  210. break;
  211. default:
  212. dev_dbg(component->dev, "Skipping sample rate: %dHz\n",
  213. val);
  214. }
  215. }
  216. /* Need at least one supported rate... */
  217. if (wm8523->rate_constraint.count == 0)
  218. return -EINVAL;
  219. return 0;
  220. }
  221. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  222. unsigned int fmt)
  223. {
  224. struct snd_soc_component *component = codec_dai->component;
  225. u16 aifctrl1 = snd_soc_component_read(component, WM8523_AIF_CTRL1);
  226. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  227. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  228. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  229. case SND_SOC_DAIFMT_CBM_CFM:
  230. aifctrl1 |= WM8523_AIF_MSTR;
  231. break;
  232. case SND_SOC_DAIFMT_CBS_CFS:
  233. break;
  234. default:
  235. return -EINVAL;
  236. }
  237. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  238. case SND_SOC_DAIFMT_I2S:
  239. aifctrl1 |= 0x0002;
  240. break;
  241. case SND_SOC_DAIFMT_RIGHT_J:
  242. break;
  243. case SND_SOC_DAIFMT_LEFT_J:
  244. aifctrl1 |= 0x0001;
  245. break;
  246. case SND_SOC_DAIFMT_DSP_A:
  247. aifctrl1 |= 0x0003;
  248. break;
  249. case SND_SOC_DAIFMT_DSP_B:
  250. aifctrl1 |= 0x0023;
  251. break;
  252. default:
  253. return -EINVAL;
  254. }
  255. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  256. case SND_SOC_DAIFMT_NB_NF:
  257. break;
  258. case SND_SOC_DAIFMT_IB_IF:
  259. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  260. break;
  261. case SND_SOC_DAIFMT_IB_NF:
  262. aifctrl1 |= WM8523_BCLK_INV;
  263. break;
  264. case SND_SOC_DAIFMT_NB_IF:
  265. aifctrl1 |= WM8523_LRCLK_INV;
  266. break;
  267. default:
  268. return -EINVAL;
  269. }
  270. snd_soc_component_write(component, WM8523_AIF_CTRL1, aifctrl1);
  271. return 0;
  272. }
  273. static int wm8523_set_bias_level(struct snd_soc_component *component,
  274. enum snd_soc_bias_level level)
  275. {
  276. struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
  277. int ret;
  278. switch (level) {
  279. case SND_SOC_BIAS_ON:
  280. break;
  281. case SND_SOC_BIAS_PREPARE:
  282. /* Full power on */
  283. snd_soc_component_update_bits(component, WM8523_PSCTRL1,
  284. WM8523_SYS_ENA_MASK, 3);
  285. break;
  286. case SND_SOC_BIAS_STANDBY:
  287. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  288. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  289. wm8523->supplies);
  290. if (ret != 0) {
  291. dev_err(component->dev,
  292. "Failed to enable supplies: %d\n",
  293. ret);
  294. return ret;
  295. }
  296. /* Sync back default/cached values */
  297. regcache_sync(wm8523->regmap);
  298. /* Initial power up */
  299. snd_soc_component_update_bits(component, WM8523_PSCTRL1,
  300. WM8523_SYS_ENA_MASK, 1);
  301. msleep(100);
  302. }
  303. /* Power up to mute */
  304. snd_soc_component_update_bits(component, WM8523_PSCTRL1,
  305. WM8523_SYS_ENA_MASK, 2);
  306. break;
  307. case SND_SOC_BIAS_OFF:
  308. /* The chip runs through the power down sequence for us. */
  309. snd_soc_component_update_bits(component, WM8523_PSCTRL1,
  310. WM8523_SYS_ENA_MASK, 0);
  311. msleep(100);
  312. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  313. wm8523->supplies);
  314. break;
  315. }
  316. return 0;
  317. }
  318. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  319. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  320. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  321. static const struct snd_soc_dai_ops wm8523_dai_ops = {
  322. .startup = wm8523_startup,
  323. .hw_params = wm8523_hw_params,
  324. .set_sysclk = wm8523_set_dai_sysclk,
  325. .set_fmt = wm8523_set_dai_fmt,
  326. };
  327. static struct snd_soc_dai_driver wm8523_dai = {
  328. .name = "wm8523-hifi",
  329. .playback = {
  330. .stream_name = "Playback",
  331. .channels_min = 2, /* Mono modes not yet supported */
  332. .channels_max = 2,
  333. .rates = WM8523_RATES,
  334. .formats = WM8523_FORMATS,
  335. },
  336. .ops = &wm8523_dai_ops,
  337. };
  338. static int wm8523_probe(struct snd_soc_component *component)
  339. {
  340. struct wm8523_priv *wm8523 = snd_soc_component_get_drvdata(component);
  341. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  342. wm8523->rate_constraint.count =
  343. ARRAY_SIZE(wm8523->rate_constraint_list);
  344. /* Change some default settings - latch VU and enable ZC */
  345. snd_soc_component_update_bits(component, WM8523_DAC_GAINR,
  346. WM8523_DACR_VU, WM8523_DACR_VU);
  347. snd_soc_component_update_bits(component, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
  348. return 0;
  349. }
  350. static const struct snd_soc_component_driver soc_component_dev_wm8523 = {
  351. .probe = wm8523_probe,
  352. .set_bias_level = wm8523_set_bias_level,
  353. .controls = wm8523_controls,
  354. .num_controls = ARRAY_SIZE(wm8523_controls),
  355. .dapm_widgets = wm8523_dapm_widgets,
  356. .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
  357. .dapm_routes = wm8523_dapm_routes,
  358. .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
  359. .suspend_bias_off = 1,
  360. .idle_bias_on = 1,
  361. .use_pmdown_time = 1,
  362. .endianness = 1,
  363. .non_legacy_dai_naming = 1,
  364. };
  365. static const struct of_device_id wm8523_of_match[] = {
  366. { .compatible = "wlf,wm8523" },
  367. { },
  368. };
  369. MODULE_DEVICE_TABLE(of, wm8523_of_match);
  370. static const struct regmap_config wm8523_regmap = {
  371. .reg_bits = 8,
  372. .val_bits = 16,
  373. .max_register = WM8523_ZERO_DETECT,
  374. .reg_defaults = wm8523_reg_defaults,
  375. .num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
  376. .cache_type = REGCACHE_RBTREE,
  377. .volatile_reg = wm8523_volatile_register,
  378. };
  379. static int wm8523_i2c_probe(struct i2c_client *i2c,
  380. const struct i2c_device_id *id)
  381. {
  382. struct wm8523_priv *wm8523;
  383. unsigned int val;
  384. int ret, i;
  385. wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
  386. GFP_KERNEL);
  387. if (wm8523 == NULL)
  388. return -ENOMEM;
  389. wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
  390. if (IS_ERR(wm8523->regmap)) {
  391. ret = PTR_ERR(wm8523->regmap);
  392. dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
  393. return ret;
  394. }
  395. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  396. wm8523->supplies[i].supply = wm8523_supply_names[i];
  397. ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
  398. wm8523->supplies);
  399. if (ret != 0) {
  400. dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
  401. return ret;
  402. }
  403. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  404. wm8523->supplies);
  405. if (ret != 0) {
  406. dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
  407. return ret;
  408. }
  409. ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
  410. if (ret < 0) {
  411. dev_err(&i2c->dev, "Failed to read ID register\n");
  412. goto err_enable;
  413. }
  414. if (val != 0x8523) {
  415. dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
  416. ret = -EINVAL;
  417. goto err_enable;
  418. }
  419. ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
  420. if (ret < 0) {
  421. dev_err(&i2c->dev, "Failed to read revision register\n");
  422. goto err_enable;
  423. }
  424. dev_info(&i2c->dev, "revision %c\n",
  425. (val & WM8523_CHIP_REV_MASK) + 'A');
  426. ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
  427. if (ret != 0) {
  428. dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
  429. goto err_enable;
  430. }
  431. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  432. i2c_set_clientdata(i2c, wm8523);
  433. ret = devm_snd_soc_register_component(&i2c->dev,
  434. &soc_component_dev_wm8523, &wm8523_dai, 1);
  435. return ret;
  436. err_enable:
  437. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  438. return ret;
  439. }
  440. static const struct i2c_device_id wm8523_i2c_id[] = {
  441. { "wm8523", 0 },
  442. { }
  443. };
  444. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  445. static struct i2c_driver wm8523_i2c_driver = {
  446. .driver = {
  447. .name = "wm8523",
  448. .of_match_table = wm8523_of_match,
  449. },
  450. .probe = wm8523_i2c_probe,
  451. .id_table = wm8523_i2c_id,
  452. };
  453. module_i2c_driver(wm8523_i2c_driver);
  454. MODULE_DESCRIPTION("ASoC WM8523 driver");
  455. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  456. MODULE_LICENSE("GPL");