wm8510.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * wm8510.h -- WM8510 Soc Audio driver
  4. */
  5. #ifndef _WM8510_H
  6. #define _WM8510_H
  7. /* WM8510 register space */
  8. #define WM8510_RESET 0x0
  9. #define WM8510_POWER1 0x1
  10. #define WM8510_POWER2 0x2
  11. #define WM8510_POWER3 0x3
  12. #define WM8510_IFACE 0x4
  13. #define WM8510_COMP 0x5
  14. #define WM8510_CLOCK 0x6
  15. #define WM8510_ADD 0x7
  16. #define WM8510_GPIO 0x8
  17. #define WM8510_DAC 0xa
  18. #define WM8510_DACVOL 0xb
  19. #define WM8510_ADC 0xe
  20. #define WM8510_ADCVOL 0xf
  21. #define WM8510_EQ1 0x12
  22. #define WM8510_EQ2 0x13
  23. #define WM8510_EQ3 0x14
  24. #define WM8510_EQ4 0x15
  25. #define WM8510_EQ5 0x16
  26. #define WM8510_DACLIM1 0x18
  27. #define WM8510_DACLIM2 0x19
  28. #define WM8510_NOTCH1 0x1b
  29. #define WM8510_NOTCH2 0x1c
  30. #define WM8510_NOTCH3 0x1d
  31. #define WM8510_NOTCH4 0x1e
  32. #define WM8510_ALC1 0x20
  33. #define WM8510_ALC2 0x21
  34. #define WM8510_ALC3 0x22
  35. #define WM8510_NGATE 0x23
  36. #define WM8510_PLLN 0x24
  37. #define WM8510_PLLK1 0x25
  38. #define WM8510_PLLK2 0x26
  39. #define WM8510_PLLK3 0x27
  40. #define WM8510_ATTEN 0x28
  41. #define WM8510_INPUT 0x2c
  42. #define WM8510_INPPGA 0x2d
  43. #define WM8510_ADCBOOST 0x2f
  44. #define WM8510_OUTPUT 0x31
  45. #define WM8510_SPKMIX 0x32
  46. #define WM8510_SPKVOL 0x36
  47. #define WM8510_MONOMIX 0x38
  48. #define WM8510_CACHEREGNUM 57
  49. /* Clock divider Id's */
  50. #define WM8510_OPCLKDIV 0
  51. #define WM8510_MCLKDIV 1
  52. #define WM8510_ADCCLK 2
  53. #define WM8510_DACCLK 3
  54. #define WM8510_BCLKDIV 4
  55. /* DAC clock dividers */
  56. #define WM8510_DACCLK_F2 (1 << 3)
  57. #define WM8510_DACCLK_F4 (0 << 3)
  58. /* ADC clock dividers */
  59. #define WM8510_ADCCLK_F2 (1 << 3)
  60. #define WM8510_ADCCLK_F4 (0 << 3)
  61. /* PLL Out dividers */
  62. #define WM8510_OPCLKDIV_1 (0 << 4)
  63. #define WM8510_OPCLKDIV_2 (1 << 4)
  64. #define WM8510_OPCLKDIV_3 (2 << 4)
  65. #define WM8510_OPCLKDIV_4 (3 << 4)
  66. /* BCLK clock dividers */
  67. #define WM8510_BCLKDIV_1 (0 << 2)
  68. #define WM8510_BCLKDIV_2 (1 << 2)
  69. #define WM8510_BCLKDIV_4 (2 << 2)
  70. #define WM8510_BCLKDIV_8 (3 << 2)
  71. #define WM8510_BCLKDIV_16 (4 << 2)
  72. #define WM8510_BCLKDIV_32 (5 << 2)
  73. /* MCLK clock dividers */
  74. #define WM8510_MCLKDIV_1 (0 << 5)
  75. #define WM8510_MCLKDIV_1_5 (1 << 5)
  76. #define WM8510_MCLKDIV_2 (2 << 5)
  77. #define WM8510_MCLKDIV_3 (3 << 5)
  78. #define WM8510_MCLKDIV_4 (4 << 5)
  79. #define WM8510_MCLKDIV_6 (5 << 5)
  80. #define WM8510_MCLKDIV_8 (6 << 5)
  81. #define WM8510_MCLKDIV_12 (7 << 5)
  82. struct wm8510_setup_data {
  83. int spi;
  84. int i2c_bus;
  85. unsigned short i2c_address;
  86. };
  87. #endif