uda134x.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * uda134x.c -- UDA134X ALSA SoC Codec driver
  4. *
  5. * Modifications by Christian Pellegrin <chripell@evolware.org>
  6. *
  7. * Copyright 2007 Dension Audio Systems Ltd.
  8. * Author: Zoltan Devai
  9. *
  10. * Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
  11. */
  12. #include <linux/module.h>
  13. #include <linux/delay.h>
  14. #include <linux/slab.h>
  15. #include <sound/pcm.h>
  16. #include <sound/pcm_params.h>
  17. #include <sound/soc.h>
  18. #include <sound/initval.h>
  19. #include <sound/uda134x.h>
  20. #include <sound/l3.h>
  21. #include "uda134x.h"
  22. #define UDA134X_RATES SNDRV_PCM_RATE_8000_48000
  23. #define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
  24. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
  25. struct uda134x_priv {
  26. int sysclk;
  27. int dai_fmt;
  28. struct snd_pcm_substream *master_substream;
  29. struct snd_pcm_substream *slave_substream;
  30. struct regmap *regmap;
  31. struct uda134x_platform_data *pd;
  32. };
  33. static const struct reg_default uda134x_reg_defaults[] = {
  34. { UDA134X_EA000, 0x04 },
  35. { UDA134X_EA001, 0x04 },
  36. { UDA134X_EA010, 0x04 },
  37. { UDA134X_EA011, 0x00 },
  38. { UDA134X_EA100, 0x00 },
  39. { UDA134X_EA101, 0x00 },
  40. { UDA134X_EA110, 0x00 },
  41. { UDA134X_EA111, 0x00 },
  42. { UDA134X_STATUS0, 0x00 },
  43. { UDA134X_STATUS1, 0x03 },
  44. { UDA134X_DATA000, 0x00 },
  45. { UDA134X_DATA001, 0x00 },
  46. { UDA134X_DATA010, 0x00 },
  47. { UDA134X_DATA011, 0x00 },
  48. { UDA134X_DATA1, 0x00 },
  49. };
  50. /*
  51. * Write to the uda134x registers
  52. *
  53. */
  54. static int uda134x_regmap_write(void *context, unsigned int reg,
  55. unsigned int value)
  56. {
  57. struct uda134x_platform_data *pd = context;
  58. int ret;
  59. u8 addr;
  60. u8 data = value;
  61. switch (reg) {
  62. case UDA134X_STATUS0:
  63. case UDA134X_STATUS1:
  64. addr = UDA134X_STATUS_ADDR;
  65. data |= (reg - UDA134X_STATUS0) << 7;
  66. break;
  67. case UDA134X_DATA000:
  68. case UDA134X_DATA001:
  69. case UDA134X_DATA010:
  70. case UDA134X_DATA011:
  71. addr = UDA134X_DATA0_ADDR;
  72. data |= (reg - UDA134X_DATA000) << 6;
  73. break;
  74. case UDA134X_DATA1:
  75. addr = UDA134X_DATA1_ADDR;
  76. break;
  77. default:
  78. /* It's an extended address register */
  79. addr = (reg | UDA134X_EXTADDR_PREFIX);
  80. ret = l3_write(&pd->l3,
  81. UDA134X_DATA0_ADDR, &addr, 1);
  82. if (ret != 1)
  83. return -EIO;
  84. addr = UDA134X_DATA0_ADDR;
  85. data = (value | UDA134X_EXTDATA_PREFIX);
  86. break;
  87. }
  88. ret = l3_write(&pd->l3,
  89. addr, &data, 1);
  90. if (ret != 1)
  91. return -EIO;
  92. return 0;
  93. }
  94. static inline void uda134x_reset(struct snd_soc_component *component)
  95. {
  96. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  97. unsigned int mask = 1<<6;
  98. regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, mask);
  99. msleep(1);
  100. regmap_update_bits(uda134x->regmap, UDA134X_STATUS0, mask, 0);
  101. }
  102. static int uda134x_mute(struct snd_soc_dai *dai, int mute, int direction)
  103. {
  104. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(dai->component);
  105. unsigned int mask = 1<<2;
  106. unsigned int val;
  107. pr_debug("%s mute: %d\n", __func__, mute);
  108. if (mute)
  109. val = mask;
  110. else
  111. val = 0;
  112. return regmap_update_bits(uda134x->regmap, UDA134X_DATA010, mask, val);
  113. }
  114. static int uda134x_startup(struct snd_pcm_substream *substream,
  115. struct snd_soc_dai *dai)
  116. {
  117. struct snd_soc_component *component = dai->component;
  118. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  119. struct snd_pcm_runtime *master_runtime;
  120. if (uda134x->master_substream) {
  121. master_runtime = uda134x->master_substream->runtime;
  122. pr_debug("%s constraining to %d bits at %d\n", __func__,
  123. master_runtime->sample_bits,
  124. master_runtime->rate);
  125. snd_pcm_hw_constraint_single(substream->runtime,
  126. SNDRV_PCM_HW_PARAM_RATE,
  127. master_runtime->rate);
  128. snd_pcm_hw_constraint_single(substream->runtime,
  129. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  130. master_runtime->sample_bits);
  131. uda134x->slave_substream = substream;
  132. } else
  133. uda134x->master_substream = substream;
  134. return 0;
  135. }
  136. static void uda134x_shutdown(struct snd_pcm_substream *substream,
  137. struct snd_soc_dai *dai)
  138. {
  139. struct snd_soc_component *component = dai->component;
  140. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  141. if (uda134x->master_substream == substream)
  142. uda134x->master_substream = uda134x->slave_substream;
  143. uda134x->slave_substream = NULL;
  144. }
  145. static int uda134x_hw_params(struct snd_pcm_substream *substream,
  146. struct snd_pcm_hw_params *params,
  147. struct snd_soc_dai *dai)
  148. {
  149. struct snd_soc_component *component = dai->component;
  150. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  151. unsigned int hw_params = 0;
  152. if (substream == uda134x->slave_substream) {
  153. pr_debug("%s ignoring hw_params for slave substream\n",
  154. __func__);
  155. return 0;
  156. }
  157. pr_debug("%s sysclk: %d, rate:%d\n", __func__,
  158. uda134x->sysclk, params_rate(params));
  159. /* set SYSCLK / fs ratio */
  160. switch (uda134x->sysclk / params_rate(params)) {
  161. case 512:
  162. break;
  163. case 384:
  164. hw_params |= (1<<4);
  165. break;
  166. case 256:
  167. hw_params |= (1<<5);
  168. break;
  169. default:
  170. printk(KERN_ERR "%s unsupported fs\n", __func__);
  171. return -EINVAL;
  172. }
  173. pr_debug("%s dai_fmt: %d, params_format:%d\n", __func__,
  174. uda134x->dai_fmt, params_format(params));
  175. /* set DAI format and word length */
  176. switch (uda134x->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  177. case SND_SOC_DAIFMT_I2S:
  178. break;
  179. case SND_SOC_DAIFMT_RIGHT_J:
  180. switch (params_width(params)) {
  181. case 16:
  182. hw_params |= (1<<1);
  183. break;
  184. case 18:
  185. hw_params |= (1<<2);
  186. break;
  187. case 20:
  188. hw_params |= ((1<<2) | (1<<1));
  189. break;
  190. default:
  191. printk(KERN_ERR "%s unsupported format (right)\n",
  192. __func__);
  193. return -EINVAL;
  194. }
  195. break;
  196. case SND_SOC_DAIFMT_LEFT_J:
  197. hw_params |= (1<<3);
  198. break;
  199. default:
  200. printk(KERN_ERR "%s unsupported format\n", __func__);
  201. return -EINVAL;
  202. }
  203. return regmap_update_bits(uda134x->regmap, UDA134X_STATUS0,
  204. STATUS0_SYSCLK_MASK | STATUS0_DAIFMT_MASK, hw_params);
  205. }
  206. static int uda134x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  207. int clk_id, unsigned int freq, int dir)
  208. {
  209. struct snd_soc_component *component = codec_dai->component;
  210. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  211. pr_debug("%s clk_id: %d, freq: %u, dir: %d\n", __func__,
  212. clk_id, freq, dir);
  213. /* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
  214. because the codec is slave. Of course limitations of the clock
  215. master (the IIS controller) apply.
  216. We'll error out on set_hw_params if it's not OK */
  217. if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
  218. uda134x->sysclk = freq;
  219. return 0;
  220. }
  221. printk(KERN_ERR "%s unsupported sysclk\n", __func__);
  222. return -EINVAL;
  223. }
  224. static int uda134x_set_dai_fmt(struct snd_soc_dai *codec_dai,
  225. unsigned int fmt)
  226. {
  227. struct snd_soc_component *component = codec_dai->component;
  228. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  229. pr_debug("%s fmt: %08X\n", __func__, fmt);
  230. /* codec supports only full slave mode */
  231. if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
  232. printk(KERN_ERR "%s unsupported slave mode\n", __func__);
  233. return -EINVAL;
  234. }
  235. /* no support for clock inversion */
  236. if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) {
  237. printk(KERN_ERR "%s unsupported clock inversion\n", __func__);
  238. return -EINVAL;
  239. }
  240. /* We can't setup DAI format here as it depends on the word bit num */
  241. /* so let's just store the value for later */
  242. uda134x->dai_fmt = fmt;
  243. return 0;
  244. }
  245. static int uda134x_set_bias_level(struct snd_soc_component *component,
  246. enum snd_soc_bias_level level)
  247. {
  248. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  249. struct uda134x_platform_data *pd = uda134x->pd;
  250. pr_debug("%s bias level %d\n", __func__, level);
  251. switch (level) {
  252. case SND_SOC_BIAS_ON:
  253. break;
  254. case SND_SOC_BIAS_PREPARE:
  255. /* power on */
  256. if (pd->power) {
  257. pd->power(1);
  258. regcache_sync(uda134x->regmap);
  259. }
  260. break;
  261. case SND_SOC_BIAS_STANDBY:
  262. break;
  263. case SND_SOC_BIAS_OFF:
  264. /* power off */
  265. if (pd->power) {
  266. pd->power(0);
  267. regcache_mark_dirty(uda134x->regmap);
  268. }
  269. break;
  270. }
  271. return 0;
  272. }
  273. static const char *uda134x_dsp_setting[] = {"Flat", "Minimum1",
  274. "Minimum2", "Maximum"};
  275. static const char *uda134x_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  276. static const char *uda134x_mixmode[] = {"Differential", "Analog1",
  277. "Analog2", "Both"};
  278. static const struct soc_enum uda134x_mixer_enum[] = {
  279. SOC_ENUM_SINGLE(UDA134X_DATA010, 0, 0x04, uda134x_dsp_setting),
  280. SOC_ENUM_SINGLE(UDA134X_DATA010, 3, 0x04, uda134x_deemph),
  281. SOC_ENUM_SINGLE(UDA134X_EA010, 0, 0x04, uda134x_mixmode),
  282. };
  283. static const struct snd_kcontrol_new uda1341_snd_controls[] = {
  284. SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
  285. SOC_SINGLE("Capture Volume", UDA134X_EA010, 2, 0x07, 0),
  286. SOC_SINGLE("Analog1 Volume", UDA134X_EA000, 0, 0x1F, 1),
  287. SOC_SINGLE("Analog2 Volume", UDA134X_EA001, 0, 0x1F, 1),
  288. SOC_SINGLE("Mic Sensitivity", UDA134X_EA010, 2, 7, 0),
  289. SOC_SINGLE("Mic Volume", UDA134X_EA101, 0, 0x1F, 0),
  290. SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
  291. SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
  292. SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
  293. SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
  294. SOC_ENUM("Input Mux", uda134x_mixer_enum[2]),
  295. SOC_SINGLE("AGC Switch", UDA134X_EA100, 4, 1, 0),
  296. SOC_SINGLE("AGC Target Volume", UDA134X_EA110, 0, 0x03, 1),
  297. SOC_SINGLE("AGC Timing", UDA134X_EA110, 2, 0x07, 0),
  298. SOC_SINGLE("DAC +6dB Switch", UDA134X_STATUS1, 6, 1, 0),
  299. SOC_SINGLE("ADC +6dB Switch", UDA134X_STATUS1, 5, 1, 0),
  300. SOC_SINGLE("ADC Polarity Switch", UDA134X_STATUS1, 4, 1, 0),
  301. SOC_SINGLE("DAC Polarity Switch", UDA134X_STATUS1, 3, 1, 0),
  302. SOC_SINGLE("Double Speed Playback Switch", UDA134X_STATUS1, 2, 1, 0),
  303. SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
  304. };
  305. static const struct snd_kcontrol_new uda1340_snd_controls[] = {
  306. SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
  307. SOC_SINGLE("Tone Control - Bass", UDA134X_DATA001, 2, 0xF, 0),
  308. SOC_SINGLE("Tone Control - Treble", UDA134X_DATA001, 0, 3, 0),
  309. SOC_ENUM("Sound Processing Filter", uda134x_mixer_enum[0]),
  310. SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
  311. SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
  312. };
  313. static const struct snd_kcontrol_new uda1345_snd_controls[] = {
  314. SOC_SINGLE("Master Playback Volume", UDA134X_DATA000, 0, 0x3F, 1),
  315. SOC_ENUM("PCM Playback De-emphasis", uda134x_mixer_enum[1]),
  316. SOC_SINGLE("DC Filter Enable Switch", UDA134X_STATUS0, 0, 1, 0),
  317. };
  318. /* UDA1341 has the DAC/ADC power down in STATUS1 */
  319. static const struct snd_soc_dapm_widget uda1341_dapm_widgets[] = {
  320. SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_STATUS1, 0, 0),
  321. SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_STATUS1, 1, 0),
  322. };
  323. /* UDA1340/4/5 has the DAC/ADC pwoer down in DATA0 11 */
  324. static const struct snd_soc_dapm_widget uda1340_dapm_widgets[] = {
  325. SND_SOC_DAPM_DAC("DAC", "Playback", UDA134X_DATA011, 0, 0),
  326. SND_SOC_DAPM_ADC("ADC", "Capture", UDA134X_DATA011, 1, 0),
  327. };
  328. /* Common DAPM widgets */
  329. static const struct snd_soc_dapm_widget uda134x_dapm_widgets[] = {
  330. SND_SOC_DAPM_INPUT("VINL1"),
  331. SND_SOC_DAPM_INPUT("VINR1"),
  332. SND_SOC_DAPM_INPUT("VINL2"),
  333. SND_SOC_DAPM_INPUT("VINR2"),
  334. SND_SOC_DAPM_OUTPUT("VOUTL"),
  335. SND_SOC_DAPM_OUTPUT("VOUTR"),
  336. };
  337. static const struct snd_soc_dapm_route uda134x_dapm_routes[] = {
  338. { "ADC", NULL, "VINL1" },
  339. { "ADC", NULL, "VINR1" },
  340. { "ADC", NULL, "VINL2" },
  341. { "ADC", NULL, "VINR2" },
  342. { "VOUTL", NULL, "DAC" },
  343. { "VOUTR", NULL, "DAC" },
  344. };
  345. static const struct snd_soc_dai_ops uda134x_dai_ops = {
  346. .startup = uda134x_startup,
  347. .shutdown = uda134x_shutdown,
  348. .hw_params = uda134x_hw_params,
  349. .mute_stream = uda134x_mute,
  350. .set_sysclk = uda134x_set_dai_sysclk,
  351. .set_fmt = uda134x_set_dai_fmt,
  352. .no_capture_mute = 1,
  353. };
  354. static struct snd_soc_dai_driver uda134x_dai = {
  355. .name = "uda134x-hifi",
  356. /* playback capabilities */
  357. .playback = {
  358. .stream_name = "Playback",
  359. .channels_min = 1,
  360. .channels_max = 2,
  361. .rates = UDA134X_RATES,
  362. .formats = UDA134X_FORMATS,
  363. },
  364. /* capture capabilities */
  365. .capture = {
  366. .stream_name = "Capture",
  367. .channels_min = 1,
  368. .channels_max = 2,
  369. .rates = UDA134X_RATES,
  370. .formats = UDA134X_FORMATS,
  371. },
  372. /* pcm operations */
  373. .ops = &uda134x_dai_ops,
  374. };
  375. static int uda134x_soc_probe(struct snd_soc_component *component)
  376. {
  377. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  378. struct uda134x_priv *uda134x = snd_soc_component_get_drvdata(component);
  379. struct uda134x_platform_data *pd = uda134x->pd;
  380. const struct snd_soc_dapm_widget *widgets;
  381. unsigned num_widgets;
  382. int ret;
  383. printk(KERN_INFO "UDA134X SoC Audio Codec\n");
  384. switch (pd->model) {
  385. case UDA134X_UDA1340:
  386. case UDA134X_UDA1341:
  387. case UDA134X_UDA1344:
  388. case UDA134X_UDA1345:
  389. break;
  390. default:
  391. printk(KERN_ERR "UDA134X SoC codec: "
  392. "unsupported model %d\n",
  393. pd->model);
  394. return -EINVAL;
  395. }
  396. if (pd->power)
  397. pd->power(1);
  398. uda134x_reset(component);
  399. if (pd->model == UDA134X_UDA1341) {
  400. widgets = uda1341_dapm_widgets;
  401. num_widgets = ARRAY_SIZE(uda1341_dapm_widgets);
  402. } else {
  403. widgets = uda1340_dapm_widgets;
  404. num_widgets = ARRAY_SIZE(uda1340_dapm_widgets);
  405. }
  406. ret = snd_soc_dapm_new_controls(dapm, widgets, num_widgets);
  407. if (ret) {
  408. printk(KERN_ERR "%s failed to register dapm controls: %d",
  409. __func__, ret);
  410. return ret;
  411. }
  412. switch (pd->model) {
  413. case UDA134X_UDA1340:
  414. case UDA134X_UDA1344:
  415. ret = snd_soc_add_component_controls(component, uda1340_snd_controls,
  416. ARRAY_SIZE(uda1340_snd_controls));
  417. break;
  418. case UDA134X_UDA1341:
  419. ret = snd_soc_add_component_controls(component, uda1341_snd_controls,
  420. ARRAY_SIZE(uda1341_snd_controls));
  421. break;
  422. case UDA134X_UDA1345:
  423. ret = snd_soc_add_component_controls(component, uda1345_snd_controls,
  424. ARRAY_SIZE(uda1345_snd_controls));
  425. break;
  426. default:
  427. printk(KERN_ERR "%s unknown codec type: %d",
  428. __func__, pd->model);
  429. return -EINVAL;
  430. }
  431. if (ret < 0) {
  432. printk(KERN_ERR "UDA134X: failed to register controls\n");
  433. return ret;
  434. }
  435. return 0;
  436. }
  437. static const struct snd_soc_component_driver soc_component_dev_uda134x = {
  438. .probe = uda134x_soc_probe,
  439. .set_bias_level = uda134x_set_bias_level,
  440. .dapm_widgets = uda134x_dapm_widgets,
  441. .num_dapm_widgets = ARRAY_SIZE(uda134x_dapm_widgets),
  442. .dapm_routes = uda134x_dapm_routes,
  443. .num_dapm_routes = ARRAY_SIZE(uda134x_dapm_routes),
  444. .suspend_bias_off = 1,
  445. .idle_bias_on = 1,
  446. .use_pmdown_time = 1,
  447. .endianness = 1,
  448. .non_legacy_dai_naming = 1,
  449. };
  450. static const struct regmap_config uda134x_regmap_config = {
  451. .reg_bits = 8,
  452. .val_bits = 8,
  453. .max_register = UDA134X_DATA1,
  454. .reg_defaults = uda134x_reg_defaults,
  455. .num_reg_defaults = ARRAY_SIZE(uda134x_reg_defaults),
  456. .cache_type = REGCACHE_RBTREE,
  457. .reg_write = uda134x_regmap_write,
  458. };
  459. static int uda134x_codec_probe(struct platform_device *pdev)
  460. {
  461. struct uda134x_platform_data *pd = pdev->dev.platform_data;
  462. struct uda134x_priv *uda134x;
  463. int ret;
  464. if (!pd) {
  465. dev_err(&pdev->dev, "Missing L3 bitbang function\n");
  466. return -ENODEV;
  467. }
  468. uda134x = devm_kzalloc(&pdev->dev, sizeof(*uda134x), GFP_KERNEL);
  469. if (!uda134x)
  470. return -ENOMEM;
  471. uda134x->pd = pd;
  472. platform_set_drvdata(pdev, uda134x);
  473. if (pd->l3.use_gpios) {
  474. ret = l3_set_gpio_ops(&pdev->dev, &uda134x->pd->l3);
  475. if (ret < 0)
  476. return ret;
  477. }
  478. uda134x->regmap = devm_regmap_init(&pdev->dev, NULL, pd,
  479. &uda134x_regmap_config);
  480. if (IS_ERR(uda134x->regmap))
  481. return PTR_ERR(uda134x->regmap);
  482. return devm_snd_soc_register_component(&pdev->dev,
  483. &soc_component_dev_uda134x, &uda134x_dai, 1);
  484. }
  485. static struct platform_driver uda134x_codec_driver = {
  486. .driver = {
  487. .name = "uda134x-codec",
  488. },
  489. .probe = uda134x_codec_probe,
  490. };
  491. module_platform_driver(uda134x_codec_driver);
  492. MODULE_DESCRIPTION("UDA134X ALSA soc codec driver");
  493. MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
  494. MODULE_LICENSE("GPL");