twl4030.c 67 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * ALSA SoC TWL4030 codec driver
  4. *
  5. * Author: Steve Sakoman, <steve@sakoman.com>
  6. */
  7. #include <linux/module.h>
  8. #include <linux/moduleparam.h>
  9. #include <linux/init.h>
  10. #include <linux/delay.h>
  11. #include <linux/pm.h>
  12. #include <linux/i2c.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/of.h>
  15. #include <linux/of_gpio.h>
  16. #include <linux/mfd/twl.h>
  17. #include <linux/slab.h>
  18. #include <linux/gpio.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <sound/initval.h>
  24. #include <sound/tlv.h>
  25. /* Register descriptions are here */
  26. #include <linux/mfd/twl4030-audio.h>
  27. /* TWL4030 PMBR1 Register */
  28. #define TWL4030_PMBR1_REG 0x0D
  29. /* TWL4030 PMBR1 Register GPIO6 mux bits */
  30. #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
  31. #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
  32. /* codec private data */
  33. struct twl4030_priv {
  34. unsigned int codec_powered;
  35. /* reference counts of AIF/APLL users */
  36. unsigned int apll_enabled;
  37. struct snd_pcm_substream *master_substream;
  38. struct snd_pcm_substream *slave_substream;
  39. unsigned int configured;
  40. unsigned int rate;
  41. unsigned int sample_bits;
  42. unsigned int channels;
  43. unsigned int sysclk;
  44. /* Output (with associated amp) states */
  45. u8 hsl_enabled, hsr_enabled;
  46. u8 earpiece_enabled;
  47. u8 predrivel_enabled, predriver_enabled;
  48. u8 carkitl_enabled, carkitr_enabled;
  49. u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
  50. struct twl4030_codec_data *pdata;
  51. };
  52. static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
  53. {
  54. int i;
  55. u8 byte;
  56. for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
  57. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
  58. twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
  59. }
  60. }
  61. static unsigned int twl4030_read(struct snd_soc_component *component, unsigned int reg)
  62. {
  63. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  64. u8 value = 0;
  65. if (reg >= TWL4030_CACHEREGNUM)
  66. return -EIO;
  67. switch (reg) {
  68. case TWL4030_REG_EAR_CTL:
  69. case TWL4030_REG_PREDL_CTL:
  70. case TWL4030_REG_PREDR_CTL:
  71. case TWL4030_REG_PRECKL_CTL:
  72. case TWL4030_REG_PRECKR_CTL:
  73. case TWL4030_REG_HS_GAIN_SET:
  74. value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
  75. break;
  76. default:
  77. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
  78. break;
  79. }
  80. return value;
  81. }
  82. static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
  83. unsigned int reg)
  84. {
  85. bool write_to_reg = false;
  86. /* Decide if the given register can be written */
  87. switch (reg) {
  88. case TWL4030_REG_EAR_CTL:
  89. if (twl4030->earpiece_enabled)
  90. write_to_reg = true;
  91. break;
  92. case TWL4030_REG_PREDL_CTL:
  93. if (twl4030->predrivel_enabled)
  94. write_to_reg = true;
  95. break;
  96. case TWL4030_REG_PREDR_CTL:
  97. if (twl4030->predriver_enabled)
  98. write_to_reg = true;
  99. break;
  100. case TWL4030_REG_PRECKL_CTL:
  101. if (twl4030->carkitl_enabled)
  102. write_to_reg = true;
  103. break;
  104. case TWL4030_REG_PRECKR_CTL:
  105. if (twl4030->carkitr_enabled)
  106. write_to_reg = true;
  107. break;
  108. case TWL4030_REG_HS_GAIN_SET:
  109. if (twl4030->hsl_enabled || twl4030->hsr_enabled)
  110. write_to_reg = true;
  111. break;
  112. default:
  113. /* All other register can be written */
  114. write_to_reg = true;
  115. break;
  116. }
  117. return write_to_reg;
  118. }
  119. static int twl4030_write(struct snd_soc_component *component, unsigned int reg,
  120. unsigned int value)
  121. {
  122. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  123. /* Update the ctl cache */
  124. switch (reg) {
  125. case TWL4030_REG_EAR_CTL:
  126. case TWL4030_REG_PREDL_CTL:
  127. case TWL4030_REG_PREDR_CTL:
  128. case TWL4030_REG_PRECKL_CTL:
  129. case TWL4030_REG_PRECKR_CTL:
  130. case TWL4030_REG_HS_GAIN_SET:
  131. twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
  132. break;
  133. default:
  134. break;
  135. }
  136. if (twl4030_can_write_to_chip(twl4030, reg))
  137. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
  138. return 0;
  139. }
  140. static inline void twl4030_wait_ms(int time)
  141. {
  142. if (time < 60) {
  143. time *= 1000;
  144. usleep_range(time, time + 500);
  145. } else {
  146. msleep(time);
  147. }
  148. }
  149. static void twl4030_codec_enable(struct snd_soc_component *component, int enable)
  150. {
  151. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  152. int mode;
  153. if (enable == twl4030->codec_powered)
  154. return;
  155. if (enable)
  156. mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
  157. else
  158. mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
  159. if (mode >= 0)
  160. twl4030->codec_powered = enable;
  161. /* REVISIT: this delay is present in TI sample drivers */
  162. /* but there seems to be no TRM requirement for it */
  163. udelay(10);
  164. }
  165. static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
  166. struct device_node *node)
  167. {
  168. int value;
  169. of_property_read_u32(node, "ti,digimic_delay",
  170. &pdata->digimic_delay);
  171. of_property_read_u32(node, "ti,ramp_delay_value",
  172. &pdata->ramp_delay_value);
  173. of_property_read_u32(node, "ti,offset_cncl_path",
  174. &pdata->offset_cncl_path);
  175. if (!of_property_read_u32(node, "ti,hs_extmute", &value))
  176. pdata->hs_extmute = value;
  177. pdata->hs_extmute_gpio = of_get_named_gpio(node,
  178. "ti,hs_extmute_gpio", 0);
  179. if (gpio_is_valid(pdata->hs_extmute_gpio))
  180. pdata->hs_extmute = 1;
  181. }
  182. static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_component *component)
  183. {
  184. struct twl4030_codec_data *pdata = dev_get_platdata(component->dev);
  185. struct device_node *twl4030_codec_node = NULL;
  186. twl4030_codec_node = of_get_child_by_name(component->dev->parent->of_node,
  187. "codec");
  188. if (!pdata && twl4030_codec_node) {
  189. pdata = devm_kzalloc(component->dev,
  190. sizeof(struct twl4030_codec_data),
  191. GFP_KERNEL);
  192. if (!pdata) {
  193. of_node_put(twl4030_codec_node);
  194. return NULL;
  195. }
  196. twl4030_setup_pdata_of(pdata, twl4030_codec_node);
  197. of_node_put(twl4030_codec_node);
  198. }
  199. return pdata;
  200. }
  201. static void twl4030_init_chip(struct snd_soc_component *component)
  202. {
  203. struct twl4030_codec_data *pdata;
  204. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  205. u8 reg, byte;
  206. int i = 0;
  207. pdata = twl4030_get_pdata(component);
  208. if (pdata && pdata->hs_extmute) {
  209. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  210. int ret;
  211. if (!pdata->hs_extmute_gpio)
  212. dev_warn(component->dev,
  213. "Extmute GPIO is 0 is this correct?\n");
  214. ret = gpio_request_one(pdata->hs_extmute_gpio,
  215. GPIOF_OUT_INIT_LOW,
  216. "hs_extmute");
  217. if (ret) {
  218. dev_err(component->dev,
  219. "Failed to get hs_extmute GPIO\n");
  220. pdata->hs_extmute_gpio = -1;
  221. }
  222. } else {
  223. u8 pin_mux;
  224. /* Set TWL4030 GPIO6 as EXTMUTE signal */
  225. twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
  226. TWL4030_PMBR1_REG);
  227. pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
  228. pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
  229. twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
  230. TWL4030_PMBR1_REG);
  231. }
  232. }
  233. /* Initialize the local ctl register cache */
  234. tw4030_init_ctl_cache(twl4030);
  235. /* anti-pop when changing analog gain */
  236. reg = twl4030_read(component, TWL4030_REG_MISC_SET_1);
  237. twl4030_write(component, TWL4030_REG_MISC_SET_1,
  238. reg | TWL4030_SMOOTH_ANAVOL_EN);
  239. twl4030_write(component, TWL4030_REG_OPTION,
  240. TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
  241. TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
  242. /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
  243. twl4030_write(component, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
  244. /* Machine dependent setup */
  245. if (!pdata)
  246. return;
  247. twl4030->pdata = pdata;
  248. reg = twl4030_read(component, TWL4030_REG_HS_POPN_SET);
  249. reg &= ~TWL4030_RAMP_DELAY;
  250. reg |= (pdata->ramp_delay_value << 2);
  251. twl4030_write(component, TWL4030_REG_HS_POPN_SET, reg);
  252. /* initiate offset cancellation */
  253. twl4030_codec_enable(component, 1);
  254. reg = twl4030_read(component, TWL4030_REG_ANAMICL);
  255. reg &= ~TWL4030_OFFSET_CNCL_SEL;
  256. reg |= pdata->offset_cncl_path;
  257. twl4030_write(component, TWL4030_REG_ANAMICL,
  258. reg | TWL4030_CNCL_OFFSET_START);
  259. /*
  260. * Wait for offset cancellation to complete.
  261. * Since this takes a while, do not slam the i2c.
  262. * Start polling the status after ~20ms.
  263. */
  264. msleep(20);
  265. do {
  266. usleep_range(1000, 2000);
  267. twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
  268. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  269. TWL4030_REG_ANAMICL);
  270. twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
  271. } while ((i++ < 100) &&
  272. ((byte & TWL4030_CNCL_OFFSET_START) ==
  273. TWL4030_CNCL_OFFSET_START));
  274. twl4030_codec_enable(component, 0);
  275. }
  276. static void twl4030_apll_enable(struct snd_soc_component *component, int enable)
  277. {
  278. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  279. if (enable) {
  280. twl4030->apll_enabled++;
  281. if (twl4030->apll_enabled == 1)
  282. twl4030_audio_enable_resource(
  283. TWL4030_AUDIO_RES_APLL);
  284. } else {
  285. twl4030->apll_enabled--;
  286. if (!twl4030->apll_enabled)
  287. twl4030_audio_disable_resource(
  288. TWL4030_AUDIO_RES_APLL);
  289. }
  290. }
  291. /* Earpiece */
  292. static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
  293. SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
  294. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
  295. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
  296. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
  297. };
  298. /* PreDrive Left */
  299. static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
  300. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
  301. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
  302. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
  303. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
  304. };
  305. /* PreDrive Right */
  306. static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
  307. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
  308. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
  309. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
  310. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
  311. };
  312. /* Headset Left */
  313. static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
  314. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
  315. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
  316. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
  317. };
  318. /* Headset Right */
  319. static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
  320. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
  321. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
  322. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
  323. };
  324. /* Carkit Left */
  325. static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
  326. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
  327. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
  328. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
  329. };
  330. /* Carkit Right */
  331. static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
  332. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
  333. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
  334. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
  335. };
  336. /* Handsfree Left */
  337. static const char *twl4030_handsfreel_texts[] =
  338. {"Voice", "AudioL1", "AudioL2", "AudioR2"};
  339. static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
  340. TWL4030_REG_HFL_CTL, 0,
  341. twl4030_handsfreel_texts);
  342. static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
  343. SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
  344. /* Handsfree Left virtual mute */
  345. static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
  346. SOC_DAPM_SINGLE_VIRT("Switch", 1);
  347. /* Handsfree Right */
  348. static const char *twl4030_handsfreer_texts[] =
  349. {"Voice", "AudioR1", "AudioR2", "AudioL2"};
  350. static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
  351. TWL4030_REG_HFR_CTL, 0,
  352. twl4030_handsfreer_texts);
  353. static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
  354. SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
  355. /* Handsfree Right virtual mute */
  356. static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
  357. SOC_DAPM_SINGLE_VIRT("Switch", 1);
  358. /* Vibra */
  359. /* Vibra audio path selection */
  360. static const char *twl4030_vibra_texts[] =
  361. {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
  362. static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
  363. TWL4030_REG_VIBRA_CTL, 2,
  364. twl4030_vibra_texts);
  365. static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
  366. SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
  367. /* Vibra path selection: local vibrator (PWM) or audio driven */
  368. static const char *twl4030_vibrapath_texts[] =
  369. {"Local vibrator", "Audio"};
  370. static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
  371. TWL4030_REG_VIBRA_CTL, 4,
  372. twl4030_vibrapath_texts);
  373. static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
  374. SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
  375. /* Left analog microphone selection */
  376. static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
  377. SOC_DAPM_SINGLE("Main Mic Capture Switch",
  378. TWL4030_REG_ANAMICL, 0, 1, 0),
  379. SOC_DAPM_SINGLE("Headset Mic Capture Switch",
  380. TWL4030_REG_ANAMICL, 1, 1, 0),
  381. SOC_DAPM_SINGLE("AUXL Capture Switch",
  382. TWL4030_REG_ANAMICL, 2, 1, 0),
  383. SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
  384. TWL4030_REG_ANAMICL, 3, 1, 0),
  385. };
  386. /* Right analog microphone selection */
  387. static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
  388. SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
  389. SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
  390. };
  391. /* TX1 L/R Analog/Digital microphone selection */
  392. static const char *twl4030_micpathtx1_texts[] =
  393. {"Analog", "Digimic0"};
  394. static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
  395. TWL4030_REG_ADCMICSEL, 0,
  396. twl4030_micpathtx1_texts);
  397. static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
  398. SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
  399. /* TX2 L/R Analog/Digital microphone selection */
  400. static const char *twl4030_micpathtx2_texts[] =
  401. {"Analog", "Digimic1"};
  402. static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
  403. TWL4030_REG_ADCMICSEL, 2,
  404. twl4030_micpathtx2_texts);
  405. static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
  406. SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
  407. /* Analog bypass for AudioR1 */
  408. static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
  409. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
  410. /* Analog bypass for AudioL1 */
  411. static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
  412. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
  413. /* Analog bypass for AudioR2 */
  414. static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
  415. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
  416. /* Analog bypass for AudioL2 */
  417. static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
  418. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
  419. /* Analog bypass for Voice */
  420. static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
  421. SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
  422. /* Digital bypass gain, mute instead of -30dB */
  423. static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv,
  424. 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
  425. 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
  426. 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
  427. );
  428. /* Digital bypass left (TX1L -> RX2L) */
  429. static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
  430. SOC_DAPM_SINGLE_TLV("Volume",
  431. TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
  432. twl4030_dapm_dbypass_tlv);
  433. /* Digital bypass right (TX1R -> RX2R) */
  434. static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
  435. SOC_DAPM_SINGLE_TLV("Volume",
  436. TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
  437. twl4030_dapm_dbypass_tlv);
  438. /*
  439. * Voice Sidetone GAIN volume control:
  440. * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
  441. */
  442. static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
  443. /* Digital bypass voice: sidetone (VUL -> VDL)*/
  444. static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
  445. SOC_DAPM_SINGLE_TLV("Volume",
  446. TWL4030_REG_VSTPGA, 0, 0x29, 0,
  447. twl4030_dapm_dbypassv_tlv);
  448. /*
  449. * Output PGA builder:
  450. * Handle the muting and unmuting of the given output (turning off the
  451. * amplifier associated with the output pin)
  452. * On mute bypass the reg_cache and write 0 to the register
  453. * On unmute: restore the register content from the reg_cache
  454. * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
  455. */
  456. #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
  457. static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
  458. struct snd_kcontrol *kcontrol, int event) \
  459. { \
  460. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); \
  461. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); \
  462. \
  463. switch (event) { \
  464. case SND_SOC_DAPM_POST_PMU: \
  465. twl4030->pin_name##_enabled = 1; \
  466. twl4030_write(component, reg, twl4030_read(component, reg)); \
  467. break; \
  468. case SND_SOC_DAPM_POST_PMD: \
  469. twl4030->pin_name##_enabled = 0; \
  470. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
  471. break; \
  472. } \
  473. return 0; \
  474. }
  475. TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
  476. TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
  477. TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
  478. TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
  479. TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
  480. static void handsfree_ramp(struct snd_soc_component *component, int reg, int ramp)
  481. {
  482. unsigned char hs_ctl;
  483. hs_ctl = twl4030_read(component, reg);
  484. if (ramp) {
  485. /* HF ramp-up */
  486. hs_ctl |= TWL4030_HF_CTL_REF_EN;
  487. twl4030_write(component, reg, hs_ctl);
  488. udelay(10);
  489. hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
  490. twl4030_write(component, reg, hs_ctl);
  491. udelay(40);
  492. hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
  493. hs_ctl |= TWL4030_HF_CTL_HB_EN;
  494. twl4030_write(component, reg, hs_ctl);
  495. } else {
  496. /* HF ramp-down */
  497. hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
  498. hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
  499. twl4030_write(component, reg, hs_ctl);
  500. hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
  501. twl4030_write(component, reg, hs_ctl);
  502. udelay(40);
  503. hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
  504. twl4030_write(component, reg, hs_ctl);
  505. }
  506. }
  507. static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
  508. struct snd_kcontrol *kcontrol, int event)
  509. {
  510. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  511. switch (event) {
  512. case SND_SOC_DAPM_POST_PMU:
  513. handsfree_ramp(component, TWL4030_REG_HFL_CTL, 1);
  514. break;
  515. case SND_SOC_DAPM_POST_PMD:
  516. handsfree_ramp(component, TWL4030_REG_HFL_CTL, 0);
  517. break;
  518. }
  519. return 0;
  520. }
  521. static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
  522. struct snd_kcontrol *kcontrol, int event)
  523. {
  524. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  525. switch (event) {
  526. case SND_SOC_DAPM_POST_PMU:
  527. handsfree_ramp(component, TWL4030_REG_HFR_CTL, 1);
  528. break;
  529. case SND_SOC_DAPM_POST_PMD:
  530. handsfree_ramp(component, TWL4030_REG_HFR_CTL, 0);
  531. break;
  532. }
  533. return 0;
  534. }
  535. static int vibramux_event(struct snd_soc_dapm_widget *w,
  536. struct snd_kcontrol *kcontrol, int event)
  537. {
  538. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  539. twl4030_write(component, TWL4030_REG_VIBRA_SET, 0xff);
  540. return 0;
  541. }
  542. static int apll_event(struct snd_soc_dapm_widget *w,
  543. struct snd_kcontrol *kcontrol, int event)
  544. {
  545. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  546. switch (event) {
  547. case SND_SOC_DAPM_PRE_PMU:
  548. twl4030_apll_enable(component, 1);
  549. break;
  550. case SND_SOC_DAPM_POST_PMD:
  551. twl4030_apll_enable(component, 0);
  552. break;
  553. }
  554. return 0;
  555. }
  556. static int aif_event(struct snd_soc_dapm_widget *w,
  557. struct snd_kcontrol *kcontrol, int event)
  558. {
  559. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  560. u8 audio_if;
  561. audio_if = twl4030_read(component, TWL4030_REG_AUDIO_IF);
  562. switch (event) {
  563. case SND_SOC_DAPM_PRE_PMU:
  564. /* Enable AIF */
  565. /* enable the PLL before we use it to clock the DAI */
  566. twl4030_apll_enable(component, 1);
  567. twl4030_write(component, TWL4030_REG_AUDIO_IF,
  568. audio_if | TWL4030_AIF_EN);
  569. break;
  570. case SND_SOC_DAPM_POST_PMD:
  571. /* disable the DAI before we stop it's source PLL */
  572. twl4030_write(component, TWL4030_REG_AUDIO_IF,
  573. audio_if & ~TWL4030_AIF_EN);
  574. twl4030_apll_enable(component, 0);
  575. break;
  576. }
  577. return 0;
  578. }
  579. static void headset_ramp(struct snd_soc_component *component, int ramp)
  580. {
  581. unsigned char hs_gain, hs_pop;
  582. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  583. struct twl4030_codec_data *pdata = twl4030->pdata;
  584. /* Base values for ramp delay calculation: 2^19 - 2^26 */
  585. unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
  586. 8388608, 16777216, 33554432, 67108864};
  587. unsigned int delay;
  588. hs_gain = twl4030_read(component, TWL4030_REG_HS_GAIN_SET);
  589. hs_pop = twl4030_read(component, TWL4030_REG_HS_POPN_SET);
  590. delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  591. twl4030->sysclk) + 1;
  592. /* Enable external mute control, this dramatically reduces
  593. * the pop-noise */
  594. if (pdata && pdata->hs_extmute) {
  595. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  596. gpio_set_value(pdata->hs_extmute_gpio, 1);
  597. } else {
  598. hs_pop |= TWL4030_EXTMUTE;
  599. twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
  600. }
  601. }
  602. if (ramp) {
  603. /* Headset ramp-up according to the TRM */
  604. hs_pop |= TWL4030_VMID_EN;
  605. twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
  606. /* Actually write to the register */
  607. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
  608. TWL4030_REG_HS_GAIN_SET);
  609. hs_pop |= TWL4030_RAMP_EN;
  610. twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
  611. /* Wait ramp delay time + 1, so the VMID can settle */
  612. twl4030_wait_ms(delay);
  613. } else {
  614. /* Headset ramp-down _not_ according to
  615. * the TRM, but in a way that it is working */
  616. hs_pop &= ~TWL4030_RAMP_EN;
  617. twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
  618. /* Wait ramp delay time + 1, so the VMID can settle */
  619. twl4030_wait_ms(delay);
  620. /* Bypass the reg_cache to mute the headset */
  621. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
  622. TWL4030_REG_HS_GAIN_SET);
  623. hs_pop &= ~TWL4030_VMID_EN;
  624. twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
  625. }
  626. /* Disable external mute */
  627. if (pdata && pdata->hs_extmute) {
  628. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  629. gpio_set_value(pdata->hs_extmute_gpio, 0);
  630. } else {
  631. hs_pop &= ~TWL4030_EXTMUTE;
  632. twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
  633. }
  634. }
  635. }
  636. static int headsetlpga_event(struct snd_soc_dapm_widget *w,
  637. struct snd_kcontrol *kcontrol, int event)
  638. {
  639. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  640. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  641. switch (event) {
  642. case SND_SOC_DAPM_POST_PMU:
  643. /* Do the ramp-up only once */
  644. if (!twl4030->hsr_enabled)
  645. headset_ramp(component, 1);
  646. twl4030->hsl_enabled = 1;
  647. break;
  648. case SND_SOC_DAPM_POST_PMD:
  649. /* Do the ramp-down only if both headsetL/R is disabled */
  650. if (!twl4030->hsr_enabled)
  651. headset_ramp(component, 0);
  652. twl4030->hsl_enabled = 0;
  653. break;
  654. }
  655. return 0;
  656. }
  657. static int headsetrpga_event(struct snd_soc_dapm_widget *w,
  658. struct snd_kcontrol *kcontrol, int event)
  659. {
  660. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  661. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  662. switch (event) {
  663. case SND_SOC_DAPM_POST_PMU:
  664. /* Do the ramp-up only once */
  665. if (!twl4030->hsl_enabled)
  666. headset_ramp(component, 1);
  667. twl4030->hsr_enabled = 1;
  668. break;
  669. case SND_SOC_DAPM_POST_PMD:
  670. /* Do the ramp-down only if both headsetL/R is disabled */
  671. if (!twl4030->hsl_enabled)
  672. headset_ramp(component, 0);
  673. twl4030->hsr_enabled = 0;
  674. break;
  675. }
  676. return 0;
  677. }
  678. static int digimic_event(struct snd_soc_dapm_widget *w,
  679. struct snd_kcontrol *kcontrol, int event)
  680. {
  681. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  682. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  683. struct twl4030_codec_data *pdata = twl4030->pdata;
  684. if (pdata && pdata->digimic_delay)
  685. twl4030_wait_ms(pdata->digimic_delay);
  686. return 0;
  687. }
  688. /*
  689. * Some of the gain controls in TWL (mostly those which are associated with
  690. * the outputs) are implemented in an interesting way:
  691. * 0x0 : Power down (mute)
  692. * 0x1 : 6dB
  693. * 0x2 : 0 dB
  694. * 0x3 : -6 dB
  695. * Inverting not going to help with these.
  696. * Custom volsw and volsw_2r get/put functions to handle these gain bits.
  697. */
  698. static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
  699. struct snd_ctl_elem_value *ucontrol)
  700. {
  701. struct soc_mixer_control *mc =
  702. (struct soc_mixer_control *)kcontrol->private_value;
  703. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  704. unsigned int reg = mc->reg;
  705. unsigned int shift = mc->shift;
  706. unsigned int rshift = mc->rshift;
  707. int max = mc->max;
  708. int mask = (1 << fls(max)) - 1;
  709. ucontrol->value.integer.value[0] =
  710. (twl4030_read(component, reg) >> shift) & mask;
  711. if (ucontrol->value.integer.value[0])
  712. ucontrol->value.integer.value[0] =
  713. max + 1 - ucontrol->value.integer.value[0];
  714. if (shift != rshift) {
  715. ucontrol->value.integer.value[1] =
  716. (twl4030_read(component, reg) >> rshift) & mask;
  717. if (ucontrol->value.integer.value[1])
  718. ucontrol->value.integer.value[1] =
  719. max + 1 - ucontrol->value.integer.value[1];
  720. }
  721. return 0;
  722. }
  723. static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
  724. struct snd_ctl_elem_value *ucontrol)
  725. {
  726. struct soc_mixer_control *mc =
  727. (struct soc_mixer_control *)kcontrol->private_value;
  728. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  729. unsigned int reg = mc->reg;
  730. unsigned int shift = mc->shift;
  731. unsigned int rshift = mc->rshift;
  732. int max = mc->max;
  733. int mask = (1 << fls(max)) - 1;
  734. unsigned short val, val2, val_mask;
  735. val = (ucontrol->value.integer.value[0] & mask);
  736. val_mask = mask << shift;
  737. if (val)
  738. val = max + 1 - val;
  739. val = val << shift;
  740. if (shift != rshift) {
  741. val2 = (ucontrol->value.integer.value[1] & mask);
  742. val_mask |= mask << rshift;
  743. if (val2)
  744. val2 = max + 1 - val2;
  745. val |= val2 << rshift;
  746. }
  747. return snd_soc_component_update_bits(component, reg, val_mask, val);
  748. }
  749. static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  750. struct snd_ctl_elem_value *ucontrol)
  751. {
  752. struct soc_mixer_control *mc =
  753. (struct soc_mixer_control *)kcontrol->private_value;
  754. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  755. unsigned int reg = mc->reg;
  756. unsigned int reg2 = mc->rreg;
  757. unsigned int shift = mc->shift;
  758. int max = mc->max;
  759. int mask = (1<<fls(max))-1;
  760. ucontrol->value.integer.value[0] =
  761. (twl4030_read(component, reg) >> shift) & mask;
  762. ucontrol->value.integer.value[1] =
  763. (twl4030_read(component, reg2) >> shift) & mask;
  764. if (ucontrol->value.integer.value[0])
  765. ucontrol->value.integer.value[0] =
  766. max + 1 - ucontrol->value.integer.value[0];
  767. if (ucontrol->value.integer.value[1])
  768. ucontrol->value.integer.value[1] =
  769. max + 1 - ucontrol->value.integer.value[1];
  770. return 0;
  771. }
  772. static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  773. struct snd_ctl_elem_value *ucontrol)
  774. {
  775. struct soc_mixer_control *mc =
  776. (struct soc_mixer_control *)kcontrol->private_value;
  777. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  778. unsigned int reg = mc->reg;
  779. unsigned int reg2 = mc->rreg;
  780. unsigned int shift = mc->shift;
  781. int max = mc->max;
  782. int mask = (1 << fls(max)) - 1;
  783. int err;
  784. unsigned short val, val2, val_mask;
  785. val_mask = mask << shift;
  786. val = (ucontrol->value.integer.value[0] & mask);
  787. val2 = (ucontrol->value.integer.value[1] & mask);
  788. if (val)
  789. val = max + 1 - val;
  790. if (val2)
  791. val2 = max + 1 - val2;
  792. val = val << shift;
  793. val2 = val2 << shift;
  794. err = snd_soc_component_update_bits(component, reg, val_mask, val);
  795. if (err < 0)
  796. return err;
  797. err = snd_soc_component_update_bits(component, reg2, val_mask, val2);
  798. return err;
  799. }
  800. /* Codec operation modes */
  801. static const char *twl4030_op_modes_texts[] = {
  802. "Option 2 (voice/audio)", "Option 1 (audio)"
  803. };
  804. static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
  805. TWL4030_REG_CODEC_MODE, 0,
  806. twl4030_op_modes_texts);
  807. static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_value *ucontrol)
  809. {
  810. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  811. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  812. if (twl4030->configured) {
  813. dev_err(component->dev,
  814. "operation mode cannot be changed on-the-fly\n");
  815. return -EBUSY;
  816. }
  817. return snd_soc_put_enum_double(kcontrol, ucontrol);
  818. }
  819. /*
  820. * FGAIN volume control:
  821. * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
  822. */
  823. static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
  824. /*
  825. * CGAIN volume control:
  826. * 0 dB to 12 dB in 6 dB steps
  827. * value 2 and 3 means 12 dB
  828. */
  829. static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
  830. /*
  831. * Voice Downlink GAIN volume control:
  832. * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
  833. */
  834. static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
  835. /*
  836. * Analog playback gain
  837. * -24 dB to 12 dB in 2 dB steps
  838. */
  839. static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
  840. /*
  841. * Gain controls tied to outputs
  842. * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
  843. */
  844. static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
  845. /*
  846. * Gain control for earpiece amplifier
  847. * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
  848. */
  849. static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
  850. /*
  851. * Capture gain after the ADCs
  852. * from 0 dB to 31 dB in 1 dB steps
  853. */
  854. static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
  855. /*
  856. * Gain control for input amplifiers
  857. * 0 dB to 30 dB in 6 dB steps
  858. */
  859. static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
  860. /* AVADC clock priority */
  861. static const char *twl4030_avadc_clk_priority_texts[] = {
  862. "Voice high priority", "HiFi high priority"
  863. };
  864. static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
  865. TWL4030_REG_AVADC_CTL, 2,
  866. twl4030_avadc_clk_priority_texts);
  867. static const char *twl4030_rampdelay_texts[] = {
  868. "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
  869. "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
  870. "3495/2581/1748 ms"
  871. };
  872. static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
  873. TWL4030_REG_HS_POPN_SET, 2,
  874. twl4030_rampdelay_texts);
  875. /* Vibra H-bridge direction mode */
  876. static const char *twl4030_vibradirmode_texts[] = {
  877. "Vibra H-bridge direction", "Audio data MSB",
  878. };
  879. static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
  880. TWL4030_REG_VIBRA_CTL, 5,
  881. twl4030_vibradirmode_texts);
  882. /* Vibra H-bridge direction */
  883. static const char *twl4030_vibradir_texts[] = {
  884. "Positive polarity", "Negative polarity",
  885. };
  886. static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
  887. TWL4030_REG_VIBRA_CTL, 1,
  888. twl4030_vibradir_texts);
  889. /* Digimic Left and right swapping */
  890. static const char *twl4030_digimicswap_texts[] = {
  891. "Not swapped", "Swapped",
  892. };
  893. static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
  894. TWL4030_REG_MISC_SET_1, 0,
  895. twl4030_digimicswap_texts);
  896. static const struct snd_kcontrol_new twl4030_snd_controls[] = {
  897. /* Codec operation mode control */
  898. SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
  899. snd_soc_get_enum_double,
  900. snd_soc_put_twl4030_opmode_enum_double),
  901. /* Common playback gain controls */
  902. SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
  903. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  904. 0, 0x3f, 0, digital_fine_tlv),
  905. SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
  906. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  907. 0, 0x3f, 0, digital_fine_tlv),
  908. SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
  909. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  910. 6, 0x2, 0, digital_coarse_tlv),
  911. SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
  912. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  913. 6, 0x2, 0, digital_coarse_tlv),
  914. SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
  915. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  916. 3, 0x12, 1, analog_tlv),
  917. SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
  918. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  919. 3, 0x12, 1, analog_tlv),
  920. SOC_DOUBLE_R("DAC1 Analog Playback Switch",
  921. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  922. 1, 1, 0),
  923. SOC_DOUBLE_R("DAC2 Analog Playback Switch",
  924. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  925. 1, 1, 0),
  926. /* Common voice downlink gain controls */
  927. SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
  928. TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
  929. SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
  930. TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
  931. SOC_SINGLE("DAC Voice Analog Downlink Switch",
  932. TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
  933. /* Separate output gain controls */
  934. SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
  935. TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
  936. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  937. snd_soc_put_volsw_r2_twl4030, output_tvl),
  938. SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
  939. TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
  940. snd_soc_put_volsw_twl4030, output_tvl),
  941. SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
  942. TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
  943. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  944. snd_soc_put_volsw_r2_twl4030, output_tvl),
  945. SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
  946. TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
  947. snd_soc_put_volsw_twl4030, output_ear_tvl),
  948. /* Common capture gain controls */
  949. SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
  950. TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
  951. 0, 0x1f, 0, digital_capture_tlv),
  952. SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
  953. TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
  954. 0, 0x1f, 0, digital_capture_tlv),
  955. SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
  956. 0, 3, 5, 0, input_gain_tlv),
  957. SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
  958. SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
  959. SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
  960. SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
  961. SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
  962. };
  963. static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
  964. /* Left channel inputs */
  965. SND_SOC_DAPM_INPUT("MAINMIC"),
  966. SND_SOC_DAPM_INPUT("HSMIC"),
  967. SND_SOC_DAPM_INPUT("AUXL"),
  968. SND_SOC_DAPM_INPUT("CARKITMIC"),
  969. /* Right channel inputs */
  970. SND_SOC_DAPM_INPUT("SUBMIC"),
  971. SND_SOC_DAPM_INPUT("AUXR"),
  972. /* Digital microphones (Stereo) */
  973. SND_SOC_DAPM_INPUT("DIGIMIC0"),
  974. SND_SOC_DAPM_INPUT("DIGIMIC1"),
  975. /* Outputs */
  976. SND_SOC_DAPM_OUTPUT("EARPIECE"),
  977. SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
  978. SND_SOC_DAPM_OUTPUT("PREDRIVER"),
  979. SND_SOC_DAPM_OUTPUT("HSOL"),
  980. SND_SOC_DAPM_OUTPUT("HSOR"),
  981. SND_SOC_DAPM_OUTPUT("CARKITL"),
  982. SND_SOC_DAPM_OUTPUT("CARKITR"),
  983. SND_SOC_DAPM_OUTPUT("HFL"),
  984. SND_SOC_DAPM_OUTPUT("HFR"),
  985. SND_SOC_DAPM_OUTPUT("VIBRA"),
  986. /* AIF and APLL clocks for running DAIs (including loopback) */
  987. SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
  988. SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
  989. SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
  990. /* DACs */
  991. SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
  992. SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
  993. SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
  994. SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
  995. SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
  996. SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
  997. TWL4030_REG_VOICE_IF, 6, 0),
  998. /* Analog bypasses */
  999. SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1000. &twl4030_dapm_abypassr1_control),
  1001. SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1002. &twl4030_dapm_abypassl1_control),
  1003. SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1004. &twl4030_dapm_abypassr2_control),
  1005. SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1006. &twl4030_dapm_abypassl2_control),
  1007. SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
  1008. &twl4030_dapm_abypassv_control),
  1009. /* Master analog loopback switch */
  1010. SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
  1011. NULL, 0),
  1012. /* Digital bypasses */
  1013. SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
  1014. &twl4030_dapm_dbypassl_control),
  1015. SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
  1016. &twl4030_dapm_dbypassr_control),
  1017. SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
  1018. &twl4030_dapm_dbypassv_control),
  1019. /* Digital mixers, power control for the physical DACs */
  1020. SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
  1021. TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
  1022. SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
  1023. TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
  1024. SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
  1025. TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
  1026. SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
  1027. TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
  1028. SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
  1029. TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
  1030. /* Analog mixers, power control for the physical PGAs */
  1031. SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
  1032. TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
  1033. SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
  1034. TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
  1035. SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
  1036. TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
  1037. SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
  1038. TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
  1039. SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
  1040. TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
  1041. SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
  1042. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1043. SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
  1044. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1045. /* Output MIXER controls */
  1046. /* Earpiece */
  1047. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  1048. &twl4030_dapm_earpiece_controls[0],
  1049. ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
  1050. SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
  1051. 0, 0, NULL, 0, earpiecepga_event,
  1052. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1053. /* PreDrivL/R */
  1054. SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
  1055. &twl4030_dapm_predrivel_controls[0],
  1056. ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
  1057. SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
  1058. 0, 0, NULL, 0, predrivelpga_event,
  1059. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1060. SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
  1061. &twl4030_dapm_predriver_controls[0],
  1062. ARRAY_SIZE(twl4030_dapm_predriver_controls)),
  1063. SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
  1064. 0, 0, NULL, 0, predriverpga_event,
  1065. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1066. /* HeadsetL/R */
  1067. SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
  1068. &twl4030_dapm_hsol_controls[0],
  1069. ARRAY_SIZE(twl4030_dapm_hsol_controls)),
  1070. SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
  1071. 0, 0, NULL, 0, headsetlpga_event,
  1072. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1073. SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
  1074. &twl4030_dapm_hsor_controls[0],
  1075. ARRAY_SIZE(twl4030_dapm_hsor_controls)),
  1076. SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
  1077. 0, 0, NULL, 0, headsetrpga_event,
  1078. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1079. /* CarkitL/R */
  1080. SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
  1081. &twl4030_dapm_carkitl_controls[0],
  1082. ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
  1083. SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
  1084. 0, 0, NULL, 0, carkitlpga_event,
  1085. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1086. SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
  1087. &twl4030_dapm_carkitr_controls[0],
  1088. ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
  1089. SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
  1090. 0, 0, NULL, 0, carkitrpga_event,
  1091. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1092. /* Output MUX controls */
  1093. /* HandsfreeL/R */
  1094. SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
  1095. &twl4030_dapm_handsfreel_control),
  1096. SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
  1097. &twl4030_dapm_handsfreelmute_control),
  1098. SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
  1099. 0, 0, NULL, 0, handsfreelpga_event,
  1100. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1101. SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
  1102. &twl4030_dapm_handsfreer_control),
  1103. SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
  1104. &twl4030_dapm_handsfreermute_control),
  1105. SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
  1106. 0, 0, NULL, 0, handsfreerpga_event,
  1107. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1108. /* Vibra */
  1109. SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
  1110. &twl4030_dapm_vibra_control, vibramux_event,
  1111. SND_SOC_DAPM_PRE_PMU),
  1112. SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
  1113. &twl4030_dapm_vibrapath_control),
  1114. /* Introducing four virtual ADC, since TWL4030 have four channel for
  1115. capture */
  1116. SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
  1117. SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
  1118. SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
  1119. SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
  1120. SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
  1121. TWL4030_REG_VOICE_IF, 5, 0),
  1122. /* Analog/Digital mic path selection.
  1123. TX1 Left/Right: either analog Left/Right or Digimic0
  1124. TX2 Left/Right: either analog Left/Right or Digimic1 */
  1125. SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
  1126. &twl4030_dapm_micpathtx1_control),
  1127. SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
  1128. &twl4030_dapm_micpathtx2_control),
  1129. /* Analog input mixers for the capture amplifiers */
  1130. SND_SOC_DAPM_MIXER("Analog Left",
  1131. TWL4030_REG_ANAMICL, 4, 0,
  1132. &twl4030_dapm_analoglmic_controls[0],
  1133. ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
  1134. SND_SOC_DAPM_MIXER("Analog Right",
  1135. TWL4030_REG_ANAMICR, 4, 0,
  1136. &twl4030_dapm_analogrmic_controls[0],
  1137. ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
  1138. SND_SOC_DAPM_PGA("ADC Physical Left",
  1139. TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
  1140. SND_SOC_DAPM_PGA("ADC Physical Right",
  1141. TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
  1142. SND_SOC_DAPM_PGA_E("Digimic0 Enable",
  1143. TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
  1144. digimic_event, SND_SOC_DAPM_POST_PMU),
  1145. SND_SOC_DAPM_PGA_E("Digimic1 Enable",
  1146. TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
  1147. digimic_event, SND_SOC_DAPM_POST_PMU),
  1148. SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
  1149. NULL, 0),
  1150. SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
  1151. NULL, 0),
  1152. /* Microphone bias */
  1153. SND_SOC_DAPM_SUPPLY("Mic Bias 1",
  1154. TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
  1155. SND_SOC_DAPM_SUPPLY("Mic Bias 2",
  1156. TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
  1157. SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
  1158. TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
  1159. SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
  1160. };
  1161. static const struct snd_soc_dapm_route intercon[] = {
  1162. /* Stream -> DAC mapping */
  1163. {"DAC Right1", NULL, "HiFi Playback"},
  1164. {"DAC Left1", NULL, "HiFi Playback"},
  1165. {"DAC Right2", NULL, "HiFi Playback"},
  1166. {"DAC Left2", NULL, "HiFi Playback"},
  1167. {"DAC Voice", NULL, "VAIFIN"},
  1168. /* ADC -> Stream mapping */
  1169. {"HiFi Capture", NULL, "ADC Virtual Left1"},
  1170. {"HiFi Capture", NULL, "ADC Virtual Right1"},
  1171. {"HiFi Capture", NULL, "ADC Virtual Left2"},
  1172. {"HiFi Capture", NULL, "ADC Virtual Right2"},
  1173. {"VAIFOUT", NULL, "ADC Virtual Left2"},
  1174. {"VAIFOUT", NULL, "ADC Virtual Right2"},
  1175. {"VAIFOUT", NULL, "VIF Enable"},
  1176. {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
  1177. {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
  1178. {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
  1179. {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
  1180. {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
  1181. /* Supply for the digital part (APLL) */
  1182. {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
  1183. {"DAC Left1", NULL, "AIF Enable"},
  1184. {"DAC Right1", NULL, "AIF Enable"},
  1185. {"DAC Left2", NULL, "AIF Enable"},
  1186. {"DAC Right1", NULL, "AIF Enable"},
  1187. {"DAC Voice", NULL, "VIF Enable"},
  1188. {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
  1189. {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
  1190. {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
  1191. {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
  1192. {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
  1193. {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
  1194. {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
  1195. /* Internal playback routings */
  1196. /* Earpiece */
  1197. {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
  1198. {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1199. {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1200. {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1201. {"Earpiece PGA", NULL, "Earpiece Mixer"},
  1202. /* PreDrivL */
  1203. {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1204. {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1205. {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1206. {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1207. {"PredriveL PGA", NULL, "PredriveL Mixer"},
  1208. /* PreDrivR */
  1209. {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1210. {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1211. {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1212. {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1213. {"PredriveR PGA", NULL, "PredriveR Mixer"},
  1214. /* HeadsetL */
  1215. {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1216. {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1217. {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1218. {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
  1219. /* HeadsetR */
  1220. {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1221. {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1222. {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1223. {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
  1224. /* CarkitL */
  1225. {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1226. {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1227. {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1228. {"CarkitL PGA", NULL, "CarkitL Mixer"},
  1229. /* CarkitR */
  1230. {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1231. {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1232. {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1233. {"CarkitR PGA", NULL, "CarkitR Mixer"},
  1234. /* HandsfreeL */
  1235. {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
  1236. {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
  1237. {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1238. {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1239. {"HandsfreeL", "Switch", "HandsfreeL Mux"},
  1240. {"HandsfreeL PGA", NULL, "HandsfreeL"},
  1241. /* HandsfreeR */
  1242. {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
  1243. {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
  1244. {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1245. {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1246. {"HandsfreeR", "Switch", "HandsfreeR Mux"},
  1247. {"HandsfreeR PGA", NULL, "HandsfreeR"},
  1248. /* Vibra */
  1249. {"Vibra Mux", "AudioL1", "DAC Left1"},
  1250. {"Vibra Mux", "AudioR1", "DAC Right1"},
  1251. {"Vibra Mux", "AudioL2", "DAC Left2"},
  1252. {"Vibra Mux", "AudioR2", "DAC Right2"},
  1253. /* outputs */
  1254. /* Must be always connected (for AIF and APLL) */
  1255. {"Virtual HiFi OUT", NULL, "DAC Left1"},
  1256. {"Virtual HiFi OUT", NULL, "DAC Right1"},
  1257. {"Virtual HiFi OUT", NULL, "DAC Left2"},
  1258. {"Virtual HiFi OUT", NULL, "DAC Right2"},
  1259. /* Must be always connected (for APLL) */
  1260. {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
  1261. /* Physical outputs */
  1262. {"EARPIECE", NULL, "Earpiece PGA"},
  1263. {"PREDRIVEL", NULL, "PredriveL PGA"},
  1264. {"PREDRIVER", NULL, "PredriveR PGA"},
  1265. {"HSOL", NULL, "HeadsetL PGA"},
  1266. {"HSOR", NULL, "HeadsetR PGA"},
  1267. {"CARKITL", NULL, "CarkitL PGA"},
  1268. {"CARKITR", NULL, "CarkitR PGA"},
  1269. {"HFL", NULL, "HandsfreeL PGA"},
  1270. {"HFR", NULL, "HandsfreeR PGA"},
  1271. {"Vibra Route", "Audio", "Vibra Mux"},
  1272. {"VIBRA", NULL, "Vibra Route"},
  1273. /* Capture path */
  1274. /* Must be always connected (for AIF and APLL) */
  1275. {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
  1276. {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
  1277. {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
  1278. {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
  1279. /* Physical inputs */
  1280. {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
  1281. {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
  1282. {"Analog Left", "AUXL Capture Switch", "AUXL"},
  1283. {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
  1284. {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
  1285. {"Analog Right", "AUXR Capture Switch", "AUXR"},
  1286. {"ADC Physical Left", NULL, "Analog Left"},
  1287. {"ADC Physical Right", NULL, "Analog Right"},
  1288. {"Digimic0 Enable", NULL, "DIGIMIC0"},
  1289. {"Digimic1 Enable", NULL, "DIGIMIC1"},
  1290. {"DIGIMIC0", NULL, "micbias1 select"},
  1291. {"DIGIMIC1", NULL, "micbias2 select"},
  1292. /* TX1 Left capture path */
  1293. {"TX1 Capture Route", "Analog", "ADC Physical Left"},
  1294. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1295. /* TX1 Right capture path */
  1296. {"TX1 Capture Route", "Analog", "ADC Physical Right"},
  1297. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1298. /* TX2 Left capture path */
  1299. {"TX2 Capture Route", "Analog", "ADC Physical Left"},
  1300. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1301. /* TX2 Right capture path */
  1302. {"TX2 Capture Route", "Analog", "ADC Physical Right"},
  1303. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1304. {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
  1305. {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
  1306. {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
  1307. {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
  1308. {"ADC Virtual Left1", NULL, "AIF Enable"},
  1309. {"ADC Virtual Right1", NULL, "AIF Enable"},
  1310. {"ADC Virtual Left2", NULL, "AIF Enable"},
  1311. {"ADC Virtual Right2", NULL, "AIF Enable"},
  1312. /* Analog bypass routes */
  1313. {"Right1 Analog Loopback", "Switch", "Analog Right"},
  1314. {"Left1 Analog Loopback", "Switch", "Analog Left"},
  1315. {"Right2 Analog Loopback", "Switch", "Analog Right"},
  1316. {"Left2 Analog Loopback", "Switch", "Analog Left"},
  1317. {"Voice Analog Loopback", "Switch", "Analog Left"},
  1318. /* Supply for the Analog loopbacks */
  1319. {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
  1320. {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
  1321. {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
  1322. {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
  1323. {"Voice Analog Loopback", NULL, "FM Loop Enable"},
  1324. {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
  1325. {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
  1326. {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
  1327. {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
  1328. {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
  1329. /* Digital bypass routes */
  1330. {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
  1331. {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
  1332. {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
  1333. {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
  1334. {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
  1335. {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
  1336. };
  1337. static int twl4030_set_bias_level(struct snd_soc_component *component,
  1338. enum snd_soc_bias_level level)
  1339. {
  1340. switch (level) {
  1341. case SND_SOC_BIAS_ON:
  1342. break;
  1343. case SND_SOC_BIAS_PREPARE:
  1344. break;
  1345. case SND_SOC_BIAS_STANDBY:
  1346. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
  1347. twl4030_codec_enable(component, 1);
  1348. break;
  1349. case SND_SOC_BIAS_OFF:
  1350. twl4030_codec_enable(component, 0);
  1351. break;
  1352. }
  1353. return 0;
  1354. }
  1355. static void twl4030_constraints(struct twl4030_priv *twl4030,
  1356. struct snd_pcm_substream *mst_substream)
  1357. {
  1358. struct snd_pcm_substream *slv_substream;
  1359. /* Pick the stream, which need to be constrained */
  1360. if (mst_substream == twl4030->master_substream)
  1361. slv_substream = twl4030->slave_substream;
  1362. else if (mst_substream == twl4030->slave_substream)
  1363. slv_substream = twl4030->master_substream;
  1364. else /* This should not happen.. */
  1365. return;
  1366. /* Set the constraints according to the already configured stream */
  1367. snd_pcm_hw_constraint_single(slv_substream->runtime,
  1368. SNDRV_PCM_HW_PARAM_RATE,
  1369. twl4030->rate);
  1370. snd_pcm_hw_constraint_single(slv_substream->runtime,
  1371. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  1372. twl4030->sample_bits);
  1373. snd_pcm_hw_constraint_single(slv_substream->runtime,
  1374. SNDRV_PCM_HW_PARAM_CHANNELS,
  1375. twl4030->channels);
  1376. }
  1377. /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
  1378. * capture has to be enabled/disabled. */
  1379. static void twl4030_tdm_enable(struct snd_soc_component *component, int direction,
  1380. int enable)
  1381. {
  1382. u8 reg, mask;
  1383. reg = twl4030_read(component, TWL4030_REG_OPTION);
  1384. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1385. mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
  1386. else
  1387. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1388. if (enable)
  1389. reg |= mask;
  1390. else
  1391. reg &= ~mask;
  1392. twl4030_write(component, TWL4030_REG_OPTION, reg);
  1393. }
  1394. static int twl4030_startup(struct snd_pcm_substream *substream,
  1395. struct snd_soc_dai *dai)
  1396. {
  1397. struct snd_soc_component *component = dai->component;
  1398. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1399. if (twl4030->master_substream) {
  1400. twl4030->slave_substream = substream;
  1401. /* The DAI has one configuration for playback and capture, so
  1402. * if the DAI has been already configured then constrain this
  1403. * substream to match it. */
  1404. if (twl4030->configured)
  1405. twl4030_constraints(twl4030, twl4030->master_substream);
  1406. } else {
  1407. if (!(twl4030_read(component, TWL4030_REG_CODEC_MODE) &
  1408. TWL4030_OPTION_1)) {
  1409. /* In option2 4 channel is not supported, set the
  1410. * constraint for the first stream for channels, the
  1411. * second stream will 'inherit' this cosntraint */
  1412. snd_pcm_hw_constraint_single(substream->runtime,
  1413. SNDRV_PCM_HW_PARAM_CHANNELS,
  1414. 2);
  1415. }
  1416. twl4030->master_substream = substream;
  1417. }
  1418. return 0;
  1419. }
  1420. static void twl4030_shutdown(struct snd_pcm_substream *substream,
  1421. struct snd_soc_dai *dai)
  1422. {
  1423. struct snd_soc_component *component = dai->component;
  1424. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1425. if (twl4030->master_substream == substream)
  1426. twl4030->master_substream = twl4030->slave_substream;
  1427. twl4030->slave_substream = NULL;
  1428. /* If all streams are closed, or the remaining stream has not yet
  1429. * been configured than set the DAI as not configured. */
  1430. if (!twl4030->master_substream)
  1431. twl4030->configured = 0;
  1432. else if (!twl4030->master_substream->runtime->channels)
  1433. twl4030->configured = 0;
  1434. /* If the closing substream had 4 channel, do the necessary cleanup */
  1435. if (substream->runtime->channels == 4)
  1436. twl4030_tdm_enable(component, substream->stream, 0);
  1437. }
  1438. static int twl4030_hw_params(struct snd_pcm_substream *substream,
  1439. struct snd_pcm_hw_params *params,
  1440. struct snd_soc_dai *dai)
  1441. {
  1442. struct snd_soc_component *component = dai->component;
  1443. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1444. u8 mode, old_mode, format, old_format;
  1445. /* If the substream has 4 channel, do the necessary setup */
  1446. if (params_channels(params) == 4) {
  1447. format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
  1448. mode = twl4030_read(component, TWL4030_REG_CODEC_MODE);
  1449. /* Safety check: are we in the correct operating mode and
  1450. * the interface is in TDM mode? */
  1451. if ((mode & TWL4030_OPTION_1) &&
  1452. ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
  1453. twl4030_tdm_enable(component, substream->stream, 1);
  1454. else
  1455. return -EINVAL;
  1456. }
  1457. if (twl4030->configured)
  1458. /* Ignoring hw_params for already configured DAI */
  1459. return 0;
  1460. /* bit rate */
  1461. old_mode = twl4030_read(component,
  1462. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1463. mode = old_mode & ~TWL4030_APLL_RATE;
  1464. switch (params_rate(params)) {
  1465. case 8000:
  1466. mode |= TWL4030_APLL_RATE_8000;
  1467. break;
  1468. case 11025:
  1469. mode |= TWL4030_APLL_RATE_11025;
  1470. break;
  1471. case 12000:
  1472. mode |= TWL4030_APLL_RATE_12000;
  1473. break;
  1474. case 16000:
  1475. mode |= TWL4030_APLL_RATE_16000;
  1476. break;
  1477. case 22050:
  1478. mode |= TWL4030_APLL_RATE_22050;
  1479. break;
  1480. case 24000:
  1481. mode |= TWL4030_APLL_RATE_24000;
  1482. break;
  1483. case 32000:
  1484. mode |= TWL4030_APLL_RATE_32000;
  1485. break;
  1486. case 44100:
  1487. mode |= TWL4030_APLL_RATE_44100;
  1488. break;
  1489. case 48000:
  1490. mode |= TWL4030_APLL_RATE_48000;
  1491. break;
  1492. case 96000:
  1493. mode |= TWL4030_APLL_RATE_96000;
  1494. break;
  1495. default:
  1496. dev_err(component->dev, "%s: unknown rate %d\n", __func__,
  1497. params_rate(params));
  1498. return -EINVAL;
  1499. }
  1500. /* sample size */
  1501. old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
  1502. format = old_format;
  1503. format &= ~TWL4030_DATA_WIDTH;
  1504. switch (params_width(params)) {
  1505. case 16:
  1506. format |= TWL4030_DATA_WIDTH_16S_16W;
  1507. break;
  1508. case 32:
  1509. format |= TWL4030_DATA_WIDTH_32S_24W;
  1510. break;
  1511. default:
  1512. dev_err(component->dev, "%s: unsupported bits/sample %d\n",
  1513. __func__, params_width(params));
  1514. return -EINVAL;
  1515. }
  1516. if (format != old_format || mode != old_mode) {
  1517. if (twl4030->codec_powered) {
  1518. /*
  1519. * If the codec is powered, than we need to toggle the
  1520. * codec power.
  1521. */
  1522. twl4030_codec_enable(component, 0);
  1523. twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
  1524. twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
  1525. twl4030_codec_enable(component, 1);
  1526. } else {
  1527. twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
  1528. twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
  1529. }
  1530. }
  1531. /* Store the important parameters for the DAI configuration and set
  1532. * the DAI as configured */
  1533. twl4030->configured = 1;
  1534. twl4030->rate = params_rate(params);
  1535. twl4030->sample_bits = hw_param_interval(params,
  1536. SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
  1537. twl4030->channels = params_channels(params);
  1538. /* If both playback and capture streams are open, and one of them
  1539. * is setting the hw parameters right now (since we are here), set
  1540. * constraints to the other stream to match the current one. */
  1541. if (twl4030->slave_substream)
  1542. twl4030_constraints(twl4030, substream);
  1543. return 0;
  1544. }
  1545. static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
  1546. unsigned int freq, int dir)
  1547. {
  1548. struct snd_soc_component *component = codec_dai->component;
  1549. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1550. switch (freq) {
  1551. case 19200000:
  1552. case 26000000:
  1553. case 38400000:
  1554. break;
  1555. default:
  1556. dev_err(component->dev, "Unsupported HFCLKIN: %u\n", freq);
  1557. return -EINVAL;
  1558. }
  1559. if ((freq / 1000) != twl4030->sysclk) {
  1560. dev_err(component->dev,
  1561. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1562. freq, twl4030->sysclk * 1000);
  1563. return -EINVAL;
  1564. }
  1565. return 0;
  1566. }
  1567. static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  1568. {
  1569. struct snd_soc_component *component = codec_dai->component;
  1570. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1571. u8 old_format, format;
  1572. /* get format */
  1573. old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
  1574. format = old_format;
  1575. /* set master/slave audio interface */
  1576. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1577. case SND_SOC_DAIFMT_CBM_CFM:
  1578. format &= ~(TWL4030_AIF_SLAVE_EN);
  1579. format &= ~(TWL4030_CLK256FS_EN);
  1580. break;
  1581. case SND_SOC_DAIFMT_CBS_CFS:
  1582. format |= TWL4030_AIF_SLAVE_EN;
  1583. format |= TWL4030_CLK256FS_EN;
  1584. break;
  1585. default:
  1586. return -EINVAL;
  1587. }
  1588. /* interface format */
  1589. format &= ~TWL4030_AIF_FORMAT;
  1590. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1591. case SND_SOC_DAIFMT_I2S:
  1592. format |= TWL4030_AIF_FORMAT_CODEC;
  1593. break;
  1594. case SND_SOC_DAIFMT_DSP_A:
  1595. format |= TWL4030_AIF_FORMAT_TDM;
  1596. break;
  1597. default:
  1598. return -EINVAL;
  1599. }
  1600. if (format != old_format) {
  1601. if (twl4030->codec_powered) {
  1602. /*
  1603. * If the codec is powered, than we need to toggle the
  1604. * codec power.
  1605. */
  1606. twl4030_codec_enable(component, 0);
  1607. twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
  1608. twl4030_codec_enable(component, 1);
  1609. } else {
  1610. twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
  1611. }
  1612. }
  1613. return 0;
  1614. }
  1615. static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
  1616. {
  1617. struct snd_soc_component *component = dai->component;
  1618. u8 reg = twl4030_read(component, TWL4030_REG_AUDIO_IF);
  1619. if (tristate)
  1620. reg |= TWL4030_AIF_TRI_EN;
  1621. else
  1622. reg &= ~TWL4030_AIF_TRI_EN;
  1623. return twl4030_write(component, TWL4030_REG_AUDIO_IF, reg);
  1624. }
  1625. /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
  1626. * (VTXL, VTXR) for uplink has to be enabled/disabled. */
  1627. static void twl4030_voice_enable(struct snd_soc_component *component, int direction,
  1628. int enable)
  1629. {
  1630. u8 reg, mask;
  1631. reg = twl4030_read(component, TWL4030_REG_OPTION);
  1632. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1633. mask = TWL4030_ARXL1_VRX_EN;
  1634. else
  1635. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1636. if (enable)
  1637. reg |= mask;
  1638. else
  1639. reg &= ~mask;
  1640. twl4030_write(component, TWL4030_REG_OPTION, reg);
  1641. }
  1642. static int twl4030_voice_startup(struct snd_pcm_substream *substream,
  1643. struct snd_soc_dai *dai)
  1644. {
  1645. struct snd_soc_component *component = dai->component;
  1646. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1647. u8 mode;
  1648. /* If the system master clock is not 26MHz, the voice PCM interface is
  1649. * not available.
  1650. */
  1651. if (twl4030->sysclk != 26000) {
  1652. dev_err(component->dev,
  1653. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1654. __func__, twl4030->sysclk);
  1655. return -EINVAL;
  1656. }
  1657. /* If the codec mode is not option2, the voice PCM interface is not
  1658. * available.
  1659. */
  1660. mode = twl4030_read(component, TWL4030_REG_CODEC_MODE)
  1661. & TWL4030_OPT_MODE;
  1662. if (mode != TWL4030_OPTION_2) {
  1663. dev_err(component->dev, "%s: the codec mode is not option2\n",
  1664. __func__);
  1665. return -EINVAL;
  1666. }
  1667. return 0;
  1668. }
  1669. static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
  1670. struct snd_soc_dai *dai)
  1671. {
  1672. struct snd_soc_component *component = dai->component;
  1673. /* Enable voice digital filters */
  1674. twl4030_voice_enable(component, substream->stream, 0);
  1675. }
  1676. static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
  1677. struct snd_pcm_hw_params *params,
  1678. struct snd_soc_dai *dai)
  1679. {
  1680. struct snd_soc_component *component = dai->component;
  1681. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1682. u8 old_mode, mode;
  1683. /* Enable voice digital filters */
  1684. twl4030_voice_enable(component, substream->stream, 1);
  1685. /* bit rate */
  1686. old_mode = twl4030_read(component,
  1687. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1688. mode = old_mode;
  1689. switch (params_rate(params)) {
  1690. case 8000:
  1691. mode &= ~(TWL4030_SEL_16K);
  1692. break;
  1693. case 16000:
  1694. mode |= TWL4030_SEL_16K;
  1695. break;
  1696. default:
  1697. dev_err(component->dev, "%s: unknown rate %d\n", __func__,
  1698. params_rate(params));
  1699. return -EINVAL;
  1700. }
  1701. if (mode != old_mode) {
  1702. if (twl4030->codec_powered) {
  1703. /*
  1704. * If the codec is powered, than we need to toggle the
  1705. * codec power.
  1706. */
  1707. twl4030_codec_enable(component, 0);
  1708. twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
  1709. twl4030_codec_enable(component, 1);
  1710. } else {
  1711. twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
  1712. }
  1713. }
  1714. return 0;
  1715. }
  1716. static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1717. int clk_id, unsigned int freq, int dir)
  1718. {
  1719. struct snd_soc_component *component = codec_dai->component;
  1720. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1721. if (freq != 26000000) {
  1722. dev_err(component->dev,
  1723. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1724. __func__, freq / 1000);
  1725. return -EINVAL;
  1726. }
  1727. if ((freq / 1000) != twl4030->sysclk) {
  1728. dev_err(component->dev,
  1729. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1730. freq, twl4030->sysclk * 1000);
  1731. return -EINVAL;
  1732. }
  1733. return 0;
  1734. }
  1735. static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1736. unsigned int fmt)
  1737. {
  1738. struct snd_soc_component *component = codec_dai->component;
  1739. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1740. u8 old_format, format;
  1741. /* get format */
  1742. old_format = twl4030_read(component, TWL4030_REG_VOICE_IF);
  1743. format = old_format;
  1744. /* set master/slave audio interface */
  1745. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1746. case SND_SOC_DAIFMT_CBM_CFM:
  1747. format &= ~(TWL4030_VIF_SLAVE_EN);
  1748. break;
  1749. case SND_SOC_DAIFMT_CBS_CFS:
  1750. format |= TWL4030_VIF_SLAVE_EN;
  1751. break;
  1752. default:
  1753. return -EINVAL;
  1754. }
  1755. /* clock inversion */
  1756. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1757. case SND_SOC_DAIFMT_IB_NF:
  1758. format &= ~(TWL4030_VIF_FORMAT);
  1759. break;
  1760. case SND_SOC_DAIFMT_NB_IF:
  1761. format |= TWL4030_VIF_FORMAT;
  1762. break;
  1763. default:
  1764. return -EINVAL;
  1765. }
  1766. if (format != old_format) {
  1767. if (twl4030->codec_powered) {
  1768. /*
  1769. * If the codec is powered, than we need to toggle the
  1770. * codec power.
  1771. */
  1772. twl4030_codec_enable(component, 0);
  1773. twl4030_write(component, TWL4030_REG_VOICE_IF, format);
  1774. twl4030_codec_enable(component, 1);
  1775. } else {
  1776. twl4030_write(component, TWL4030_REG_VOICE_IF, format);
  1777. }
  1778. }
  1779. return 0;
  1780. }
  1781. static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
  1782. {
  1783. struct snd_soc_component *component = dai->component;
  1784. u8 reg = twl4030_read(component, TWL4030_REG_VOICE_IF);
  1785. if (tristate)
  1786. reg |= TWL4030_VIF_TRI_EN;
  1787. else
  1788. reg &= ~TWL4030_VIF_TRI_EN;
  1789. return twl4030_write(component, TWL4030_REG_VOICE_IF, reg);
  1790. }
  1791. #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
  1792. #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1793. static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
  1794. .startup = twl4030_startup,
  1795. .shutdown = twl4030_shutdown,
  1796. .hw_params = twl4030_hw_params,
  1797. .set_sysclk = twl4030_set_dai_sysclk,
  1798. .set_fmt = twl4030_set_dai_fmt,
  1799. .set_tristate = twl4030_set_tristate,
  1800. };
  1801. static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
  1802. .startup = twl4030_voice_startup,
  1803. .shutdown = twl4030_voice_shutdown,
  1804. .hw_params = twl4030_voice_hw_params,
  1805. .set_sysclk = twl4030_voice_set_dai_sysclk,
  1806. .set_fmt = twl4030_voice_set_dai_fmt,
  1807. .set_tristate = twl4030_voice_set_tristate,
  1808. };
  1809. static struct snd_soc_dai_driver twl4030_dai[] = {
  1810. {
  1811. .name = "twl4030-hifi",
  1812. .playback = {
  1813. .stream_name = "HiFi Playback",
  1814. .channels_min = 2,
  1815. .channels_max = 4,
  1816. .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
  1817. .formats = TWL4030_FORMATS,
  1818. .sig_bits = 24,},
  1819. .capture = {
  1820. .stream_name = "HiFi Capture",
  1821. .channels_min = 2,
  1822. .channels_max = 4,
  1823. .rates = TWL4030_RATES,
  1824. .formats = TWL4030_FORMATS,
  1825. .sig_bits = 24,},
  1826. .ops = &twl4030_dai_hifi_ops,
  1827. },
  1828. {
  1829. .name = "twl4030-voice",
  1830. .playback = {
  1831. .stream_name = "Voice Playback",
  1832. .channels_min = 1,
  1833. .channels_max = 1,
  1834. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1835. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1836. .capture = {
  1837. .stream_name = "Voice Capture",
  1838. .channels_min = 1,
  1839. .channels_max = 2,
  1840. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1841. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1842. .ops = &twl4030_dai_voice_ops,
  1843. },
  1844. };
  1845. static int twl4030_soc_probe(struct snd_soc_component *component)
  1846. {
  1847. struct twl4030_priv *twl4030;
  1848. twl4030 = devm_kzalloc(component->dev, sizeof(struct twl4030_priv),
  1849. GFP_KERNEL);
  1850. if (!twl4030)
  1851. return -ENOMEM;
  1852. snd_soc_component_set_drvdata(component, twl4030);
  1853. /* Set the defaults, and power up the codec */
  1854. twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
  1855. twl4030_init_chip(component);
  1856. return 0;
  1857. }
  1858. static void twl4030_soc_remove(struct snd_soc_component *component)
  1859. {
  1860. struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
  1861. struct twl4030_codec_data *pdata = twl4030->pdata;
  1862. if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
  1863. gpio_free(pdata->hs_extmute_gpio);
  1864. }
  1865. static const struct snd_soc_component_driver soc_component_dev_twl4030 = {
  1866. .probe = twl4030_soc_probe,
  1867. .remove = twl4030_soc_remove,
  1868. .read = twl4030_read,
  1869. .write = twl4030_write,
  1870. .set_bias_level = twl4030_set_bias_level,
  1871. .controls = twl4030_snd_controls,
  1872. .num_controls = ARRAY_SIZE(twl4030_snd_controls),
  1873. .dapm_widgets = twl4030_dapm_widgets,
  1874. .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
  1875. .dapm_routes = intercon,
  1876. .num_dapm_routes = ARRAY_SIZE(intercon),
  1877. .use_pmdown_time = 1,
  1878. .endianness = 1,
  1879. .non_legacy_dai_naming = 1,
  1880. };
  1881. static int twl4030_codec_probe(struct platform_device *pdev)
  1882. {
  1883. return devm_snd_soc_register_component(&pdev->dev,
  1884. &soc_component_dev_twl4030,
  1885. twl4030_dai, ARRAY_SIZE(twl4030_dai));
  1886. }
  1887. MODULE_ALIAS("platform:twl4030-codec");
  1888. static struct platform_driver twl4030_codec_driver = {
  1889. .probe = twl4030_codec_probe,
  1890. .driver = {
  1891. .name = "twl4030-codec",
  1892. },
  1893. };
  1894. module_platform_driver(twl4030_codec_driver);
  1895. MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
  1896. MODULE_AUTHOR("Steve Sakoman");
  1897. MODULE_LICENSE("GPL");