tlv320dac33.h 7.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * ALSA SoC Texas Instruments TLV320DAC33 codec driver
  4. *
  5. * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
  6. *
  7. * Copyright: (C) 2009 Nokia Corporation
  8. */
  9. #ifndef __TLV320DAC33_H
  10. #define __TLV320DAC33_H
  11. #define DAC33_PAGE_SELECT 0x00
  12. #define DAC33_PWR_CTRL 0x01
  13. #define DAC33_PLL_CTRL_A 0x02
  14. #define DAC33_PLL_CTRL_B 0x03
  15. #define DAC33_PLL_CTRL_C 0x04
  16. #define DAC33_PLL_CTRL_D 0x05
  17. #define DAC33_PLL_CTRL_E 0x06
  18. #define DAC33_INT_OSC_CTRL 0x07
  19. #define DAC33_INT_OSC_FREQ_RAT_A 0x08
  20. #define DAC33_INT_OSC_FREQ_RAT_B 0x09
  21. #define DAC33_INT_OSC_DAC_RATIO_SET 0x0A
  22. #define DAC33_CALIB_TIME 0x0B
  23. #define DAC33_INT_OSC_CTRL_B 0x0C
  24. #define DAC33_INT_OSC_CTRL_C 0x0D
  25. #define DAC33_INT_OSC_STATUS 0x0E
  26. #define DAC33_INT_OSC_DAC_RATIO_READ 0x0F
  27. #define DAC33_INT_OSC_FREQ_RAT_READ_A 0x10
  28. #define DAC33_INT_OSC_FREQ_RAT_READ_B 0x11
  29. #define DAC33_SER_AUDIOIF_CTRL_A 0x12
  30. #define DAC33_SER_AUDIOIF_CTRL_B 0x13
  31. #define DAC33_SER_AUDIOIF_CTRL_C 0x14
  32. #define DAC33_FIFO_CTRL_A 0x15
  33. #define DAC33_UTHR_MSB 0x16
  34. #define DAC33_UTHR_LSB 0x17
  35. #define DAC33_ATHR_MSB 0x18
  36. #define DAC33_ATHR_LSB 0x19
  37. #define DAC33_LTHR_MSB 0x1A
  38. #define DAC33_LTHR_LSB 0x1B
  39. #define DAC33_PREFILL_MSB 0x1C
  40. #define DAC33_PREFILL_LSB 0x1D
  41. #define DAC33_NSAMPLE_MSB 0x1E
  42. #define DAC33_NSAMPLE_LSB 0x1F
  43. #define DAC33_FIFO_WPTR_MSB 0x20
  44. #define DAC33_FIFO_WPTR_LSB 0x21
  45. #define DAC33_FIFO_RPTR_MSB 0x22
  46. #define DAC33_FIFO_RPTR_LSB 0x23
  47. #define DAC33_FIFO_DEPTH_MSB 0x24
  48. #define DAC33_FIFO_DEPTH_LSB 0x25
  49. #define DAC33_SAMPLES_REMAINING_MSB 0x26
  50. #define DAC33_SAMPLES_REMAINING_LSB 0x27
  51. #define DAC33_FIFO_IRQ_FLAG 0x28
  52. #define DAC33_FIFO_IRQ_MASK 0x29
  53. #define DAC33_FIFO_IRQ_MODE_A 0x2A
  54. #define DAC33_FIFO_IRQ_MODE_B 0x2B
  55. #define DAC33_DAC_CTRL_A 0x2C
  56. #define DAC33_DAC_CTRL_B 0x2D
  57. #define DAC33_DAC_CTRL_C 0x2E
  58. #define DAC33_LDAC_DIG_VOL_CTRL 0x2F
  59. #define DAC33_RDAC_DIG_VOL_CTRL 0x30
  60. #define DAC33_DAC_STATUS_FLAGS 0x31
  61. #define DAC33_ASRC_CTRL_A 0x32
  62. #define DAC33_ASRC_CTRL_B 0x33
  63. #define DAC33_SRC_REF_CLK_RATIO_A 0x34
  64. #define DAC33_SRC_REF_CLK_RATIO_B 0x35
  65. #define DAC33_SRC_EST_REF_CLK_RATIO_A 0x36
  66. #define DAC33_SRC_EST_REF_CLK_RATIO_B 0x37
  67. #define DAC33_INTP_CTRL_A 0x38
  68. #define DAC33_INTP_CTRL_B 0x39
  69. /* Registers 0x3A - 0x3F Reserved */
  70. #define DAC33_LDAC_PWR_CTRL 0x40
  71. #define DAC33_RDAC_PWR_CTRL 0x41
  72. #define DAC33_OUT_AMP_CM_CTRL 0x42
  73. #define DAC33_OUT_AMP_PWR_CTRL 0x43
  74. #define DAC33_OUT_AMP_CTRL 0x44
  75. #define DAC33_LINEL_TO_LLO_VOL 0x45
  76. /* Registers 0x45 - 0x47 Reserved */
  77. #define DAC33_LINER_TO_RLO_VOL 0x48
  78. #define DAC33_ANA_VOL_SOFT_STEP_CTRL 0x49
  79. #define DAC33_OSC_TRIM 0x4A
  80. /* Registers 0x4B - 0x7C Reserved */
  81. #define DAC33_DEVICE_ID_MSB 0x7D
  82. #define DAC33_DEVICE_ID_LSB 0x7E
  83. #define DAC33_DEVICE_REV_ID 0x7F
  84. #define DAC33_CACHEREGNUM 128
  85. /* Bit definitions */
  86. /* DAC33_PWR_CTRL (0x01) */
  87. #define DAC33_DACRPDNB (0x01 << 0)
  88. #define DAC33_DACLPDNB (0x01 << 1)
  89. #define DAC33_OSCPDNB (0x01 << 2)
  90. #define DAC33_PLLPDNB (0x01 << 3)
  91. #define DAC33_PDNALLB (0x01 << 4)
  92. #define DAC33_SOFT_RESET (0x01 << 7)
  93. /* DAC33_INT_OSC_CTRL (0x07) */
  94. #define DAC33_REFSEL (0x01 << 1)
  95. /* DAC33_INT_OSC_CTRL_B (0x0C) */
  96. #define DAC33_ADJSTEP(x) (x << 0)
  97. #define DAC33_ADJTHRSHLD(x) (x << 4)
  98. /* DAC33_INT_OSC_CTRL_C (0x0D) */
  99. #define DAC33_REFDIV(x) (x << 4)
  100. /* DAC33_INT_OSC_STATUS (0x0E) */
  101. #define DAC33_OSCSTATUS_IDLE_CALIB (0x00)
  102. #define DAC33_OSCSTATUS_NORMAL (0x01)
  103. #define DAC33_OSCSTATUS_ADJUSTMENT (0x03)
  104. #define DAC33_OSCSTATUS_NOT_USED (0x02)
  105. /* DAC33_SER_AUDIOIF_CTRL_A (0x12) */
  106. #define DAC33_MSWCLK (0x01 << 0)
  107. #define DAC33_MSBCLK (0x01 << 1)
  108. #define DAC33_AFMT_MASK (0x03 << 2)
  109. #define DAC33_AFMT_I2S (0x00 << 2)
  110. #define DAC33_AFMT_DSP (0x01 << 2)
  111. #define DAC33_AFMT_RIGHT_J (0x02 << 2)
  112. #define DAC33_AFMT_LEFT_J (0x03 << 2)
  113. #define DAC33_WLEN_MASK (0x03 << 4)
  114. #define DAC33_WLEN_16 (0x00 << 4)
  115. #define DAC33_WLEN_20 (0x01 << 4)
  116. #define DAC33_WLEN_24 (0x02 << 4)
  117. #define DAC33_WLEN_32 (0x03 << 4)
  118. #define DAC33_NCYCL_MASK (0x03 << 6)
  119. #define DAC33_NCYCL_16 (0x00 << 6)
  120. #define DAC33_NCYCL_20 (0x01 << 6)
  121. #define DAC33_NCYCL_24 (0x02 << 6)
  122. #define DAC33_NCYCL_32 (0x03 << 6)
  123. /* DAC33_SER_AUDIOIF_CTRL_B (0x13) */
  124. #define DAC33_DATA_DELAY_MASK (0x03 << 2)
  125. #define DAC33_DATA_DELAY(x) (x << 2)
  126. #define DAC33_BCLKON (0x01 << 5)
  127. /* DAC33_FIFO_CTRL_A (0x15) */
  128. #define DAC33_WIDTH (0x01 << 0)
  129. #define DAC33_FBYPAS (0x01 << 1)
  130. #define DAC33_FAUTO (0x01 << 2)
  131. #define DAC33_FIFOFLUSH (0x01 << 3)
  132. /*
  133. * UTHR, ATHR, LTHR, PREFILL, NSAMPLE (0x16 - 0x1F)
  134. * 13-bit values
  135. */
  136. #define DAC33_THRREG(x) (((x) & 0x1FFF) << 3)
  137. /* DAC33_FIFO_IRQ_MASK (0x29) */
  138. #define DAC33_MNS (0x01 << 0)
  139. #define DAC33_MPS (0x01 << 1)
  140. #define DAC33_MAT (0x01 << 2)
  141. #define DAC33_MLT (0x01 << 3)
  142. #define DAC33_MUT (0x01 << 4)
  143. #define DAC33_MUF (0x01 << 5)
  144. #define DAC33_MOF (0x01 << 6)
  145. #define DAC33_FIFO_IRQ_MODE_MASK (0x03)
  146. #define DAC33_FIFO_IRQ_MODE_RISING (0x00)
  147. #define DAC33_FIFO_IRQ_MODE_FALLING (0x01)
  148. #define DAC33_FIFO_IRQ_MODE_LEVEL (0x02)
  149. #define DAC33_FIFO_IRQ_MODE_EDGE (0x03)
  150. /* DAC33_FIFO_IRQ_MODE_A (0x2A) */
  151. #define DAC33_UTM(x) (x << 0)
  152. #define DAC33_UFM(x) (x << 2)
  153. #define DAC33_OFM(x) (x << 4)
  154. /* DAC33_FIFO_IRQ_MODE_B (0x2B) */
  155. #define DAC33_NSM(x) (x << 0)
  156. #define DAC33_PSM(x) (x << 2)
  157. #define DAC33_ATM(x) (x << 4)
  158. #define DAC33_LTM(x) (x << 6)
  159. /* DAC33_DAC_CTRL_A (0x2C) */
  160. #define DAC33_DACRATE(x) (x << 0)
  161. #define DAC33_DACDUAL (0x01 << 4)
  162. #define DAC33_DACLKSEL_MASK (0x03 << 5)
  163. #define DAC33_DACLKSEL_INTSOC (0x00 << 5)
  164. #define DAC33_DACLKSEL_PLL (0x01 << 5)
  165. #define DAC33_DACLKSEL_MCLK (0x02 << 5)
  166. #define DAC33_DACLKSEL_BCLK (0x03 << 5)
  167. /* DAC33_DAC_CTRL_B (0x2D) */
  168. #define DAC33_DACSRCR_MASK (0x03 << 0)
  169. #define DAC33_DACSRCR_MUTE (0x00 << 0)
  170. #define DAC33_DACSRCR_RIGHT (0x01 << 0)
  171. #define DAC33_DACSRCR_LEFT (0x02 << 0)
  172. #define DAC33_DACSRCR_MONOMIX (0x03 << 0)
  173. #define DAC33_DACSRCL_MASK (0x03 << 2)
  174. #define DAC33_DACSRCL_MUTE (0x00 << 2)
  175. #define DAC33_DACSRCL_LEFT (0x01 << 2)
  176. #define DAC33_DACSRCL_RIGHT (0x02 << 2)
  177. #define DAC33_DACSRCL_MONOMIX (0x03 << 2)
  178. #define DAC33_DVOLSTEP_MASK (0x03 << 4)
  179. #define DAC33_DVOLSTEP_SS_PERFS (0x00 << 4)
  180. #define DAC33_DVOLSTEP_SS_PER2FS (0x01 << 4)
  181. #define DAC33_DVOLSTEP_SS_DISABLED (0x02 << 4)
  182. #define DAC33_DVOLCTRL_MASK (0x03 << 6)
  183. #define DAC33_DVOLCTRL_LR_INDEPENDENT1 (0x00 << 6)
  184. #define DAC33_DVOLCTRL_LR_RIGHT_CONTROL (0x01 << 6)
  185. #define DAC33_DVOLCTRL_LR_LEFT_CONTROL (0x02 << 6)
  186. #define DAC33_DVOLCTRL_LR_INDEPENDENT2 (0x03 << 6)
  187. /* DAC33_DAC_CTRL_C (0x2E) */
  188. #define DAC33_DEEMENR (0x01 << 0)
  189. #define DAC33_EFFENR (0x01 << 1)
  190. #define DAC33_DEEMENL (0x01 << 2)
  191. #define DAC33_EFFENL (0x01 << 3)
  192. #define DAC33_EN3D (0x01 << 4)
  193. #define DAC33_RESYNMUTE (0x01 << 5)
  194. #define DAC33_RESYNEN (0x01 << 6)
  195. /* DAC33_ASRC_CTRL_A (0x32) */
  196. #define DAC33_SRCBYP (0x01 << 0)
  197. #define DAC33_SRCLKSEL_MASK (0x03 << 1)
  198. #define DAC33_SRCLKSEL_INTSOC (0x00 << 1)
  199. #define DAC33_SRCLKSEL_PLL (0x01 << 1)
  200. #define DAC33_SRCLKSEL_MCLK (0x02 << 1)
  201. #define DAC33_SRCLKSEL_BCLK (0x03 << 1)
  202. #define DAC33_SRCLKDIV(x) (x << 3)
  203. /* DAC33_ASRC_CTRL_B (0x33) */
  204. #define DAC33_SRCSETUP(x) (x << 0)
  205. #define DAC33_SRCREFSEL (0x01 << 4)
  206. #define DAC33_SRCREFDIV(x) (x << 5)
  207. /* DAC33_INTP_CTRL_A (0x38) */
  208. #define DAC33_INTPSEL (0x01 << 0)
  209. #define DAC33_INTPM_MASK (0x03 << 1)
  210. #define DAC33_INTPM_ALOW_OPENDRAIN (0x00 << 1)
  211. #define DAC33_INTPM_ALOW (0x01 << 1)
  212. #define DAC33_INTPM_AHIGH (0x02 << 1)
  213. /* DAC33_LDAC_PWR_CTRL (0x40) */
  214. /* DAC33_RDAC_PWR_CTRL (0x41) */
  215. #define DAC33_DACLRNUM (0x01 << 2)
  216. #define DAC33_LROUT_GAIN(x) (x << 0)
  217. /* DAC33_ANA_VOL_SOFT_STEP_CTRL (0x49) */
  218. #define DAC33_VOLCLKSEL (0x01 << 0)
  219. #define DAC33_VOLCLKEN (0x01 << 1)
  220. #define DAC33_VOLBYPASS (0x01 << 2)
  221. #define TLV320DAC33_MCLK 0
  222. #define TLV320DAC33_SLEEPCLK 1
  223. #endif /* __TLV320DAC33_H */